阅读说明：本技术 半导体光学元件 (Semiconductor optical element ) 是由 藤原直树 八木英树 小路元 平谷拓生 菊地健彦 新田俊之 于 2020-10-28 设计创作，主要内容包括：本发明提供一种半导体光学元件,其能够得到良好的特性并且能够小型化。所述半导体光学元件具备：SOI基板,具有硅的波导；及增益区域,与所述SOI基板接合,由III-V族化合物半导体形成,并具有光学增益,所述波导包括弯曲部和多个直线部,所述多个直线部经由所述弯曲部相互连接并以直线状延伸,所述增益区域位于所述多个直线部的每一个上。(The invention provides a semiconductor optical element which can obtain good characteristics and can be miniaturized. The semiconductor optical element includes: an SOI substrate having a waveguide of silicon; and a gain region bonded to the SOI substrate, formed of a III-V group compound semiconductor, and having an optical gain, the waveguide including a bent portion and a plurality of straight portions connected to each other via the bent portion and extending in a straight line, the gain region being located on each of the plurality of straight portions.)

1. A semiconductor optical element is provided with:

an SOI substrate having a waveguide of silicon; and

a gain region bonded to the SOI substrate, formed of a III-V compound semiconductor, and having an optical gain,

the waveguide includes a curved portion and a plurality of straight portions connected to each other via the curved portion and extending in a straight line,

the gain region is located on each of the plurality of straight line portions.

2. The semiconductor optical element according to claim 1,

the bending angle of the waveguide is more than 90 degrees.

3. The semiconductor optical element according to claim 1 or 2,

the semiconductor optical element includes 1 st insulating films provided on both sides of the bending portion.

4. The semiconductor optical element according to any one of claims 1 to 3,

the semiconductor optical element includes a 2 nd insulating film covering a side surface of the gain region,

the width of the gain region is greater than the width of the waveguide.

5. The semiconductor optical element according to any one of claims 1 to 4,

the curvature radius of the curved portion is 10 [ mu ] m or more.

6. The semiconductor optical element according to any one of claims 1 to 5,

the waveguide includes three or more of the straight line portions,

the gain region is located on each of the three or more straight line portions.

7. The semiconductor optical element according to any one of claims 1 to 6,

the semiconductor optical element includes a 1 st electrode and a 2 nd electrode provided on the SOI substrate,

the gain region has an n-type semiconductor layer, a core layer, and a p-type semiconductor layer laminated in this order from the SOI substrate side,

the n-type semiconductor layer, the core layer, and the p-type semiconductor layer are each formed of a group III-V compound semiconductor,

the 1 st electrode is connected with the n-type semiconductor layer, and the 2 nd electrode is connected with the p-type semiconductor layer.

8. The semiconductor optical element according to claim 7,

a plurality of the gain regions respectively have the core layer and the p-type semiconductor layer,

the plurality of gain regions share the n-type semiconductor layer, and the n-type semiconductor layer electrically connects the plurality of gain regions,

the 1 st electrode is disposed on the n-type semiconductor layer and has a 1 st connection part and a 1 st pad part connected to the n-type semiconductor layer,

the 1 st connection is located between the plurality of gain regions,

the 1 st pad part is connected to the 1 st connection part and has a width greater than the 1 st connection part,

the 2 nd electrode has a 2 nd connection part and a 2 nd pad part, the 2 nd connection part is connected with the p-type semiconductor layer,

the 2 nd connection part is disposed on the p-type semiconductor layer of each of the plurality of gain regions,

the 2 nd pad part is connected to the 2 nd connection part and has a width greater than the 2 nd connection part.

9. The semiconductor optical element according to any one of claims 1 to 8,

the gain region has a wedge on the waveguide.

10. The semiconductor optical element according to any one of claims 1 to 9,

the SOI substrate has a resonator formed of silicon, the resonator being optically coupled to the waveguide.

Technical Field

The present invention relates to a semiconductor optical element.

Background

A technique of bonding a gain region formed of a III-V group compound semiconductor to an soi (silicon On insulator) substrate (so-called silicon photon) On which a waveguide is formed is known (for example, non-patent document 1). A waveguide, a resonator, and the like formed of silicon (Si) are provided on an SOI substrate. The III-V compound semiconductor is of a direct transition type, which has a high optical gain. The light emitted from the gain region propagates through the waveguide of the SOI substrate.

Non-patent document 1: tran et al, "Ultra-low Noise microwave reactors reactor full Integrated on Silicon", Compound Semiconductor Week 2019, TuA3-1

Disclosure of Invention

In order to narrow the line width, improve the monochromaticity of the laser light, and achieve high output, a long gain region is effective. However, the semiconductor optical element is also increased in size due to the longer gain region. An object of the present invention is to provide a semiconductor optical element that can obtain good characteristics and can be miniaturized.

The semiconductor optical element of the present invention includes: an SOI substrate having a waveguide of silicon; and a gain region bonded to the SOI substrate, formed of a III-V group compound semiconductor, and having an optical gain, the waveguide including a bent portion and a plurality of straight portions connected to each other via the bent portion and extending in a straight line, the gain region being located on each of the plurality of straight portions.

Effects of the invention

According to the above invention, excellent characteristics can be obtained and the size can be reduced.

Drawings

Fig. 1A is a plan view illustrating a semiconductor optical element of example 1. Fig. 1B is a plan view in which the vicinity of the gain region is enlarged.

Fig. 2A to 2D are cross-sectional views illustrating a semiconductor optical element.

Fig. 3 is a plan view illustrating a semiconductor optical element of a comparative example.

Fig. 4A is a plan view illustrating the semiconductor optical element of example 2, and fig. 4B is a sectional view illustrating the semiconductor optical element.

Description of the reference symbols

10. 12 substrate

11 waveguide

11a bending part

11b straight line part

13 groove

14 SiO₂Layer(s)

16 Si layer

17. 30, 32 electrodes

19 ring resonator

20 gain region

21. 23 wedge-shaped part

22 n-type semiconductor layer

24 core layer

26 p-type semiconductor layer

30a, 32a pads

30b, 32b connection part

28. 34 insulating film

100. 200 semiconductor optical element

Detailed Description

[ description of embodiments of the invention ]

First, the contents of the embodiments of the present invention are listed and explained.

One embodiment of the present invention is (1) a semiconductor optical element including: an SOI substrate having a waveguide of silicon; and a gain region bonded to the SOI substrate, formed of a III-V group compound semiconductor, and having an optical gain, the waveguide including a bent portion and a plurality of straight portions connected to each other via the bent portion and extending in a straight line, the gain region being located on each of the plurality of straight portions. The semiconductor optical element can be miniaturized by bending the waveguide. In addition, favorable characteristics such as a narrow line width and high output can be obtained by a plurality of gain regions.

(2) The bend angle of the waveguide may be 90 ° or more. The semiconductor optical element can be miniaturized.

(3) The semiconductor optical element may include 1 st insulating films provided on both sides of the bent portion. The refractive index difference between the bend portion and the 1 st insulating film is large, and the beam-binding is strong. Therefore, the loss of light at the bent portion can be suppressed.

(4) The semiconductor optical element may include a 2 nd insulating film covering a side surface of the gain region, and the gain region may have a width larger than that of the waveguide. The lateral gain region is weakly beam-tied compared to the waveguide. The gain region is provided in the linear portion and is not bent, so that loss of light can be suppressed.

(5) The curvature radius of the curved portion may be 10 μm or more. This makes it possible to reduce the size of the semiconductor optical element.

(6) The waveguide may include three or more of the linear portions, and the gain region may be located in each of the three or more linear portions. This makes it possible to obtain excellent characteristics and to reduce the size.

(7) The semiconductor optical element may include a 1 st electrode and a 2 nd electrode provided on the SOI substrate, the gain region may include an n-type semiconductor layer, a core layer, and a p-type semiconductor layer stacked in this order from the SOI substrate side, the n-type semiconductor layer, the core layer, and the p-type semiconductor layer may be formed of a group III-V compound semiconductor, respectively, the 1 st electrode may be connected to the n-type semiconductor layer, and the 2 nd electrode may be connected to the p-type semiconductor layer. Carriers can be injected into the core layer using the 1 st electrode and the 2 nd electrode.

(8) The plurality of gain regions may include the core layer and the p-type semiconductor layer, respectively, the plurality of gain regions share the n-type semiconductor layer, the n-type semiconductor layer electrically connects the plurality of gain regions, the 1 st electrode may be disposed on the n-type semiconductor layer, and may include a 1 st connection portion and a 1 st pad portion connected to the n-type semiconductor layer, the 1 st connection portion may be located between the plurality of gain regions, the 1 st pad portion may be connected to the 1 st connection portion, and may have a width larger than that of the 1 st connection portion, the 2 nd electrode may include a 2 nd connection portion and a 2 nd pad portion, the 2 nd connection portion may be connected to the p-type semiconductor layer, the 2 nd connection portion may be disposed on the p-type semiconductor layer of each of the plurality of gain regions, and the 2 nd pad portion may be connected to the 2 nd connection portion, and has a width greater than the 2 nd connecting portion. Carriers can be injected into the core layer using the 1 st electrode and the 2 nd electrode. Further, the resistance can be reduced by the 1 st connection part and the 2 nd connection part.

(9) The gain region may have a wedge portion on the waveguide. The efficiency of optical coupling between the gain region and the waveguide can be improved.

(10) The SOI substrate may have a resonator formed of silicon, and the resonator may be optically coupled to the waveguide. The wavelength of the light can be selected by the resonator.

[ details of embodiments of the present invention ]

Specific examples of the semiconductor optical element according to the embodiment of the present invention will be described below with reference to the drawings. The present invention is not limited to these examples, but is defined by the claims, and all changes that come within the meaning and range of equivalency of the claims are intended to be embraced therein.

Example 1

Fig. 1A is a plan view illustrating a semiconductor optical element 100 of example 1. Fig. 1B is a plan view in which the vicinity of the gain region is enlarged. Fig. 2A to 2D are cross-sectional views illustrating the semiconductor optical element 100.

As shown in fig. 1A and 1B, the semiconductor optical element 100 is a hybrid type wavelength variable laser element including a substrate 10 and a gain region 20 and using silicon photons. Three gain regions 20, two ring resonators 19, and electrodes 17, 30, and 32 are provided on the surface of the substrate 10. The surface of the semiconductor optical element 100 is covered with an insulating film not shown.

As shown in fig. 2A, the gain region 20 is located on the waveguide 11, and has an n-type semiconductor layer 22, a core layer 24, and a p-type semiconductor layer 26 stacked in this order. As shown in fig. 2A to 2D, the substrate 10 includes a substrate 12 and silicon oxide (SiO) sequentially stacked₂) Layer 14, silicon (Si) layer 16. SiO 2₂The thickness of the layer 14 is, for example, 2 μm. The thickness of the Si layer 16 is, for example, 220 nm. The Si layer 16 in the substrate 10 is provided with the waveguide 11 and the ring resonator 19 shown in fig. 1A. The end face of the substrate 10 is coated to prevent reflection of light. The length L1 of the semiconductor optical element 100 in the X-axis direction is 1700 μm, for example, and the length L2 of the semiconductor optical element in the Y-axis direction is 600 μm, for example.

As shown in fig. 1A and 1B, the waveguide 11 has a curved portion 11A and a linear portion 11B. The curved portion 11a has a semicircular arc shape, for example. The curved portion 11a may have a shape in which a clothoid curve and a raised cosine curve are combined. One linear portion 11b extends in the X-axis direction from each end of the curved portion 11 a. The three linear portions 11b are arranged in the Y-axis direction, separated from each other, and connected to each other via a bent portion 11 a. That is, the waveguide 11 bent at 180 ° at the bent portion 11a is disposed in a region sandwiched between the two ring resonators 19 in the substrate 10.

Of the three linear portions 11b, the + Y-side linear portion 11b is branched into two in the vicinity of the-X-side end of the substrate 10. The two waveguides 11 are optically coupled to the ring resonator 19 and reach the-X-side end of the substrate 10. Of the three linear portions 11b, the linear portion 11b on the-Y side branches into two in the vicinity of the + X-side end of the substrate 10. The two waveguides 11 are optically coupled to the ring resonator 19 and reach the + X-side end of the substrate 10. Both ends of the central linear portion 11b of the three linear portions 11b are connected to the curved portion 11 a.

A gain region 20 is joined to each of the three linear portions 11b, and no gain region 20 is joined to the curved portion 11 a. One gain region 20 overlaps one straight line portion 11b, and is optically coupled. The gain region 20 has a linear shape extending in the X-axis direction like the linear portion 11 b. The length L3 of the gain region 20 in the X-axis direction is, for example, 800 μm.

The electrode 30 is an n-type ohmic electrode, and has a pad 30a and three connection portions 30 b. The electrode 32 is a p-type ohmic electrode, and has a pad 32a and three connection portions 32 b. The pad 30a is located on the-Y side of the three gain regions 20. The connection portion 30b is electrically connected to the pad 30a, is adjacent to and separated from the gain region 20, and extends in the X-axis direction. The pad 32a is located on the + Y side of the three gain regions 20. The connection portion 32b is electrically connected to the pad 32a, is located on the gain region 20, and extends in the X-axis direction.

The electrode 30 is made of a metal such as gold, germanium, and an alloy of Ni (AuGeNi). The electrode 32 is, for example, a laminated body of titanium, platinum, and gold (Ti/Pt/Au). The thickness of the electrodes 30, 32 is, for example, 1 μm. The width of each of the pads 30a, 32a in the Y axis direction is, for example, 100 μm or more. The width of the connection portion 30b is, for example, 15 μm. The electrodes 30 and 32 may be provided with a plating layer of Au or the like. The electrode 17 is provided on the ring resonator 19 and is formed of a metal such as Ti, for example.

As shown in fig. 1B, the gain region 20 and the n-type semiconductor layer 22 have tapered portions 21 and 23, respectively. The wedge portions 21, 23 are narrowed at the front end in the X-axis direction and are located on the waveguide 11. The wedge portion 21 is provided at an end portion of the n-type semiconductor layer 22 in the X-axis direction. The wedge 23 is located above the wedge 21 and is provided at the ends of the core layer 24 and the p-type semiconductor layer 26 of the gain region 20 in the X-axis direction. The length of each of the wedge portions 21, 23 is, for example, 150 μm, and the width of the tip is 0.4 μm. Wedges 21, 23 are also provided on the-X side end side of the gain region 20.

Fig. 2A is a sectional view taken along line a-a of fig. 1A. Fig. 2B is a sectional view taken along line B-B of fig. 1A. Fig. 2C is a sectional view taken along line C-C of fig. 1A. Fig. 2D is a sectional view taken along line D-D of fig. 1A.

As shown in fig. 2A, the waveguide 11 and the groove 13 are provided in the Si layer 16 of the substrate 10. The grooves 13 are located on both sides of one waveguide 11 in the Y-axis direction. The width W2 of the waveguide 11 and the width of the groove 13 are each, for example, 1 μm. SiO may be exposed at the grooves 13₂The layer 14, or the Si layer 16, may form the bottom surface of the trench 13. In a portion of the waveguide 11 overlapping with the gain region 20, the side surface of the waveguide 11 is exposed in the air.

An insulating film 34 is provided on the surface of the substrate 10. As shown in fig. 2B to 2D, the waveguide 11 is covered with the insulating film 34 at a portion not overlapping the gain region 20, and both sides are buried in the insulating film 34. As shown in fig. 2B and 2C, an insulating film 34 is interposed between the pads 30a and 32a and the waveguide 11, and the pads and the waveguide 11 do not contact each other. As shown in fig. 2D, the side surfaces and the upper surface of the bent portion 11a of the waveguide 11 are covered with an insulating film 34. The bent portion 11a may not overlap with the pad, or may overlap with the pad.

As shown in fig. 2A, the gain region 20 is located on the waveguide 11, and has an n-type semiconductor layer 22, a core layer 24, and a p-type semiconductor layer 26 stacked in this order. The width W1 in the Y-axis direction of the core layer 24 and the p-type semiconductor layer 26 of one gain region 20 is, for example, 2 μm. An n-type semiconductor layer 22 is provided on the three waveguides 11 and is shared by the three gain regions 20. The three gain regions 20 are electrically connected by an n-type semiconductor layer 22. The core layer 24 and the p-type semiconductor layer 26 are covered on their side surfaces with an insulating film 28. The distance D1 between the insulating films 28 is, for example, 20 μm.

The n-type semiconductor layer 22 is formed of, for example, n-type indium phosphide (n-InP) having a thickness of 0.3 μm. The core layer 24 includes a plurality of Well layers and barrier layers formed of, for example, undoped gallium indium arsenide phosphide (i-GaInAsP), and has a Multi Quantum Well structure (MQW). The thickness of the core layer 24 is, for example, 0.3 μm. The p-type semiconductor layer 26 is formed of, for example, p-InP with a thickness of 2 μm. The p-type semiconductor layer 26 may further include a p-type gallium indium arsenide (p-GaInAs) layer on the p-InP layer. The insulating films 28, 34 are made of, for example, SiO₂And the like. The thickness of the insulating film 28 is, for example, 0.5 μm, and the thickness of the insulating film 34 is, for example, 1.5 μm.

As shown in fig. 2A, the pad 30a and the connection portion 30b are provided on the surface of the n-type semiconductor layer 22 and electrically connected to the n-type semiconductor layer 22. As shown in fig. 2B and 2C, the pads 30a, 32a are located on the surface of the insulating film 34 and separated from the waveguide 11. As shown in fig. 2A, the connection portion 32b is provided on the surface of the p-type semiconductor layer 26 and electrically connected to the p-type semiconductor layer 26.

Each gain region 20 has a pin structure along the Z-axis direction. By applying a voltage to the electrodes 30 and 32, carriers are injected into the core layer 24 of the three gain regions 20, and light is emitted. The light propagates in the waveguide 11 and is incident on the ring resonator 19. The ring resonator 19 reflects a part of the light toward the gain region 20 and transmits a part of the light. Light can be emitted from any of the four waveguides 11 reaching the end of the substrate 10. The radii of the two ring resonators 19 are different from each other, and the reflection spectra are also different. The wavelength at which the reflection peaks of the two ring resonators 19 coincide becomes the oscillation wavelength. The electrode 17 functions as a heater that generates heat by the input of electric power. The temperature of the ring resonator 19 is changed by the electrode 17, so that the refractive index of the ring resonator 19 is changed, and the oscillation wavelength can be changed, for example, in the range of 40 nm. The oscillation wavelength is, for example, 1550 nm. + -.20 nm.

A method for manufacturing the semiconductor optical element 100 will be described. The waveguide 11 and the ring resonator 19 are formed on the surface of the wafer-shaped substrate 10. An optical circuit such as a modulator may be provided on the substrate 10. On a compound semiconductor wafer, a p-type semiconductor layer 26, a core layer 24, and an n-type semiconductor layer 22 are epitaxially grown in this order by an Organometallic Vapor Phase Epitaxy (OMVPE) method or the like. The wafer is diced and a plurality of dice are formed. For example, the surface of the small piece and the substrate 10 is irradiated with plasma to activate the small piece and the substrate 10. The chip is etched to form a gain region 20 as shown in fig. 1A and 2A. The wafer is diced to obtain a plurality of semiconductor optical elements 100.

Fig. 3 is a plan view illustrating a semiconductor optical element 100C of a comparative example. The waveguide 11 of the semiconductor optical element 100C has no bend, extends in the X-axis direction, and is optically coupled with the ring resonator 19. The semiconductor optical element 100C has one gain region 40.

The gain region 40 is made long in order to narrow the line width and obtain a high light output. For example, in order to obtain the same degree of spectral line width and light output as those of the three gain regions 20 of embodiment 1 by one gain region 40, the length L6 of the gain region 40 is longer than the length L3 of embodiment 1, for example, 2400 μm. In order to mount the long gain region 40, the length L4 of the substrate 10 in the X-axis direction is longer than the length L1 of example 1, and is 3300 μm, for example. The length L5 of the substrate 10 in the Y-axis direction is, for example, 600 μm, as in L2. In the comparative example, the semiconductor optical element 100C is large in size. As a result, the number of semiconductor optical elements obtained from one wafer is reduced, and the cost is increased.

On the other hand, according to embodiment 1, the waveguide 11 includes the curved portion 11a and the linear portion 11 b. The gain region 20 is joined to each of the three linear portions 11 b. By three gain regions 20, a narrower line width and a higher light output can be obtained to the same extent as with one longer gain region 40. The waveguide 11 is bent, and therefore the semiconductor optical element 100 can be miniaturized.

As shown in fig. 1A and 1B, the waveguide 11 is folded back at 180 ° at a bent portion 11A to have a zigzag shape. This allows three linear portions 11b to be arranged on the substrate 10. The three gain regions 20 are arranged in parallel similarly to the linear portion 11 b. As a result, the semiconductor optical element 100 can be effectively miniaturized. Specifically, the length L3 of one gain region 20 is about 1/3 of the length L6 of the gain region 40. The length L1 in the X-axis direction of the semiconductor optical element 100 can be made about half of the length L4 of the comparative example. Therefore, the size of the semiconductor optical element 100 can be reduced to about 50% of that of the comparative example. The number of semiconductor optical elements 100 obtained from one wafer can be increased by 1.4 times, and the cost can be reduced.

The waveguide 11 is formed of Si. As shown in fig. 2A, both sides of the portion of the waveguide 11 overlapping the gain region 20 are exposed in the air. As shown in fig. 2B to 2D, the other part of the waveguide 11 is exposed through the insulating film 34. Si has a refractive index of about 3.5, air has a refractive index of 1, SiO₂The refractive index of the insulating film 34 of (a) is about 1.5. The refractive index difference between the waveguide 11 and the outside is large, and the light beam binding of the waveguide 11 is strong. Therefore, the loss of light in the waveguide 11 including the bent portion 11a is small.

Insulating films 34 on both sides of the bent portion 11a except for SiO₂Alternatively, the silicon nitride layer may be composed of SiN_x(x represents a component), a polymer, or the like. In order to enhance light confinement, an insulating film having a large refractive index difference from Si is preferable. Both sides of the bent portion 11a may be exposed to the air. Both sides of the portion of the waveguide 11 overlapping the gain region 20 may be buried by the insulating film 34.

The radius of curvature of the curved portion 11a is, for example, 50 μm, and the distance between the linear portions 11b can be reduced. Therefore, the semiconductor optical element 100 can be effectively miniaturized. The radius of curvature may be 50 μm or less, 30 μm or less, 20 μm or less, and 10 μm or more. By reducing the radius of curvature, miniaturization is possible. In addition, since the waveguide 11 has a strong optical confinement, the loss of light can be suppressed even if the curvature radius is small.

On the other hand, the gain region 20 is formed of a III-V compound semiconductor. The refractive index of the III-V compound semiconductor is lower than that of Si, and the refractive index difference between the gain region 20 and the insulating film 28 on the side face is smaller than that between Si and the insulating film. The lateral beam-tying is weak, and thus, if the gain region 20 is bent with a small radius of curvature, the loss of light increases. The gain region 20 is linear in embodiment 1, and bends the waveguide 11. Thereby suppressing loss of light.

When the core layer 24 and the p-type semiconductor layer 26 of the gain region 20 have a narrow-width mesa structure and the side surfaces are exposed in the air having a small refractive index, an increase in loss due to bending with a small radius of curvature can be suppressed. However, the core layer 24, which is processed to be thin to have a high mesa structure to the same extent as the waveguide 11, is likely to be deteriorated with time when carriers are injected for a long time. The gain region 20 exposed to the air is also likely to be deteriorated with time from the side surface of the MQW. Since the gain region 20 of example 1 has a larger width than the waveguide 11 and the side surfaces are covered with the insulating film 28, deterioration with time is less likely to occur. On the other hand, the transverse beam binding is weak, and the loss due to bending becomes large. In order to suppress an increase in light loss, the curvature radius is 200 μm or more, and it is difficult to achieve miniaturization. In example 1, the waveguide 11 having a strong optical beam-confining property is bent and the plurality of gain regions 20 are formed in a linear shape, whereby both suppression of light loss and downsizing can be achieved.

The gain region 20 has a pin structure including the n-type semiconductor layer 22, the core layer 24, and the p-type semiconductor layer 26. Carriers can be injected into the core layer 24 by applying a voltage to the electrodes 30 and 32, and light can be emitted.

The three gain regions 20 share an n-type semiconductor layer 22. The pad 30a and the connection portion 32b of the electrode 30 are provided on the pad 30a and the connection portion 30b connected to the n-type semiconductor layer 22. The electrode 32 has a pad 32a and a connection portion 32 b. The connection portion 32b is located on each gain region 20 and connected to the p-type semiconductor layer 26. Carriers can be injected into each of the plurality of gain regions 20 by applying a voltage between each of the pads 30a and 32a, and light can be emitted. The semiconductor optical element 100 can be miniaturized compared to a case where a pair of pads 30a, 32a are provided in the gain region 20, respectively.

A metal connection portion 30b is provided between the gain regions 20, and pads 30a, 32a having a large width are provided on the substrate 10. This improves heat dissipation and reduces resistance. Further, as shown in fig. 2A, the pad 30a of the electrode 30 is connected to the n-type semiconductor layer 22. Therefore, even if the connection portion 30b extending adjacent to the gain region 20 is not provided, light emission of the gain region 20 can be realized.

When light is transferred to the metal electrodes 30 and 32, the light is largely lost. Preferably, the electrodes 30, 32 are not in contact with the waveguide 11. As shown in fig. 2B and 2C, the waveguide 11 is covered with an insulating film 34 to prevent contact with the electrode.

Since the gain region 20 and the n-type semiconductor layer 22 have the tapered portions 21 and 23 having the widths of the tips as small as 0.4 μm, respectively, the efficiency of optical coupling between the gain region 20 and the waveguide 11 is improved to 90% or more. The gain region 20 and the n-type semiconductor layer 22 may not have the tapered portions 21 and 23, or either one of them may have a tapered portion. The omission of the wedge portion reduces the efficiency of optical coupling, but makes it possible to omit the processing of a thin tip, thereby facilitating the manufacturing.

The number of the linear portions 11b and the number of the gain regions 20 may be three, two, or four or more, respectively. By increasing their number, the semiconductor optical element 100 can be more miniaturized. However, even in the case where the coupling efficiency is 90%, light is lost in the coupling portion of the gain region 20 and the waveguide 11. Therefore, the coupling portion increases and the light loss increases as the number of the linear portions 11b and the gain regions 20 increases. The number of the linear portions 11b and the number of the gain regions 20 are determined so as to achieve both miniaturization and suppression of light loss. Waveguide 11 is optically coupled to ring resonator 19. Therefore, the wavelength can be selected in the miniaturized semiconductor optical element 100. Instead of the ring resonator 19, a diffraction grating type distributed reflector formed of the silicon waveguide 11 may be provided for wavelength selection. Instead of making the two waveguides 11 reach the + X-side end of the substrate 10, the two waveguides 11 may be connected to a curved waveguide that returns light, such as a loop mirror waveguide.

Example 2

Fig. 4A is a plan view illustrating a semiconductor optical element 200 of example 2. Fig. 4B is a cross-sectional view illustrating the semiconductor optical element 200, and shows a cross-section along the line E-E of fig. 4A. The same structure as that of embodiment 1 will not be described.

As shown in fig. 4A, the waveguide 11 has two curved portions 11a and three linear portions 11 b. The curved portion 11a corresponds to an arc 1/4, and is connected to the linear portion 11b at both ends. The bending angle of the waveguide 11 is 90 °. Two of the three linear portions 11b extend in the X-axis direction. One end of the two linear portions 11b is optically coupled to the ring resonator 19 in the vicinity of the-X-side end of the substrate 10, and the other end is connected to the bent portion 11 a. One of the three linear portions 11b extends in the Y-axis direction. Both ends of the one linear portion 11b are connected to the curved portion 11 a. The three linear portions 11b are respectively joined with linear gain regions 20. The gain region 20 is not joined to the bent portion 11 a.

As shown in fig. 4A, electrodes 30 and 32 are provided on the substrate 10 at positions surrounded by the three linear portions 11 b. As shown in fig. 4B, the electrode 32 is located on the + X side with respect to the electrode 30, and is provided from above the insulating film 34 to above the gain region 20. According to example 2, the size of the semiconductor optical element 200 can be reduced to about 50% of that of the comparative example as in example 1 by bending the waveguide 11 at 90 °.

The waveguide 11 of embodiment 1 has a shape bent at 180 ° and reciprocated in the X-axis direction. The waveguide 11 of example 2 has a U-shape bent at 90 ° and extending in the X-axis direction and the Y-axis direction. The waveguide 11 may also have a shape other than these. In order to miniaturize the semiconductor optical device, the bend angle of the waveguide 11 is preferably 90 ° or more.

While the embodiments of the present invention have been described in detail, the present invention is not limited to the specific embodiments, and various modifications and changes can be made within the scope of the present invention described in the claims.