阅读说明：本技术 多层布线板的制造方法 (Method for manufacturing multilayer wiring board ) 是由 沟口美智 吉川和广 于 2019-03-22 设计创作，主要内容包括：本发明提供一种电路密合性优异且能够极其有效地防止激光加工导致的内层电路的贯通的多层布线板的制造方法。该多层布线板的制造方法包含：(a)在第1金属箔上依次层叠第1绝缘层和第2金属箔而形成第1层叠体的工序；(b)形成第2布线层的工序；(c)依次层叠第2绝缘层和第3金属箔而形成第2层叠体的工序；(d)形成第1导通孔和第2导通孔的工序；以及(e)形成包含第1布线层、第2布线层以及第3布线层的多层布线板的工序,对于第2金属箔的至少与第1绝缘层相对的面,通过傅立叶变换红外分光光度计(FT－IR)测得的、波长10.6μm的激光的反射率为80％以上,且依据ISO25178测得的峰的顶点密度Spd为7000个/mm<Sup>2</Sup>以上且15000个/mm<Sup>2</Sup>以下。(The invention provides a method for manufacturing a multilayer wiring board, which has excellent circuit adhesion and can extremely effectively prevent penetration of an inner layer circuit caused by laser processing. TheThe method for manufacturing a multilayer wiring board includes: (a) a step of forming a 1 st laminate by sequentially laminating a 1 st insulating layer and a 2 nd metal foil on a 1 st metal foil; (b) a step of forming a 2 nd wiring layer; (c) a step of forming a 2 nd laminate by sequentially laminating a 2 nd insulating layer and a 3 rd metal foil; (d) forming a 1 st via hole and a 2 nd via hole; and (e) a step of forming a multilayer wiring board including a 1 st wiring layer, a 2 nd wiring layer, and a 3 rd wiring layer, wherein the reflectance of a laser beam having a wavelength of 10.6 [ mu ] m, which is measured by a Fourier transform infrared spectrophotometer (FT-IR), is 80% or more with respect to at least the surface of the 2 nd metal foil facing the 1 st insulating layer, and the peak density Spd of peaks measured according to ISO25178 is 7000 pieces/mm 2 Above and 15000 pieces/mm 2 The following.)

1. A method of manufacturing a multilayer wiring board, wherein,

the method for manufacturing the multilayer wiring board comprises the following steps:

(a) a step of forming a 1 st laminate by sequentially laminating a 1 st insulating layer and a 2 nd metal foil on a 1 st metal foil;

(b) patterning the 2 nd metal foil to form a 2 nd wiring layer;

(c) a step of forming a 2 nd laminate by sequentially laminating a 2 nd insulating layer and a 3 rd metal foil on the 1 st laminate on which the 2 nd wiring layer is formed;

(d) a step of forming a 1 st via hole penetrating the 1 st metal foil and the 1 st insulating layer to reach the 2 nd wiring layer and a 2 nd via hole penetrating the 3 rd metal foil and the 2 nd insulating layer to reach the 2 nd wiring layer by laser processing the 2 nd laminated body from the 1 st metal foil and the 3 rd metal foil, respectively; and

(e) a step of forming a multilayer wiring board including a 1 st wiring layer adjacent to the 1 st insulating layer, a 2 nd wiring layer derived from the 2 nd metal foil, and a 3 rd wiring layer adjacent to the 2 nd insulating layer by performing plating and patterning on both surfaces of the 2 nd stacked body so as to form electrical connection via the 1 st via hole, the 2 nd wiring layer, and the 2 nd via hole,

a reflectance of a laser light having a wavelength of 10.6 μm measured by a Fourier transform infrared spectrophotometer (FT-IR) is 80% or more with respect to at least a surface of the 2 nd metal foil opposite to the 1 st insulating layer, and the reflectance is in accordance with ISO251The peak density Spd of the peak measured at 78 was 7000/mm²Above and 15000 pieces/mm²The following.

2. The method of claim 1, wherein,

the 2 nd metal foil has a ten-point average roughness Rz of a surface facing the 1 st insulating layer of 0.2 μm or more and 2.0 μm or less.

3. The method of claim 1 or 2,

a reflectance of a laser light having a wavelength of 10.6 [ mu ] m, measured by a Fourier transform infrared spectrophotometer (FT-IR), of 80% or more with respect to a surface of the 2 nd wiring layer facing the 2 nd insulating layer, and a peak density Spd of 7000 peaks/mm measured in accordance with ISO25178²Above and 15000 pieces/mm²The following.

4. The method of any one of claims 1 to 3,

the thickness of the 2 nd wiring layer is 3 μm or more and 12 μm or less.

5. The method of any one of claims 1 to 4,

the 1 st metal foil, the 2 nd metal foil and the 3 rd metal foil are all copper foils.

6. The method of any one of claims 1 to 5,

the thickness of the 1 st metal foil and the thickness of the 3 rd metal foil are both 0.1 μm or more and 12 μm or less.

7. The method of any one of claims 1 to 6,

thickness T of the 1 st metal foil₁Thickness T relative to the 2 nd wiring layer₂Ratio of (A to (B))₁/T₂Is 0.23 or more, and/or the thickness T of the 3 rd metal foil₃Thickness T relative to the 2 nd wiring layer₂Ratio of (A to (B))₃/T₂Is 0.23 or more.

8. The method of claim 7, wherein,

the T is₁/T₂Is 1.0 or less, and/or the T₃/T₂Is 1.0 or less.

9. The method of any one of claims 1 to 8,

the diameter of the 1 st via hole and the diameter of the 2 nd via hole are both 30 μm or more and 80 μm or less.

10. The method of any one of claims 1 to 9,

the 1 st metal foil is provided in the form of a carrier-attached metal foil including a 1 st carrier, a 1 st release layer, and the 1 st metal foil in this order, and after the 2 nd laminate is formed and before the 1 st metal foil is subjected to laser processing, the 1 st carrier is released from the 2 nd laminate and/or

The 3 rd metal foil is provided in the form of a carrier-carrying metal foil including a 3 rd carrier, a 3 rd release layer, and the 3 rd metal foil in this order, and the 3 rd carrier is released from the 2 nd laminate after the 2 nd laminate is formed and before the 3 rd metal foil is subjected to laser processing.

Technical Field

The present invention relates to a method of manufacturing a multilayer wiring board.

Background

In recent years, multilayer printed wiring boards have been widely used to increase the mounting density of printed wiring boards and to reduce the size of printed wiring boards. Such a multilayer printed wiring board is used in many portable electronic devices for the purpose of weight reduction and size reduction. Further reduction in the thickness of the interlayer insulating layer, and further reduction in thickness and weight as a wiring board are required for the multilayer printed wiring board.

As a technique for satisfying such a demand, a method for manufacturing a multilayer printed wiring board using a coreless lamination method is adopted. The coreless lamination method is: a method of forming a multilayer structure by alternately stacking (laminating) insulating layers and wiring layers without using a so-called core substrate. In the coreless build-up method, in order to easily peel the support from the multilayer printed wiring board, it is proposed to use a metal foil with a carrier. For example, patent document 1 (japanese patent No. 4460013) discloses a method for manufacturing a wiring board, the method including: an insulating layer and a metal layer having a thickness of 18 μm were sequentially laminated on the metal foil side of the metal foil with a carrier, the metal layer was processed to form an inner layer circuit (1 st conductor pattern), the insulating layer and the metal foil which were further sequentially laminated on the inner layer circuit were peeled off the carrier to form a substrate having the metal foils on both sides of the inner layer circuit, and then the inner layer circuit and the metal foils on both sides of the substrate were electrically connected via vias. Patent document 1 also discloses the following: the method includes forming via holes, which penetrate a metal foil and an insulating layer and reach an inner layer circuit, from both surfaces of a substrate by laser processing, patterning the metal foil on both surfaces of the substrate with a dry film, filling the via holes with plating by electroplating, and forming outer layer circuits (conductor patterns) on both surfaces of the substrate.

Disclosure of Invention

Problems to be solved by the invention

In recent years, with further thinning of multilayer printed wiring boards, the thickness of metal foils used for inner layer circuits of multilayer wiring boards (hereinafter referred to as "inner layer metal foils") has also decreased. In this regard, it is also desirable to use an extremely thin inner metal foil in the production of the wiring board as described in patent document 1. However, when a conventional ultra-thin copper foil (for example, 6 μm or more and 12 μm or less in thickness) is used as the inner layer metal foil, there are problems as follows: in the step of forming via holes for interlayer connection, laser processing is performed to penetrate not only the metal foil and the insulating layer on both surfaces (outer layers) to form holes, but also to penetrate the inner layer circuit to form holes.

The inventors have now found the following: by using a metal foil having a specific surface for which the reflectance of a laser beam having a wavelength of 10.6 μm and the peak density Spd of the peak satisfy predetermined conditions, as an inner layer metal foil, multilayer wiring board production is performed, whereby not only circuit adhesion is excellent, but also penetration of the inner layer circuit by laser processing can be extremely effectively prevented.

Accordingly, an object of the present invention is to provide a method for manufacturing a multilayer wiring board which has excellent circuit adhesion and can extremely effectively prevent penetration of an inner layer circuit by laser processing.

In accordance with one aspect of the present invention, there is provided a method for manufacturing a multilayer wiring board, comprising: (a) a step of forming a 1 st laminate by sequentially laminating a 1 st insulating layer and a 2 nd metal foil on a 1 st metal foil; (b) patterning the 2 nd metal foil to form a 2 nd wiring layer; (c) a step of forming a 2 nd laminate by sequentially laminating a 2 nd insulating layer and a 3 rd metal foil on the 1 st laminate on which the 2 nd wiring layer is formed; (d) a step of forming a 1 st via hole penetrating the 1 st metal foil and the 1 st insulating layer to reach the 2 nd wiring layer and a 2 nd via hole penetrating the 3 rd metal foil and the 2 nd insulating layer to reach the 2 nd wiring layer by laser processing the 2 nd laminated body from the 1 st metal foil and the 3 rd metal foil, respectively; and (e) plating and patterning both surfaces of the 2 nd laminate so as to form an electrical connection via the 1 st via hole, the 2 nd wiring layer, and the 2 nd via hole, thereby forming a multilayer wiring board including a 1 st wiring layer adjacent to the 1 st insulating layer, a 2 nd wiring layer derived from the 2 nd metal foil, and a 3 rd wiring layer adjacent to the 2 nd insulating layer, wherein a reflectance of a laser beam having a wavelength of 10.6 μm measured by a fourier transform infrared spectrophotometer (FT-IR) is 80% or more, and a peak density Spd of 7000 pieces/mm measured in accordance with ISO25178, is set to 80% or more, with respect to at least a surface of the 2 nd metal foil facing the 1 st insulating layer²Above and 15000 pieces/mm²The following.

Drawings

Fig. 1 is a process flow chart showing initial steps (i) to (iii)) in one example of the production method of the present invention.

Fig. 2 is a process flow chart showing steps (iv) to (v)) performed subsequent to the steps shown in fig. 1, among a series of steps of the production method of the present invention.

Fig. 3 is a process flow chart showing steps (vi) to (vii)) performed subsequent to the steps shown in fig. 2 among a series of steps of the production method of the present invention.

Detailed Description

Definition of

In the following, definitions of parameters used for determining the present invention are shown.

In the present specification, "reflectance of laser light having a wavelength of 10.6 μm" means a ratio of the amount of light reflected by a sample to the amount of light reflected by a reference plate (e.g., Au deposition mirror) when the laser light having a wavelength of 10.6 μm is irradiated onto the surface of the sample (metal foil) as measured by a fourier transform infrared spectrometer (FT-IR). The reflectance of the laser beam having a wavelength of 10.6 μm can be measured under the conditions described in the examples of the present specification using a commercially available fourier transform infrared spectrometer. Further, the wavelength of a carbon dioxide laser typically used for laser processing is 10.6 μm, and thus the laser wavelength of a fourier transform infrared photometer is made 10.6 μm.

In the present specification, the "peak top density Spd" is a parameter indicating the number of peak tops per unit area measured in accordance with ISO 25178. A larger value indicates a larger number of contact points with other objects. The peak density Spd of the peak can be calculated by measuring the surface profile of a predetermined measurement area (for example, a region of 107 μm × 143 μm) on the surface of the metal foil with a commercially available laser microscope.

In the present specification, "ten-point average roughness Rz" is a parameter determined in accordance with JIS B0601-.

Method for manufacturing multilayer wiring board

The present invention relates to a method of manufacturing a multilayer wiring board. The method of the present invention comprises the following steps: (1) the method for forming the wiring layer includes (1) formation of a 1 st stacked body, (2) formation of a 2 nd wiring layer, (3) formation of a 2 nd stacked body, (4) peeling of a carrier performed as desired, (5) formation of a 1 st via hole and a 2 nd via hole, and (6) formation of a 1 st wiring layer and a 3 rd wiring layer.

Hereinafter, the steps (1) to (6) will be described with reference to fig. 1 to 3.

(1) Formation of the 1 st laminate

As shown in fig. 1 (i) and 1 (ii), a 1 st metal foil 16 is prepared, and a 1 st insulating layer 18 and a 2 nd metal foil 20 are sequentially stacked on the 1 st metal foil 16 to form a 1 st stacked body 22. The 1 st metal foil 16 may also be provided in the form of a metal foil with carrier 10. Typically, the carrier-attached metal foil 10 includes a 1 st carrier 12, a 1 st release layer 14, and a 1 st metal foil 16 in this order. Further, the 1 st carrier 12 may have a structure in which various layers are sequentially provided so as to be vertically symmetrical on both surfaces. Alternatively, the carrier-attached metal foil 10 is attached to a temporary support body (not shown) such as a prepreg on the 1 st carrier 12 side to provide rigidity. In this case, it is preferable that the metal foil with carrier 10 is attached to both surfaces of the temporary support body vertically symmetrically, the layers described later are formed to be vertically symmetrical on both surfaces of the obtained laminate, and then the temporary support body is removed together with the 1 st carrier 12. The prepreg is a generic name of a composite material obtained by impregnating a synthetic resin into a base material such as a synthetic resin plate, a glass woven fabric, a glass nonwoven fabric, or paper.

The 1 st carrier 12 is a foil or layer for supporting the 1 st metal foil 16 to improve its handling. Preferred examples of the 1 st carrier 12 include an aluminum foil, a copper foil, a stainless steel (SUS) foil, a resin film having a surface coated with a metal such as copper, a resin plate, a glass plate, and a combination thereof. The thickness of the 1 st carrier 12 is typically 5 μm or more and 250 μm or less, and preferably 9 μm or more and 200 μm or less.

The material of the 1 st peeling layer 14 is not particularly limited as long as it can peel the 1 st carrier 12. For example, the 1 st release layer 14 may be formed of a known material used for a release layer of a metal foil as a tape carrier. The 1 st release layer 14 may be either an organic release layer or an inorganic release layer, or may be a composite release layer of an organic release layer and an inorganic release layer. The thickness of the release layer is typically 1nm or more and 1 μm or less, preferably 5nm or more and 500nm or less, and more preferably 6nm or more and 100nm or less.

The 1 st metal foil 16 may have a known structure used for a metal foil for a wiring layer in the coreless lamination method. For example, the 1 st metal foil 16 may be a metal foil formed by a wet film forming method such as electroless plating and electrolytic plating, a dry film forming method such as sputtering and chemical vapor deposition, or a combination thereof. Examples of the 1 st metal foil 16 include aluminum foil, copper foil, stainless steel (SUS) foil, nickel foil, and the like, and copper foil is preferable. The copper foil may be any of a rolled copper foil and an electrolytic copper foil. The thickness of the 1 st metal foil 16 is preferably 0.1 μm or more and 12 μm or less, more preferably 0.5 μm or more and 9 μm or less, still more preferably 1 μm or more and 7 μm or less, and particularly preferably 1.5 μm or more and 5 μm or less. Within this range, it is easy to form a via hole by directly performing laser processing from the 1 st metal foil 16 in a via hole forming step to be described later. In the case where the 1 st metal foil 16 is used for forming a wiring layer, if the 1 st metal foil 16 is within the above-described thickness range, the fine circuit formability is also excellent.

The 1 st insulating layer 18 may have a known structure used for insulating layers of the coreless lamination method, and is not particularly limited. For example, the 1 st insulating layer 18 can be preferably formed by: an insulating resin material such as a prepreg or a resin sheet is laminated on the 1 st metal foil 16, and then hot press molding is performed. Preferred examples of the insulating resin impregnated into the prepreg to be used include epoxy resin, cyanate resin, bismaleimide triazine resin (BT resin), polyphenylene ether resin, phenol resin, and the like. Preferred examples of the insulating resin constituting the resin sheet include epoxy resin, polyimide resin, and polyester resin. The 1 st insulating layer 18 may contain filler particles made of various inorganic particles such as silica and alumina, from the viewpoint of improving insulation properties. The thickness of the first insulating layer 18 is not particularly limited, but is preferably 1 μm or more and 100 μm or less, more preferably 5 μm or more and 40 μm or less, and further preferably 10 μm or more and 30 μm or less. The 1 st insulating layer 18 may be composed of a plurality of layers.

The 2 nd metal foil 20 has a reflectance of a laser light having a wavelength of 10.6 μm of 80% or more measured by a Fourier transform infrared spectrophotometer (FT-IR) on at least a surface thereof facing the 1 st insulating layer 18, and a peak density Spd of 7000 peaks/mm measured in accordance with ISO25178²Above and 15000 pieces/mm²The following. By using a metal foil satisfying such a condition as the inner layer metal foil (i.e., the 2 nd metal foil 20) and manufacturing the multilayer wiring board, it is possible to extremely effectively prevent penetration of the inner layer circuit (i.e., the 2 nd wiring layer 24) by laser processing while having excellent circuit adhesion.

That is, by increasing the reflectance of the laser light having a wavelength of 10.6 μm measured by a fourier transform infrared spectrophotometer to 80% or more on the surface of the 2 nd metal foil 20 facing the 1 st insulating layer 18, the laser light used for forming the via hole can be effectively prevented from being absorbed. As a result, penetration of the 2 nd wiring layer 24 from the 2 nd metal foil 20 by laser processing can be prevented extremely effectively. It can be said that the more the surface of the 2 nd metal foil 20 is made smooth, the greater the reflectance of the laser light having the wavelength of 10.6 μm. However, when the surface of the 2 nd metal foil 20 is simply made smooth in order to increase the laser reflectance, the adhesion between the 2 nd metal foil 20 and the 1 st insulating layer 18 is reduced, and circuit peeling is likely to occur. Thus, it is not easy to achieve both of circuit adhesion and prevention of penetration of the inner layer circuit by laser processing. In contrast, in the present invention, smoothness contributing to improvement of the reflectance of laser light having a wavelength of 10.6 μm is secured on the surface of the 2 nd metal foil 20 facing the 1 st insulating layer 18, and the peak density Spd is set to be as high as 7000 pieces/mm²Above and 15000 pieces/mm²In this way, the 2 nd metal foil 20 can be surely inserted into the 1 st insulating layer 18 with a large number of contacts. As a result, it is possible to prevent penetration of the inner layer circuit by laser processing extremely effectively while ensuring high circuit adhesion.

From the above viewpoint, the 2 nd metal foilThe surface of the insulating layer 1 facing the insulating layer 18 of 20 has a reflectance of a laser beam having a wavelength of 10.6 μm, as measured by a fourier transform infrared spectrophotometer (FT-IR), of 80% or more, preferably 85% or more, more preferably 90% or more, and still more preferably 95% or more. The upper limit value is not particularly limited, and may be 100%, but is typically 98% or less. In addition, the peak density Spd of the surface of the 2 nd metal foil 20 opposite to the 1 st insulating layer 18 measured according to ISO25178 is 7000 pieces/mm²Above and 15000 pieces/mm²Preferably 10000 pieces/mm or less²Above and 15000 pieces/mm²Hereinafter, 13000 pieces/mm are more preferable²Above and 15000 pieces/mm²The following. Within the above preferred range, it is possible to more effectively prevent the penetration of the 2 nd wiring layer 24 during laser processing while still further ensuring high circuit adhesion.

The ten-point average roughness Rz of the surface of the 2 nd metal foil 20 facing the 1 st insulating layer 18 is preferably 0.2 μm or more and 2.0 μm or less, more preferably 0.5 μm or more and 1.8 μm or less, and still more preferably 0.8 μm or more and 1.5 μm or less. Within such a range, the fine circuit formability can be further improved.

The laser reflectance of 10.6 μm wavelength, the peak density Spd, and the ten-point average roughness Rz in the above-described range on the surface of the 2 nd metal foil 20 facing the 1 st insulating layer 18 can be achieved by roughening the surface of the copper foil under known or desired conditions. Therefore, the surface of the 2 nd metal foil 20 facing the 1 st insulating layer 18 is preferably a rough surface. Further, a commercially available copper foil having a surface satisfying the above conditions can be selectively obtained.

The 2 nd metal foil 20 may be a metal foil formed by a wet film forming method such as electroless plating or electrolytic plating, a dry film forming method such as sputtering or chemical vapor deposition, or a combination thereof. Examples of the 2 nd metal foil 20 include an aluminum foil, a copper foil, a stainless steel (SUS) foil, and the like, and a copper foil is preferable. The copper foil may be any of a rolled copper foil and an electrolytic copper foil. The thickness of the 2 nd metal foil 20 is preferably 0.1 μm or more and 12 μm or less, more preferably 1 μm or more and 9 μm or less, and further preferably 5 μm or more and 7 μm or less. Within such a range, it is extremely suitable for forming a fine circuit. The 2 nd metal foil 20 may be provided in the form of a carrier-attached metal foil including a 2 nd carrier (not shown), a 2 nd release layer (not shown), and the 2 nd metal foil 20 in this order, and in this case, the 2 nd carrier may be released from the 1 st stacked body 22 after the 2 nd metal foil 20 is stacked on the 1 st insulating layer 18 and before the 2 nd wiring layer 24 is formed. The structures of the 2 nd carrier and the 2 nd release layer are not particularly limited as long as they are standard structures of the 1 st carrier 12 and the 1 st release layer 14, respectively.

(2) Formation of the 2 nd Wiring layer

As shown in fig. 1 (iii), the 2 nd wiring layer 24 is formed by patterning the 2 nd metal foil 20. Patterning may be performed by a known method. A preferred circuit forming method includes a method of forming the 2 nd wiring layer 24 by using the 2 nd metal foil 20 as it is or a method of forming the 2 nd wiring layer 24 by using the 2 nd metal foil 20 as a part, and more preferably a method of forming the 2 nd wiring layer 24 by using the 2 nd metal foil 20 as it is without plating the 2 nd metal foil 20. A preferable example of a method capable of forming such a circuit is a subtractive method. As an example of circuit formation by the subtractive method, first, a dry film is pasted on the surface of the 2 nd metal foil 20, and exposure and development are performed in a predetermined pattern to form a resist coating (not shown). Next, the metal exposed from the resist is removed by treatment with an etching solution capable of dissolving the metal constituting the 2 nd metal foil 20, and then the resist is peeled off, whereby the 2 nd wiring layer 24 can be formed.

Preferably, the step of forming the 2 nd wiring layer 24 further includes a step of performing an inner layer process on the 2 nd wiring layer 24. The inner layer treatment preferably includes roughening treatment such as CZ treatment, which can be preferably performed by: the surface of the 2 nd wiring layer 24 is roughened finely by using an organic acid-based microetching agent (for example, product number CZ-8101, manufactured by MEC corporation). In this way, the fine irregularities are formed on the surface of the 2 nd wiring layer 24, and the adhesion between the 2 nd wiring layer 24 and the 2 nd insulating layer 26 in the step of forming the 2 nd stacked body, which will be described later, can be improved.

The thickness of the 2 nd wiring layer 24 is preferably 3 μm or more and 12 μm or less, more preferably 5 μm or more and 10 μm or less, and further preferably 5 μm or more and 8 μm or less. Within such a range, it is extremely advantageous to reduce the thickness required for the multilayer printed wiring board. In addition, according to the method of the present invention, penetration accompanying laser processing can be effectively prevented even when the thickness of the 2 nd wiring layer 24 is thin as described above. Further, in the case where the above-described inner layer processing is performed on the 2 nd wiring layer 24, it is desirable that the thickness of the 2 nd wiring layer 24 after the inner layer processing is within the above-described range.

(3) Formation of 2 nd laminate

As shown in fig. 2 (iv), a 2 nd insulating layer 26 and a 3 rd metal foil 28 are stacked on the 1 st stacked body 22 on which the 2 nd wiring layer 24 is formed, to form a 2 nd stacked body 30. Thus, the 2 nd wiring layer 24 becomes an inner layer circuit buried between the 1 st insulating layer 18 and the 2 nd insulating layer 26. The structures of the 2 nd insulating layer 26 and the 3 rd metal foil 28 may be standardized for the 1 st insulating layer 18 and the 1 st metal foil 16, respectively. Thus, the preferred aspects associated with metal 1 foil 16 and insulating layer 1 18 also apply directly to metal 3 foil 28 and insulating layer 2 26, respectively. The 3 rd metal foil 28 may be provided as a carrier-attached metal foil including a 3 rd carrier (not shown), a 3 rd release layer (not shown), and the 3 rd metal foil 28 in this order. The structures of the 3 rd carrier and the 3 rd release layer are not particularly limited as long as they are structures based on the 1 st carrier 12 and the 1 st release layer 14.

The reflectance of the surface of the 2 nd wiring layer 24 facing the 2 nd insulating layer 26 with laser light having a wavelength of 10.6 μm measured by a fourier transform infrared spectrophotometer (FT-IR) is preferably 80% or more, more preferably 85% or more, further preferably 90% or more, and particularly preferably 95% or more. The upper limit value is not particularly limited, and may be 100%, but is typically 98% or less. In addition, the peak density Spd of the peak of the 2 nd wiring layer 24 on the surface opposite to the 2 nd insulating layer 26 measured in accordance with ISO25178 is preferably 7000 pieces/mm²The aboveAnd 15000 pieces/mm²Hereinafter, more preferably 10000 pieces/mm²Above and 15000 pieces/mm²Hereinafter, 13000 pieces/mm are more preferable²Above and 15000 pieces/mm²The following. Within this range, high adhesion between the 2 nd wiring layer 24 and the 2 nd insulating layer 26 can be ensured, and penetration of the 2 nd wiring layer 24 can be prevented even when laser processing is performed from the 3 rd metal foil 28. The surface of the 2 nd metal foil 20 may be provided with a laser reflectance of 10.6 μm in wavelength and a peak density Spd in the above range on the surface of the 2 nd wiring layer 24 facing the 2 nd insulating layer 26 in advance, but may be provided with the surface of the 2 nd wiring layer 24 after the inner layer treatment (for example, roughening treatment such as CZ treatment). Therefore, the surface of the 2 nd wiring layer 24 facing the 2 nd insulating layer 26 is preferably a rough surface.

Preferably, the thickness T of the 1 st metal foil 16₁Thickness T relative to 2 nd wiring layer 24₂Ratio of (A to (B))₁/T₂Is 0.23 or more, and/or the thickness T of the 3 rd metal foil 28₃Thickness T relative to 2 nd wiring layer 24₂Ratio of (A to (B))₃/T₂Is 0.23 or more. More preferably, T is₁/T₂And T₃/T₂Both of which are 0.23 or more. In the present invention, since the 2 nd wiring layer 24 derived from the 2 nd metal foil 20 has a surface that is difficult to absorb laser light, even if the 2 nd metal foil 20 is extremely thinned so as to satisfy the above range, damage of the 2 nd wiring layer 24 as an inner layer circuit due to laser processing can be suppressed. T is₁/T₂And/or T₃/T₂Preferably 1.0 or less, more preferably 0.50 or less, and further preferably 0.33 or less. In the case where the metal foil or the wiring layer is subjected to surface treatment (i.e., the thickness of the metal foil or the wiring layer is changed) before the laser processing is performed, T is set as described above₁、T₂And T₃The thickness of the 1 st metal foil 16, the thickness of the 2 nd wiring layer 24, and the thickness of the 3 rd metal foil 28 after the surface treatment are referred to, respectively. For example, in the case where the above-described inner layer processing is performed on the 2 nd wiring layer 24, T is₂The thickness of the 2 nd wiring layer 24 after the inner layer processing.

(4) Peeling off the Carrier (optional Process)

When the 1 st metal foil 16 and/or the 3 rd metal foil 28 are provided in the form of carrier-attached metal foils, the 1 st carrier 12 and/or the 3 rd carrier (not shown) are peeled off from the 2 nd laminate 30 as shown in fig. 2 (v). In this way, laser processing can be performed from the 1 st metal foil 16 and the 3 rd metal foil 28, respectively, in the step of forming the 1 st via hole and the 2 nd via hole, which will be described later. In addition, since the rigidity of the 2 nd stacked body 30 is increased by the 1 st insulating layer 18 and the 2 nd insulating layer 26, sufficient handleability can be ensured even in a state where the carrier is peeled off. In addition, when the metal foil with carrier is attached to a temporary support (not shown) such as a prepreg as described above, the temporary support is removed from the 2 nd laminate 30 together with the 1 st carrier 12 and/or the 3 rd carrier (not shown).

(5) Formation of 1 st and 2 nd via holes

As shown in fig. 3 (vi), the 2 nd stacked body 30 is laser-processed from the 1 st metal foil 16 and the 3 rd metal foil 28, respectively, to form a 1 st via hole 32 penetrating the 1 st metal foil 16 and the 1 st insulating layer 18 to reach the 2 nd wiring layer 24, and a 2 nd via hole 34 penetrating the 3 rd metal foil 28 and the 2 nd insulating layer 26 to reach the 2 nd wiring layer 24. For laser processing, various lasers such as a carbon dioxide laser, an excimer laser, a UV laser, and a YAG laser can be used, and a carbon dioxide laser is particularly preferably used. With the method of the present invention, it is possible to extremely effectively prevent the penetration of the 2 nd wiring layer 24 by laser processing in the via hole forming step.

In the step of forming the 1 st via hole and the 2 nd via hole, it is preferable that the step of removing the resin residue (smear (japanese: スミア)) at the bottom of the via hole, which is generated when the via hole is formed by laser processing, further includes a smear removal step using at least one of a chromate solution and a permanganate solution. The desmear step is a treatment in which treatments such as a swelling treatment, a chromic acid treatment, a permanganic acid treatment, and a reduction treatment are sequentially performed, and a known wet process can be employed. An example of the chromate is potassium chromate. Examples of the permanganate include sodium permanganate and potassium permanganate. In particular, permanganate is preferably used from the viewpoint of reduction of environmental load substances in the desmear treatment liquid, electrolytic regenerability, and the like.

The diameter of the 1 st via hole 32 and the diameter of the 2 nd via hole 34 are both preferably 30 μm or more and 80 μm or less, more preferably 30 μm or more and 60 μm or less, and still more preferably 30 μm or more and 40 μm or less. Within such a range, it is extremely advantageous for the multilayer printed wiring board to have a high density. In order to form a via hole having a small diameter as described above, it is desirable to reduce the beam diameter (spot diameter) of the laser beam. In this case, since the energy of the laser light is likely to be concentrated on the laser light irradiated portion of the 2 nd wiring layer 24, it can be said that the penetration of the 2 nd wiring layer 24 is likely to occur originally. In this regard, according to the method of the present invention, since the 2 nd wiring layer 24 derived from the 2 nd metal foil 20 has a surface that hardly absorbs laser light, penetration of the 2 nd wiring layer 24 can be effectively prevented even when the energy of laser light is concentrated.

(6) Formation of 1 st and 3 rd wiring layers

As shown in fig. 3 (vii), plating and patterning are performed for both sides of the 2 nd stacked body 30 in such a manner as to form electrical connection via the 1 st via hole 32, the 2 nd wiring layer 24, and the 2 nd via hole 34, thereby forming a multilayer wiring board 42, the multilayer wiring board 42 including the 1 st wiring layer 38 adjacent to the 1 st insulating layer 18, the 2 nd wiring layer 24 derived from the 2 nd metal foil 20, and the 3 rd wiring layer 40 adjacent to the 2 nd insulating layer 26. The 1 st wiring layer 38 is typically a layer derived from the 1 st metal foil 16, and typically contains a metal derived from the 1 st metal foil 16, but the 1 st wiring layer 38 may also be formed as a new wiring layer (containing no metal derived from the 1 st metal foil 16) that inherits only the surface profile of the 1 st metal foil 16. Likewise, whereas 3 rd wiring layer 40 is typically a layer derived from 3 rd metal foil 28, typically containing metal derived from 3 rd metal foil 28, 3 rd wiring layer 40 may also be formed as a new wiring layer (not containing metal derived from 3 rd metal foil 28) that inherits only the surface profile of 3 rd metal foil 28. The method for forming the 1 st wiring layer 38 and the 3 rd wiring layer 40 is not particularly limited, and known methods such as a subtractive method, an MSAP (modified semi-additive) method, and an SAP (semi-additive) method can be used. Here, fig. 3 (vii) shows circuit formation by the MSAP method. As an example of circuit formation by the MSAP method, first, photoresist layers (not shown) are formed in a predetermined pattern on the surfaces of the 1 st metal foil 16 and the 3 rd metal foil 28. The photoresist layer is preferably a photosensitive film, and in this case, a predetermined wiring pattern may be provided to the photoresist layer by exposure and development. Next, plating layers 36 are formed on the exposed surfaces of the 1 st metal foil 16 and the 3 rd metal foil 28 (i.e., the portions not masked by the photoresist layer), and the 1 st via hole 32 and the 2 nd via hole 34. At this time, since the 1 st via hole 32 and the 2 nd via hole 34 are filled with the plating metal, both surfaces of the 2 nd laminated body 30 are electrically connected via the 1 st via hole 32, the 2 nd wiring layer 24, and the 2 nd via hole 34. The plating is not particularly limited as long as it is carried out by a known method. After the photoresist layer is stripped, the 1 st metal foil 16, the 3 rd metal foil 28, and the plating layer 36 are subjected to etching processing, whereby a multilayer wiring board 42 in which the 1 st wiring layer 38 and the 3 rd wiring layer 40 are formed can be obtained.

A build-up wiring layer may be further formed on the multilayer wiring board 42. That is, by alternately arranging insulating layers and wiring layers including wiring patterns on the multilayer wiring board 42, a multilayer wiring board formed up to the n-th wiring layer (n is an integer of 4 or more, preferably an odd number of 5, 7, 9, or the like) can be obtained. This process may be repeated until a desired number of build-up wiring layers are formed. Further, if necessary, bumps for mounting such as solder resist layers and posts may be formed on the outer layer surface.