阅读说明：本技术 半导体装置及其制造方法 (Semiconductor device and method for manufacturing the same ) 是由 河面英夫 白泽敬昭 荒木慎太郎 木本信义 王丸武志 于 2017-12-01 设计创作，主要内容包括：本发明的目的在于提供能够抑制尺寸公差的影响的半导体装置及其制造方法。本发明涉及的半导体装置具有：多个冷却板(1),它们各自在内部具有冷媒通路(11)；间隔件(5),其使各冷却板(1)分离地层叠；半导体封装件(2),其设置于至少1个冷却板(1)的至少1个主面之上；以及弹簧板(4),其设置于相邻的冷却板(1)之间,将半导体封装件(2)向冷却板(1)侧预紧。(The invention provides a semiconductor device and a method for manufacturing the same, which can suppress the influence of dimensional tolerance. The semiconductor device according to the present invention includes: a plurality of cooling plates (1) each having a refrigerant passage (11) therein; a spacer (5) that separately stacks the cooling plates (1); a semiconductor package (2) provided on at least 1 main surface of at least 1 cooling plate (1); and spring plates (4) that are provided between adjacent cooling plates (1) and that bias the semiconductor packages (2) toward the cooling plates (1).)

1. A semiconductor device, comprising:

a plurality of cooling plates (1) each having a refrigerant passage (11) therein;

a spacer (5) that separately stacks the cooling plates (1);

a semiconductor package (2) provided on at least 1 main surface of at least 1 of the cooling plates (1); and

and spring plates (4) that are provided between the adjacent cooling plates (1) and that bias the semiconductor packages (2) toward the cooling plates (1).

2. The semiconductor device according to claim 1,

at least 1 of the cooling plates (1) has the refrigerant passage (11) in the stacking direction and in a direction perpendicular to the stacking direction.

3. The semiconductor device according to claim 1 or 2,

the uppermost and lowermost cooling plates (1) of the stack of cooling plates (1) have higher rigidity than the other cooling plates (1).

4. The semiconductor device according to any one of claims 1 to 3,

the semiconductor package (2) includes a 2-in-1 package having an upper arm circuit and a lower arm circuit.

5. The semiconductor device according to any one of claims 1 to 3,

the semiconductor package (2) includes a 1-in-1 package having either an upper arm circuit or a lower arm circuit.

6. The semiconductor device according to any one of claims 1 to 5,

for at least 1 of the cooling plates (1), a plurality of the semiconductor packages (2) are provided over at least 1 main surface of the cooling plate (1).

7. The semiconductor device according to any one of claims 1 to 6,

the number of stacked cooling plates (1) is variable.

8. The semiconductor device according to any one of claims 1 to 7,

the semiconductor package (2) has an insulating layer inside.

9. The semiconductor device according to any one of claims 1 to 7,

an insulating substrate is further provided between the semiconductor package (2) and the cooling plate (1).

10. The semiconductor device according to any one of claims 1 to 9,

the spring plate (4) is corrugated.

11. The semiconductor device according to claim 10,

the spring plate (4) is arranged such that the direction in which the corrugations are formed is parallel to the stacking direction.

12. The semiconductor device according to claim 10,

the spring plate (4) is arranged such that the direction in which the corrugations are formed is perpendicular to the stacking direction.

13. The semiconductor device according to any one of claims 1 to 12,

the semiconductor packages (2) are provided in plurality in the stacking direction,

the main terminals of the semiconductor packages (2) are aligned in the stacking direction.

14. The semiconductor device according to any one of claims 1 to 13,

the cooling plate (1) has a recess (14) on the surface on which the semiconductor package (2) is disposed, and the recess (14) is used for disposing the grease (3).

15. The semiconductor device according to any one of claims 1 to 14,

the cooling plate (1) has ribs (15).

16. The semiconductor device according to any one of claims 1 to 15,

and a pipe (6) for supplying a refrigerant to the refrigerant passage (11) of each cooling plate (1).

17. The semiconductor device according to any one of claims 1 to 16,

the semiconductor package (2) has a semiconductor element containing SiC as a main component.

18. The semiconductor device according to any one of claims 1 to 17,

at least 1 of the cooling plates (1) has the refrigerant passage (11) in the stacking direction, and does not have the refrigerant passage (11) in a direction perpendicular to the stacking direction.

19. The semiconductor device according to any one of claims 1 to 18,

the semiconductor package (2) has a projection (16) that defines the position where the spring plate (4) is disposed.

20. The semiconductor device according to any one of claims 1 to 19,

each cooling plate (1) has a recess (18) or a projection (17) that defines the position where the semiconductor package (2) is disposed.

21. A method for manufacturing a semiconductor device according to claim 1,

the method for manufacturing a semiconductor device comprises the following steps:

(a) preparing a plurality of cooling plates (1) including at least 1 cooling plate (1) in which the semiconductor package (2) is provided on at least 1 main surface; and

(b) the spring plate (4) is disposed on the semiconductor package (2), and the plurality of cooling plates (1) are stacked with the spacer (5) therebetween.

Technical Field

The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly, to a structure of a semiconductor device used in a power control apparatus or the like and a method for manufacturing the same.

Background

Currently, a semiconductor device is disclosed, which has: a plurality of cooling pipes having a refrigerant passage therein; a semiconductor package fixed to one main surface of each cooling tube; a seal spacer for stacking a plurality of cooling tubes into a cooling structure in a separate plate shape, and for maintaining airtightness at an end of the cooling structure; and headers (headers) provided at one end and the other end of the cooling structure, the headers hermetically connecting one opening through which the refrigerant enters and exits the cooling tubes to the seal spacer (see, for example, patent document 1).

Patent document 1: japanese patent laid-open publication No. 2013 and 26368

Disclosure of Invention

In patent document 1, when a semiconductor device is assembled, there is a possibility that the cooling pipe is deformed under the influence of dimensional tolerances of the respective components constituting the semiconductor device.

The present invention has been made to solve the above-described problems, and an object thereof is to provide a semiconductor device and a method for manufacturing the same, which can suppress the influence of dimensional tolerance.

In order to solve the above problem, a semiconductor device according to the present invention includes: a plurality of cooling plates each having a refrigerant passage therein; a spacer that stacks the cooling plates separately; a semiconductor package disposed over at least 1 major surface of at least 1 cooling plate; and a spring plate provided between the adjacent cooling plates, and biasing the semiconductor package toward the cooling plate side.

ADVANTAGEOUS EFFECTS OF INVENTION

According to the present invention, a semiconductor device includes: a plurality of cooling plates each having a refrigerant passage therein; a spacer that stacks the cooling plates separately; a semiconductor package disposed over at least 1 major surface of at least 1 cooling plate; and a spring plate provided between the adjacent cooling plates to bias the semiconductor package toward the cooling plate side, whereby an influence of dimensional tolerance can be suppressed.

The objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description and the accompanying drawings.

Drawings

Fig. 1 is a diagram showing an example of the structure of a semiconductor device according to an embodiment of the present invention.

Fig. 2 is a diagram showing an example of the structure of a semiconductor device according to an embodiment of the present invention.

Fig. 3 is a diagram showing an example of a cooling plate according to an embodiment of the present invention.

Fig. 4 is a cross-sectional view showing an example of a cooling plate according to an embodiment of the present invention.

Fig. 5 is a diagram showing an example of a semiconductor package according to an embodiment of the present invention.

Fig. 6 is a diagram showing an example of a spring plate according to the embodiment of the present invention.

Fig. 7 is a diagram showing an example of a spacer according to the embodiment of the present invention.

Fig. 8 is a diagram showing an example of a cover according to the embodiment of the present invention.

Fig. 9 is a diagram showing an example of a pipe according to the embodiment of the present invention.

Fig. 10 is a diagram showing an example of a manufacturing process of a semiconductor device according to an embodiment of the present invention.

Fig. 11 is a diagram showing an example of a manufacturing process of a semiconductor device according to an embodiment of the present invention.

Fig. 12 is a diagram showing an example of a manufacturing process of a semiconductor device according to an embodiment of the present invention.

Fig. 13 is a diagram showing an example of a manufacturing process of a semiconductor device according to an embodiment of the present invention.

Fig. 14 is a diagram showing an example of a manufacturing process of a semiconductor device according to an embodiment of the present invention.

Fig. 15 is a diagram showing an example of a manufacturing process of a semiconductor device according to an embodiment of the present invention.

Fig. 16 is a diagram showing an example of the structure of a semiconductor device according to an embodiment of the present invention.

Fig. 17 is a diagram showing an example of the structure of a semiconductor device according to an embodiment of the present invention.

Fig. 18 is a diagram showing an example of the structure of a semiconductor device according to an embodiment of the present invention.

Fig. 19 is a diagram showing an example of the structure of a semiconductor device according to an embodiment of the present invention.

Fig. 20 is a diagram showing an example of the structure of a semiconductor device according to an embodiment of the present invention.

Fig. 21 is a diagram showing an example of the structure of a semiconductor device according to an embodiment of the present invention.

Fig. 22 is a diagram showing an example of the arrangement of the spring plate according to the embodiment of the present invention.

Fig. 23 is a diagram showing an example of arrangement of the spring plate according to the embodiment of the present invention.

Fig. 24 is a diagram showing an example of the structure of a semiconductor device according to an embodiment of the present invention.

Fig. 25 is a diagram showing an example of a cooling plate according to the embodiment of the present invention.

Fig. 26 is a diagram showing an example of a cooling plate according to the embodiment of the present invention.

Fig. 27 is a diagram showing an example of the structure of a semiconductor device according to an embodiment of the present invention.

Fig. 28 is a diagram showing an example of a semiconductor package according to an embodiment of the present invention.

Fig. 29 is a diagram showing an example of a cooling plate according to the embodiment of the present invention.

Fig. 30 is a view showing an example of a cooling plate according to the embodiment of the present invention.

Detailed Description

Embodiments of the present invention will be described below with reference to the drawings.

< embodiment >

< Structure >

Fig. 1 and 2 are diagrams showing an example of the structure of a semiconductor device according to an embodiment of the present invention.

As shown in fig. 1 and 2, the semiconductor device includes a cooling plate 1, a semiconductor package 2, a heat-dissipating grease 3, a spring plate 4, a spacer 5, a tube 6, a cap 7, a screw 8, and a nut 9.

As shown in fig. 3 and 4, the cooling plate 1 has screw holes 10 through which the screws 8 are inserted, and a refrigerant passage 11 through which a refrigerant such as water flows. Specifically, the cooling plate 1 has a refrigerant passage 11 in the stacking direction of the cooling plates 1 and in the direction perpendicular to the stacking direction. The cooling medium passage 11 is provided with cooling fins 13 for improving cooling efficiency. An O-ring 12 is provided in the threaded hole 10. In the example of fig. 1 and 2, 5 cooling plates 1 are stacked at intervals. The uppermost and lowermost cooling plates 1 among the cooling plates 1 need to have higher rigidity than the other cooling plates 1 in order to prevent deformation when the nuts 9 are fastened to the screws 8. For example, the material of the uppermost and lowermost cooling plates 1 is an aluminum alloy, and the material of the other cooling plates 1 is thin pure aluminum. By using these materials, thermal resistance suitable for cooling the semiconductor package 2 can be obtained.

As shown in fig. 5, the semiconductor package 2 is a 2-in-1 molded power module having an igbt (insulated Gate bipolar transistor) and a fwd (free Wheeling diode) therein. That is, the semiconductor package 2 is a 2-in-1 package having an upper arm circuit and a lower arm circuit. The semiconductor package 2 is disposed on the cooling plate 1 via the heat dissipating grease 3. The heat dissipating grease 3 has a function of dissipating heat generated in the semiconductor package 2 to the cooling plate 1. In the example of fig. 1 and 2, the semiconductor package 2 is provided on the lower surface of the cooling plate 1 on the uppermost layer, and the semiconductor package 2 is provided on the lowermost layer and the upper surface of the cooling plate 1 on the 2 nd layer from the lowermost layer. Further, semiconductor packages 2 are provided on both surfaces of the other cooling plate 1.

The spring plate 4 is provided between the adjacent cooling plates 1, and biases the semiconductor package 2 toward the cooling plates 1. In the example of fig. 1 and 2, the spring plate 4 is provided between the cooling plate 1 and the semiconductor package 2 at the 2 nd layer from the lowermost layer, and the spring plate 4 is provided between the semiconductor packages 2. The spring plate 4 is shaped as shown in fig. 6, in a corrugated shape.

As shown in fig. 7, the spacer 5 has a screw hole 10 and a refrigerant passage 11. The spacers 5 are provided to separate the adjacent cooling plates 1. That is, the spacers 5 are provided to separately stack the cooling plates 1.

As shown in fig. 8, the cover 7 has a screw hole 10, and the cover 7 closes a refrigerant passage 11 provided in the cooling plate 1. As shown in fig. 9, the pipe 6 has a screw hole 10 and a refrigerant passage 11, and the pipe 6 functions as an inlet or an outlet of the refrigerant. In the example of fig. 1 and 2, if the refrigerant flows in from one pipe 6, the refrigerant passes through the refrigerant passage of the cooling plate 1 and the spacer 5, and flows out from the other pipe 6. This can effectively reduce heat generated in the semiconductor package 2.

The bolts 8 are inserted through the bolt holes 10 of the pipe 6, the cooling plate 1, the spacer 5, and the cover 7, and tightened by nuts 9, thereby fixing the pipe 6, the cooling plate 1, the spacer 5, and the cover 7.

< manufacturing method >

Fig. 10 to 15 are views showing an example of a manufacturing process of the semiconductor device according to the present embodiment.

As shown in fig. 10, a semiconductor package 2 is provided on the upper surface of the cooling plate 1 via a heat dissipating grease 3. Next, as shown in fig. 11, the pipe 6 is provided on the lower surface of the cooling plate 1, and the screw 8 is inserted through the screw hole 10 of the cooling plate 1 and the pipe 6.

Next, as shown in fig. 12, the spring plate 4 is disposed over the semiconductor package 2. Further, the spacer 5 is set on the cooling plate 1 by inserting the screw 8 through the screw hole 10 of the spacer 5.

Next, as shown in fig. 13, the semiconductor package 2 is provided on the upper surface of the cooling plate 1 via the heat dissipating grease 3. Then, screws 8 are inserted through screw holes 10 of cooling plate 1, and cooling plate 1 is placed on spacers 5 and spring plates 4. Thereafter, the spring plate 4 is disposed over the semiconductor package 2. Further, the spacer 5 is set on the cooling plate 1 by inserting the screw 8 through the screw hole 10 of the spacer 5.

Next, the semiconductor package 2 is provided on both surfaces of the cooling plate 1 via the heat dissipating grease 3. Then, screws 8 are inserted through screw holes 10 of cooling plate 1, and cooling plate 1 is placed on spacers 5 and spring plates 4. Thereafter, the spring plate 4 is disposed over the semiconductor package 2. Further, the spacer 5 is set on the cooling plate 1 by inserting the screw 8 through the screw hole 10 of the spacer 5. This operation was repeated 2 times.

Next, the semiconductor package 2 is provided on the lower surface of the cooling plate via the heat dissipating grease 3. Then, screws 8 are inserted through screw holes 10 of cooling plate 1, and cooling plate 1 is placed on spacers 5 and spring plates 4. After the processes up to this point, the state shown in fig. 14 is achieved.

Next, as shown in fig. 15, screws 8 are inserted through the screw holes 10 of the cover 7, and the cover 7 is provided on the upper surface of the cooling plate 1. Finally, the nut 9 is fastened to the end of the screw 8. Thereby, the pipe 6, the cooling plate 1, the spacer 5, and the cover 7 are fixed. At this time, the refrigerant passage 11 of the cooling plate 1 is joined to the refrigerant passage 11 of the spacer 5 via the O-ring 12. By tightening the nut 9, pressure is applied to the O-ring 12, and airtightness of the refrigerant passage 11 at the joint between the cooling plate 1 and the spacer 5 can be ensured.

Through the above manufacturing steps, the semiconductor device having the stacked structure shown in fig. 1 and 2 is completed. In the example of fig. 1 and 2, the semiconductor device is a 14-in-1 semiconductor device having 2 elements constituting the boost converter, 6 elements constituting the regenerative inverter, and 6 elements constituting the traction inverter.

As described above, according to the present embodiment, since the spring plate 4 is provided between the adjacent cooling plates 1, the influence of the dimensional tolerance of the semiconductor devices of the stacked structure can be suppressed.

< modification example >

A modified example of the semiconductor device according to this embodiment will be described below.

< modification 1 >

In fig. 1 and 2, the case where the semiconductor package 2 is a 2-in-1 package having an upper arm circuit and a lower arm circuit is described, but the present invention is not limited thereto.

For example, as shown in fig. 16, the semiconductor package 2 may be a 1-in-1 package having either an upper arm circuit or a lower arm circuit. As described above, the structure of the semiconductor package 2 can be arbitrarily selected.

< modification 2 >

The number of semiconductor packages 2 provided on cooling plate 1 may be 1 or more. For example, as shown in fig. 17, a 2-in-1 semiconductor device constituting the boost converter can be realized by providing 1 semiconductor package 2 on the cooling plate 1. As shown in fig. 18, 3 semiconductor packages 2 are provided on the cooling plate 1, whereby a 6-in-1 semiconductor device constituting a traction inverter or a regenerative inverter can be realized. As shown in fig. 19, a 12-in-1 semiconductor device constituting a traction inverter and a regenerative inverter can be realized by providing 3 semiconductor packages 2 on the upper surface of the lower cooling plate 1 and 3 semiconductor packages 2 on the lower surface of the upper cooling plate 1. As described above, the structure of the semiconductor package 2 and the method of disposing the same on the cooling plate 1 can be arbitrarily selected.

In fig. 17 to 19, the case where 2 cooling plates 1 are stacked has been described, but the present invention is not limited to this. For example, the structure of fig. 17 and the structure of fig. 18 may be stacked, or the structure of fig. 17 and the structure of fig. 19 may be stacked.

< modification 3 >

The number of layers of the semiconductor packages 2 can be freely selected. In other words, the number of stacked cooling plates 1 may be variable. For example, as shown in fig. 20, a 6-in-1 semiconductor device constituting a traction inverter or a regenerative inverter can be realized. In addition, as shown in fig. 21, a 12-in-1 semiconductor device constituting a traction inverter and a regenerative inverter can be realized.

< modification 4 >

The semiconductor package 2 may have an insulating layer such as an insulating sheet therein. This enables the semiconductor package 2 to be insulated from the cooling plate 1.

Further, an insulating substrate may be provided outside the semiconductor package 2, that is, between the semiconductor package 2 and the cooling plate 1. This enables the semiconductor package 2 to be insulated from the cooling plate 1.

< modification 5 >

The configuration of the spring plate 4 is arbitrary. For example, as shown in fig. 22, the spring plate 4 may be arranged so that the direction in which the corrugations are formed is perpendicular to the stacking direction of the cooling plates 1. As shown in fig. 23, the spring plate 4 may be arranged so that the direction in which the corrugations are formed is parallel to the stacking direction of the cooling plates 1.

< modification 6 >

As shown in fig. 24, the semiconductor package 2 can use a semiconductor package in which the arrangement of the main terminals is a mirror image type. By combining the mirror-image type semiconductor packages 2, the main terminals of the respective semiconductor packages 2 can be aligned in the stacking direction, and therefore the arrangement of the main terminals between the respective semiconductor packages 2 can be optimized.

< modification 7 >

As shown in fig. 25, the cooling plate 1 may have a recess 14. That is, the cooling plate 1 may have a concave portion 14 on the surface where the semiconductor package 2 is provided, and the concave portion 14 may be provided with the heat dissipating grease 3. With the above configuration, the heat dissipating grease 3 can be prevented from being pumped out.

< modification 8 >

As shown in fig. 26, the cooling plate 1 may have ribs 15. With the above configuration, the mechanical strength of the cooling plate 1 can be improved.

< modification 9 >

As shown in fig. 27, the position of the tube 6 can be changed arbitrarily. In the example of fig. 27, the refrigerant flows into the lower pipe 6 and flows out of the upper pipe 6. With the above configuration, the refrigerant passage can be arbitrarily selected.

< modification 10 >

The semiconductor package 2 may have a semiconductor element mainly composed of SiC. The main component is a component whose existing ratio is more prominent than that of the non-main component as a whole, and is present in a ratio of several tens times or more than that of the non-main component.

< modification 11 >

The cooling plate 1 may have the refrigerant passage 11 in the stacking direction and may not have the refrigerant passage 11 in the direction perpendicular to the stacking direction. Specifically, in fig. 4, the refrigerant passage 11 is not provided in the portion where the cooling fin 13 is provided. In this case, the cooling plate 1 is made of a material having high rigidity such as iron. The cooling plate 1 may be a part of the plurality of stacked cooling plates 1.

By adopting the above-described structure, the mechanical strength of the stacked structure can be increased.

< modification example 12 >

As shown in fig. 28, the semiconductor package 2 may have a bump 16 that defines the installation position of the spring plate 4. The convex portion 16 is formed at the time of transfer molding of the semiconductor package 2. With the above configuration, the spring plate 4 can be positioned.

< modification example 13 >

As shown in fig. 29, the cooling plate 1 may have a projection 17 that defines the installation position of the semiconductor package 2. As shown in fig. 30, the cooling plate 1 may have a recess 18 that defines the installation position of the semiconductor package 2.

With the above configuration, the semiconductor package 2 can be positioned.

In addition, the present invention can be modified and omitted as appropriate from the embodiments within the scope of the invention.

The present invention has been described in detail, but the above description is illustrative in all aspects, and the invention is not limited thereto. It is understood that numerous modifications, not illustrated, can be devised without departing from the scope of the invention.

Description of the reference numerals

Cooling plate 1, semiconductor package 2, heat sink grease 3, spring plate 4, spacer 5, tube 6, cap 7, screw 8, nut 9, screw hole 10, coolant channel 11, O-ring 12, cooling fin 13, recess 14, rib 15, boss 16, boss 17, recess 18.