阅读说明：本技术 功率半导体模块装置、衬底装置及其生产方法
(Power semiconductor module device, substrate device and method for producing the same
) 是由 O·霍尔菲尔德 于 2019-09-11 设计创作，主要内容包括：本公开的实施例涉及功率半导体模块装置、衬底装置及其生产方法。一种功率半导体模块装置包括散热器(30)；衬底装置(60),其沿垂直方向布置在散热器(30)上；导热膏(40),其沿垂直方向布置在衬底装置(60)的表面(61)和散热器(30)的表面(31)之间,其中多个导热颗粒均匀地分布在导热膏(40)内；以及多个晶须或纤维(64)。多个晶须或纤维(64)中的每个晶须或纤维包括第一端和第二端,并且多个晶须或纤维(64)中的每个晶须或纤维的第一端不可分离地连接到衬底装置(60)的表面(61)或散热器(30)的表面(31)。(Embodiments of the present disclosure relate to power semiconductor module devices, substrate devices, and methods of producing the same. A power semiconductor module arrangement comprises a heat sink (30); a substrate arrangement (60) arranged on the heat sink (30) in a vertical direction; a thermally conductive paste (40) arranged in a vertical direction between a surface (61) of the substrate arrangement (60) and a surface (31) of the heat sink (30), wherein a plurality of thermally conductive particles are evenly distributed within the thermally conductive paste (40); and a plurality of whiskers or fibers (64). Each whisker or fiber of the plurality of whiskers or fibers (64) includes a first end and a second end, and the first end of each whisker or fiber of the plurality of whiskers or fibers (64) is inseparably connected to a surface (61) of the substrate arrangement (60) or a surface (31) of the heat spreader (30).)
1. A power semiconductor module device comprising:
a heat sink (30);
a substrate arrangement (60) arranged on the heat sink (30) in a vertical direction;
a thermally conductive paste (40) arranged between a surface (61) of the substrate arrangement (60) and a surface (31) of the heat sink (30) in the vertical direction, wherein a plurality of thermally conductive particles are evenly distributed within the thermally conductive paste (40); and
a plurality of whiskers or fibers (64), wherein
Each whisker or fiber of the plurality of whiskers or fibers (64) includes a first end and a second end; and
the first end of each whisker or fiber of the plurality of whiskers or fibers (64) is inseparably connected to either the surface (61) of the substrate arrangement (60) or the surface (31) of the heat sink (30).
2. The power semiconductor module arrangement according to claim 1, wherein each whisker or fiber of the plurality of whiskers or fibers (64) extends through the thermally conductive paste (40) substantially along the perpendicular direction.
3. The power semiconductor module arrangement according to claim 1 or 2, wherein
Each whisker or fiber of the plurality of whiskers or fibers (64) has a length of between 5 μm and 50 μm, or has a length of between 5 μm and 20 μm.
4. The power semiconductor module arrangement according to any of claims 1 to 3, wherein a distance (d3) between the substrate arrangement (60) and the heat sink (30) is between 20 μm and 50 μm.
5. The power semiconductor module arrangement according to any one of claims 1 to 4, wherein the whiskers or fibers (64) comprise one of: metallic materials, ceramic materials and graphene.
6. The power semiconductor module arrangement according to claim 5, wherein the whiskers or fibers (64) include at least one of: oxides, nitrides, Cu, Al, Cr, Mo, Wo and C.
7. The power semiconductor module arrangement according to any of the preceding claims, wherein the semiconductor arrangement (60) comprises a semiconductor substrate (10), and wherein the first surface (61) is a surface of the semiconductor substrate (10).
8. The power semiconductor module arrangement according to any of claims 1 to 6, wherein the substrate arrangement (60) comprises a semiconductor substrate (10), the semiconductor substrate (10) being mounted to a base plate (50); and wherein the first surface (61) is a surface of the substrate (50).
9. The power semiconductor module arrangement according to any one of the preceding claims, wherein at least a first portion of the plurality of whiskers or optical fibers (64) extends over an entire distance (d3) between the substrate arrangement (60) and the heat sink (30) such that at least the first portion of the whiskers or fibers (64) is in thermal contact with both the substrate arrangement (60) and the heat sink (30).
10. The power semiconductor module arrangement according to any of the preceding claims, wherein the thermal conductivity of the plurality of whiskers or fibers (64) is greater than the thermal conductivity of the thermally conductive paste (40).
11. A method for producing a power semiconductor module device, the method comprising:
forming a plurality of whiskers or fibers (64) on at least one of a surface (31) of a heat spreader (30) and a surface (61) of a substrate arrangement (60);
applying a thermally conductive paste (40) to one of said surface (61) of said substrate arrangement (60) and said surface (31) of said heat sink (30) so as to surround said plurality of whiskers or fibers (64) arranged on the respective said surface (31, 61), wherein a plurality of thermally conductive particles (62) are uniformly distributed within said thermally conductive paste (40);
mounting the substrate arrangement (60) to the heat sink (30), wherein the thermally conductive paste (40) and the plurality of whiskers or fibers (64) are disposed between the surface (61) of the substrate arrangement (60) and the surface (31) of the heat sink (30); wherein
Each whisker or fiber of the plurality of whiskers or fibers (64) includes a first end and a second end; and
the first end of each whisker or fiber of the plurality of whiskers or fibers (64) is inseparably connected to either the first surface (61) of the substrate arrangement (60) or the surface (31) of the heat sink (30).
12. The method of claim 11, wherein at least one of:
forming the whiskers or fibers (64) includes an electrogalvanic growth process; and
the thermally conductive paste (40) is configured to change its phase as a function of temperature, and the step of applying the thermally conductive paste (40) includes heating and liquefying the thermally conductive paste (40).
13. A substrate arrangement (60) comprising
A surface (61);
a plurality of whiskers or fibers (64) formed on the surface (61); and
a thermally conductive paste (40) disposed on the first surface (61) of the substrate arrangement (60) and surrounding the plurality of whiskers or fibers (64), wherein
A plurality of thermally conductive particles (62) uniformly distributed within the thermally conductive paste (40);
each whisker or fiber of the plurality of whiskers or fibers (64) includes a first end and a second end; and
the first end of each whisker or fiber of the plurality of whiskers or fibers (64) is inseparably connected to the surface (61) of the substrate arrangement (60).
14. A method for producing a substrate arrangement (60), the method comprising:
forming a plurality of whiskers or fibers (64) on a surface (61) of the substrate arrangement (60);
applying a thermally conductive paste (40) to the surface (61) of the substrate arrangement (60) so as to surround the plurality of whiskers or fibers (64) disposed on the surface (61), wherein a plurality of thermally conductive particles (62) are uniformly distributed within the thermally conductive paste (40); wherein the content of the first and second substances,
each whisker or fiber of the plurality of whiskers or fibers (64) includes a first end and a second end; and
the first end of each whisker or fiber of the plurality of whiskers or fibers (64) is inseparably connected to the first surface (61) of the substrate arrangement (60).
15. The method of claim 14, wherein at least one of:
forming the whiskers or fibers (64) includes an electrogalvanic growth process; and
the thermally conductive paste (40) is configured to change its phase depending on temperature, and the step of applying the thermally conductive paste (40) includes heating and liquefying the thermally conductive paste (40).
Technical Field
The present disclosure relates to a power semiconductor module device, a substrate device and a method of manufacturing the same, and more particularly, to a power semiconductor module device including a heat sink.
Background
The power semiconductor module arrangement generally comprises at least one substrate. The substrate may be disposed on the base plate. However, power semiconductor module arrangements without a substrate are also known. A semiconductor arrangement comprising a plurality of controllable semiconductor components (e.g. two IGBTs in a half-bridge configuration) is typically arranged on at least one of the at least one substrate. Each substrate typically includes a substrate layer (e.g., a ceramic layer); a first metallization layer deposited on a first side of the substrate layer; and a second metallization layer deposited on a second side of the substrate layer. For example, the controllable semiconductor component is mounted on a first metallization layer. The first metallization layer may be a structured layer and the second metallization layer is typically a continuous layer. The second metallization layer may be attached to the substrate.
The heat generated by the controllable semiconductor component is dissipated through the substrate to the base plate and/or the heat sink. Thermally conductive paste is typically disposed between the substrate and the heat sink or between the base plate and the heat sink to effectively conduct heat away from the substrate.
There is a need for an improved power semiconductor module arrangement, and an improved substrate arrangement that provides good thermal conductivity between the substrate or baseplate and the heat sink.
Disclosure of Invention
A power semiconductor module device includes a heat sink; a substrate arrangement arranged on the heat sink in a vertical direction; a thermal paste disposed in a vertical direction between a surface of the substrate arrangement and a surface of the heat sink, wherein the plurality of thermal conductive particles are uniformly distributed within the thermal paste; and a plurality of whiskers or fibers. Each whisker or fiber of the plurality of whiskers or fibers includes a first end and a second end, and the first end of each whisker or fiber of the plurality of whiskers or fibers is inseparably connected to a surface of the substrate means or a surface of the heat spreader.
A method for producing a power semiconductor module arrangement, comprising: forming a plurality of whiskers or fibers on at least one of a surface of a heat spreader and a surface of a substrate arrangement; applying a thermally conductive paste to one of a surface of the substrate arrangement and a surface of the heat sink so as to enclose a plurality of whiskers or fibers disposed on the respective surface, wherein the plurality of thermally conductive particles are uniformly distributed within the thermally conductive paste; and mounting the substrate arrangement to a heat sink, wherein the thermally conductive paste and the plurality of whiskers or fibers are disposed between a surface of the substrate arrangement and a surface of the heat sink. Each whisker or fiber of the plurality of whiskers or fibers includes a first end and a second end, and the first end of each whisker or fiber of the plurality of whiskers or fibers is inseparably connected to a first surface of the substrate means or a surface of the heat spreader.
A semiconductor substrate includes, a surface; a plurality of whiskers or fibers formed on a surface; and a thermally conductive paste disposed on the first surface of the substrate arrangement and enclosing the plurality of whiskers or fibers. A plurality of thermally conductive particles are uniformly distributed within the thermally conductive paste, each whisker or fiber of the plurality of whiskers or fibers includes a first end and a second end, and the first end of each whisker or fiber of the plurality of whiskers or fibers is inseparably attached to a surface of the substrate means.
A method for producing a substrate arrangement comprises: forming a plurality of whiskers or fibers on a surface of a substrate means; a thermally conductive paste is applied to a surface of the substrate arrangement so as to enclose a plurality of whiskers or fibers disposed on the surface, wherein the plurality of thermally conductive particles are uniformly distributed within the thermally conductive paste. Each whisker or fiber of the plurality of whiskers or fibers includes a first end and a second end, and the first end of each whisker or fiber of the plurality of whiskers or fibers is inseparably attached to the first surface of the substrate means.
The invention can be better understood with reference to the following drawings and description. The components in the figures are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the invention. Moreover, in the figures, like reference numerals designate corresponding parts throughout the different views.
Drawings
Fig. 1 schematically illustrates a cross-sectional view of a semiconductor substrate arrangement without a base plate.
Fig. 2 schematically illustrates a cross-sectional view of a semiconductor substrate arrangement including a base plate.
Fig. 3 schematically illustrates a cross-sectional view of a portion of the semiconductor substrate arrangement of fig. 2.
Fig. 4 schematically illustrates a cross-sectional view of a portion of the semiconductor substrate arrangement of fig. 2, according to an example.
Fig. 5 schematically illustrates a cross-sectional view of a portion of the semiconductor substrate arrangement of fig. 2, according to another example.
Fig. 6 (including fig. 6A to 6C) schematically illustrates a method for producing a semiconductor substrate apparatus and a power semiconductor module apparatus according to an example.
Detailed Description
In the following detailed description, reference is made to the accompanying drawings. The drawings show specific examples of the invention that can be practiced. It should be understood that the features and principles described with respect to the various examples may be combined with each other, unless specifically noted otherwise. In the specification and claims, reference numerals for certain elements as "first element", "second element", "third element", and the like, should not be construed as an enumeration. Rather, these labels are used only to find different "elements". That is, for example, the presence of the "third element" does not require the presence of the "first element" and the "second element". The semiconductor body as described herein may be made of a (doped) semiconductor material and may be or be comprised in a semiconductor chip. The semiconductor body has electrical connection pads and comprises at least one semiconductor element with an electrode.
Fig. 1 schematically illustrates a semiconductor substrate 10. The semiconductor substrate 10 includes a dielectric insulating layer 110; a first (structured) metallization layer 111 attached to the dielectric insulation layer 110; and a second metallization layer 112 attached to the dielectric insulating layer 110. A dielectric insulating layer 110 is disposed between a first metallization layer 111 and a second metallization layer 112.
Each of the first and second metallization layers 111, 112 may consist of or comprise one of the following materials: copper; a copper alloy; aluminum; an aluminum alloy; any other metal or alloy that remains in a solid state during operation of the power semiconductor module apparatus. The semiconductor substrate 10 may be a ceramic substrate,that is, a substrate in which the dielectric insulating layer 110 is a ceramic (e.g., a thin ceramic layer). The ceramic may consist of or comprise one of the following materials: alumina; aluminum nitride; zirconium oxide; silicon nitride; boron nitride; or any other dielectric ceramic. For example, the dielectric insulating layer 110 may be composed of or include one of the following materials: al (Al)2O3AlN or Si3N4. For example, the substrate may be, for example, a Direct Copper Bonded (DCB) substrate, a Direct Aluminum Bonded (DAB) substrate, or an Active Metal Brazing (AMB) substrate. However, the substrate may also be a conventional Printed Circuit Board (PCB) with a non-ceramic dielectric insulating layer or an IMS (insulated metal substrate). For example, the non-ceramic dielectric insulating layer may be composed of or include a cured resin.
Typically, one or more semiconductor bodies 20 are arranged on the semiconductor substrate 10. Each of the semiconductor bodies 20 arranged on the semiconductor substrate 10 may comprise a diode, an IGBT (insulated gate bipolar transistor), a MOSFET (metal-oxide-semiconductor field effect transistor), a JFET (junction field effect transistor), a HEMT (high electron mobility transistor), or any other suitable controllable semiconductor element. One or more semiconductor bodies 20 may form a semiconductor device on a semiconductor substrate. In fig. 1, two semiconductor bodies 20 are exemplarily illustrated. However, any other number of semiconductor bodies 20 is also possible.
In the example illustrated in fig. 1, the semiconductor substrate 10 is attached to a heat spreader 30 with a second metallization layer 112 arranged between the dielectric insulation layer 110 and the heat spreader 30. Heat generated by the semiconductor body 20 may be dissipated through the semiconductor substrate 10 to the heat sink 30. This is exemplarily illustrated by the bold arrows in fig. 1. The second metallization layer 112 of the semiconductor substrate 10 in fig. 1 is a continuous layer. The first metallization layer 111 is a structured layer in the device illustrated in fig. 1. In this context, "structured layer" means that the first metallization layer 111 is not a continuous layer, but comprises grooves between different segments of the layer. Such a groove is schematically illustrated in fig. 1. The first metallization layer 111 in the device illustratively comprises four different segments. Different semiconductor bodies 20 may be mounted to the same segment or to different segments of the first metallization layer 111. Different segments of the first metallization layer 111 may have no electrical connections or may be electrically connected to one or more other segments using electrical connections such as, for example, bond wires. For example, the electrical connection may also include a connection plate or a conductive rail, to name a few. However, the first metallization layer 111 as a structured layer is only an example. The first metallization layer 111 may also be a continuous layer. According to another example, the semiconductor substrate 10 may include only the dielectric insulation layer 110 and the first metallization layer 111. The second metallization layer 112 may be omitted.
The power semiconductor module device of fig. 1 does not include a substrate. That is, the semiconductor substrate 10 is directly mounted on the heat sink 30. A layer of thermal paste 40 is disposed between the semiconductor substrate 10 and the heat spreader 30. Specifically, the layer of the thermal paste 40 is disposed between the second metallization layer 112 and the heat sink 30, and if the second metallization layer 112 is omitted, the thermal paste 40 may be disposed between the dielectric insulation layer 110 and the heat sink 30.
According to another example, as schematically illustrated in fig. 2, the power semiconductor module arrangement may additionally comprise a substrate 50. The base plate 50 may be disposed between the semiconductor substrate 10 and the heat spreader 30. In this case, a layer of thermally conductive material 40 may be disposed between the substrate 50 and the heat sink 30.
In general, the power semiconductor module arrangement may include a substrate arrangement and a heat sink 30. The substrate arrangement may comprise only the semiconductor substrate 10 (fig. 1) or may comprise the semiconductor substrate 10 arranged on a base plate 50 (fig. 2).
For example, the thermal paste 40 applied between the substrate arrangement and the heat sink 30 may comprise a polymer. According to one example, the thermal conductive paste 40 may include silicone oil or wax. The thermal conductivity of the known thermal paste 40 is generally 0.5W/mK to 1W/mK. The thermal conductivity of the other thermal paste 40 may be, for example, up to about 3W/mK. However, for some applications this may not be sufficient. Therefore, in order to further increase the thermal conductivity of the thermal paste 40, the thermal conductive particles 62 may be added to the thermal paste 40. This is schematically illustrated in fig. 3, which shows segment a of the power semiconductor module arrangement of fig. 1 and 2. In fig. 3, the thermal paste 40 is disposed between the substrate arrangement 60 and the heat sink 30. The substrate arrangement 60 may be implemented as already described with respect to fig. 1 and 2.
The thermally conductive particles 62 added to the thermally conductive paste 40 may be uniformly distributed within the thermally conductive paste 40. The thermal conductivity of the particles 62 is greater than the thermal conductivity of the thermal paste 40. For example, the particles 62 may have a thermal conductivity greater than 7W/mK. For example, the particles 62 may have a thermal conductivity between 20W/mK and 200W/mK. For example, the particles 62 may include a ceramic material, glass, or metal powder. For example, the particles 62 may have an average maximum diameter d1 of between 2 μm and 10 μm. The thermal conductivity of the mixture including the thermal paste 40 and the particles 62 is greater than the thermal conductivity of the thermal paste 40 alone, e.g., having a thermal conductivity between 1W/mK and 5W/mK. Thus, by adding particles 62, heat dissipation between substrate arrangement 60 and heat sink 30 is increased.
However, the layer of thermally conductive paste 40 between the substrate arrangement 60 and the heat sink 30 typically comprises three segments. The first section 42 is a section of relatively high thermal conductivity. However, the first section 42 is disposed between two sections 44 of relatively low thermal conductivity. Generally, the thermal conductivity is low in the transition region between the substrate arrangement 60 and the thermal paste 40 and in the transition region between the heat spreader 30 and the thermal paste 40. In particular, heat transfer between the surface 61 of the substrate arrangement 60 and the surface 31 of the heat sink 30 and the thermally conductive particles 62 is typically relatively poor. The heat transfer may be increased when the surface roughness of the respective surface 61 of the substrate arrangement 60 and the respective surface 31 of the heat sink 30 is reduced to, for example, less than 20 μm. Surface roughness greater than 20 μm generally does not increase heat transfer. Conversely, if the surface roughness is significantly increased, the heat transfer may be significantly deteriorated.
Referring now to fig. 4, to increase the thermal path between at least one of the surfaces 31, 61 of the power semiconductor module arrangement and the thermally conductive particles 62, the power semiconductor arrangement further comprises a plurality of whiskers or fibers 64. For example, the surface may be a surface 61 of the substrate arrangement 60. As already described above with respect to fig. 1 and 2, the surface 61 may be a surface of the semiconductor substrate 10 (a surface of the second metallization layer 112 or a surface of the dielectric insulation layer 110) or a surface of the base plate 50. Each whisker or fiber of the plurality of whiskers or fibers 64 has a first end and a second end, and the first end thereof is inseparably attached to surface 61. That is, a first end of each of the whiskers or fibers 64 is connected to the surface 61 and extends from the first surface 61 into the thermal paste 40. The whiskers or fibers 64 may include a material having a high thermal conductivity. Specifically, the thermal conductivity of the whiskers or fibers 64 may be higher than the thermal conductivity of the thermal paste 40, i.e., within the range of the thermal conductivity of the thermally conductive particles 62. According to one example, the whiskers or fibers 64 may have a thermal conductivity between 20W/mK and 200W/mK. For example, the whiskers or fibers 64 may include a metallic material such as Cu, Al, Cr, Mo, or Wo. According to another example, the whiskers or fibers 64 include graphene. Graphene is a basic structural element of many other carbon (C) allotropes, such as, for example, graphite or carbon nanotubes.
The whiskers or fibers 64 comprising the metallic material are generally electrically conductive. Such whiskers or fibers 64 may thus provide an electrically conductive path between the substrate arrangement 61 and the heat sink 30. For some applications, however, it may not be desirable to provide an electrically conductive connection between the substrate arrangement 61 and the heat sink 30. Thus, according to another example, the whiskers or fibers 64 may include an electrically insulating material, such as, for example, a ceramic.
Each whisker or fiber 64 has a maximum length that may be between 5 μm and 50 μm. For example, each whisker or fiber 64 has a length that may be between 5 μm and 20 μm. The thickness d2 (see fig. 3) of the low thermal conductivity section 44 may be in the range of 1 μm up to several μm. The whiskers or fibers 64 may be long enough to bridge such low thermal conductivity sections 44 (length of whiskers or fibers 64 > d 2). In particular, the whiskers or fibers 64 are configured to provide a thermal path between the surface 61 and the thermally conductive particles 62. When the whiskers or fibers 64 extend into the thermally conductive paste 40 along the vertical direction y of the power semiconductor module arrangement, they also contact one or more of the thermally conductive particles 62.
For example, the distance d3 in the vertical direction between the substrate arrangement 60 and the heat spreader 30 may be between 20 μm and 50 μm.A portion of the plurality of whiskers or fibers 64 may have a length that is substantially less than the distance d3. between the substrate arrangement 60 and the heat spreader 30. thus, such whiskers or fibers 64 bridge only a short distance d2 of the low thermal conductivity section 44. for example, another portion of the whiskers or fibers 64 may have a length that is within the range of the distance d3 between the substrate arrangement 60 and the heat spreader 30. such whiskers or fibers 64 may extend from the surface 61 of the substrate arrangement 60 to the surface 31 of the heat spreader 30 and may provide a direct thermal path between the two surfaces 31, 61. the whiskers or fibers 64 may extend parallel to the vertical direction y. however, this is merely an example as schematically illustrated in FIG. 4, the whiskers or fibers 64 may extend only substantially in the vertical direction such that an angle of, e.g., 0 ° < α <10 ° is created between the whiskers or fibers 64 and the vertical direction y. different whiskers or fibers 64 may extend differently such that an angle is not formed for different whiskers or fibers 82.
In the example illustrated in fig. 4, the whiskers or fibers 64 are inseparably attached to the first surface 61 of the substrate arrangement 60. However, this is merely an example. Conversely, a plurality of whiskers or fibers 64 may also be inseparably attached to surface 31 of heat spreader 30 (not shown). According to another example illustrated in fig. 5, a portion of the whiskers or fibers 64 may be inseparably connected to the surface 61 of the substrate arrangement 60, while another portion of the whiskers or fibers 64 is inseparably connected to the surface 31 of the heat sink 30. That is, in the example of fig. 5, the whiskers or fibers 64 extend from both surfaces 31, 61 into the thermally conductive paste 40 such that heat transfer between each of the two surfaces 31, 61 and the thermally conductive particles 62 is increased. This results in a satisfactory heat conduction through the individual segments 42. The two segments 44 of low thermal conductivity may be bridged by whiskers or fibers 64.
Referring now to fig. 6A-6C, a method for producing the substrate arrangement 60 and the power semiconductor module arrangement is exemplarily illustrated. A method for producing a substrate arrangement 60 may comprise: a plurality of whiskers or fibers 64 is formed on a surface 61 of substrate arrangement 60, as illustrated in fig. 6A. The substrate arrangement 60 may comprise a semiconductor substrate 10, the semiconductor substrate 10 comprising a dielectric insulation layer 110, a first metallization layer 111, and (optionally) a second metallization layer 112, the surface 61 being a surface of the semiconductor substrate 10. According to another example, the substrate arrangement 60 may further comprise a base plate 50, wherein the semiconductor base plate 10 is arranged on the base plate 50 and the surface 61 is a surface of the base plate 50. Forming the plurality of whiskers or fibers 64 may include an electrogalvanic growth process. For example, the material forming the whiskers or fibers 64 may be deposited by galvanic separation. A mask may be disposed on the surface 61 of the substrate arrangement 60, the mask comprising microstructures such as a plurality of holes. The material may then be deposited in the microstructures, for example, in the holes. After the whiskers or fibers 64 are formed, the mask may be removed. A first end of each of the whiskers or fibers 64 is inseparably attached to the surface 61, while a second end of the whiskers or fibers 64 is a free end.
For example, a plurality of metal whiskers or fibers 64 may be formed. For example, the whiskers or fibers 64 may include aluminum. After the metal whiskers or fibers 64 are formed, the whiskers or fibers 64 may be exposed to steam, for example, by an electro-current growth process. In this way, a metal oxide can be formed. If the whiskers or fibers 64 include aluminum, Al may be obtained by forming a compound from the aluminum and oxygen2O3. Other metals may be used in place of aluminum, which may be converted to a ceramic by exposing it to steam. According to another example, a nitridation process may be used, wherein nitrogen diffuses into the metal. For example, the metal whiskers or fibers 64 may be exposed to a nitrogen-rich gas, e.g., NH3Thereby forming a nitride.
The substrate arrangement 60 is typically produced by a first supplier. The substrate arrangement 60 is then sold and transported before being mounted to the heat sink 30. However, if the same manufacturer produces the substrate device 60 and mounts it to the heat sink 30, it is also necessary to transport the device between different manufacturing plants or production machines. The whiskers or fibers 64 are very brittle and may be easily damaged. To protect the micro-whiskers or fibers 64 during transport and/or handling, the thermally conductive paste 40 may be applied to the substrate arrangement 60, as illustrated in fig. 6B. The thermal paste 40 may include thermally conductive particles 62. The plurality of whiskers or fibers 64 may be completely embedded in the thermal paste 40. That is, the free ends of the whiskers or fibers 64 do not protrude from the thermal paste 40.
A manufacturer of a power semiconductor module device may purchase a substrate device 60 having a plurality of whiskers or fibers 64 and a thermal paste 40 disposed on the substrate device. For example, the thermal paste 40 may be a thermal paste that changes its phase depending on temperature. For example, at room temperature, the thermal paste 40 may be solid, semi-solid, viscous, or gel-like, and may adhere to the surface 61. When heated, the thermal paste 40 may liquefy. For example, the thermal paste 40 may be applied to the substrate arrangement 60 while it is still liquid. For example, the thermal paste 40 may include a solvent. In a subsequent step, the solvent may be removed. The thermally conductive paste 40 may then form a protective layer for the whiskers or fibers 64. For example, the thermal paste 40 may have a low viscosity.
If the whiskers or fibers 64 are formed on the surface 31 of the heat sink 30 instead of on the surface 61 of the substrate arrangement 60 (not shown), the thermal paste 40 may be applied to the heat sink 30 instead of the substrate arrangement 60. If whiskers or fibers 64 are formed on both the surface 61 of the substrate arrangement 60 and the surface 31 of the heat sink, the thermal paste 40 may be applied to only one of the surfaces 31, 61.
A method for producing a power semiconductor module may further include: a substrate arrangement 60 comprising a plurality of whiskers or fibers 64 embedded in a layer of thermal paste 40 is mounted to the heat sink 30. This is schematically illustrated in fig. 6C.
Alternatively or additionally, according to another example (not shown), a method for forming a power semiconductor module arrangement may comprise: a plurality of whiskers or optical fibers 64 are formed on the surface 31 of the heat sink 30 prior to mounting the substrate arrangement 60 to the heat sink 30.
