阅读说明：本技术 层叠封装结构及其制造方法 (Package-on-package structure and method for manufacturing the same ) 是由 戴建业 王峥 徐鸿卓 刘伟 孙梦 于 2019-10-31 设计创作，主要内容包括：本申请公开了一种层叠封装结构及其制造方法,以解决现有的层叠封装结构电磁屏蔽能力较差的问题。该层叠封装结构,包括：基板、固定于基板上表面的支撑件以及罩设于支撑件外的塑封壳体；支撑件包括侧板和隔板,侧板垂直固定在基板上表面,隔板固定在由侧板所限定出的柱型空间内、并将柱型空间分隔成对应于基板的下腔以及与下腔相对的上腔；在侧板的内表面以及隔板朝向下腔的下表面上设有第一屏蔽层；在下腔内设有第一芯片,且第一芯片与基板之间电连接；在上腔内设有第二芯片,且第二芯片与基板电连接。该层叠封装结构采用了特殊结构的支撑件且设置有屏蔽层,能够对其中的芯片形成良好的电磁屏蔽,提高该封装结构的稳定性和可靠性。(The application discloses a laminated packaging structure and a manufacturing method thereof, which aim to solve the problem that the existing laminated packaging structure is poor in electromagnetic shielding capability. The package on package structure includes: the plastic package comprises a substrate, a support piece fixed on the upper surface of the substrate and a plastic package shell covering the support piece; the support piece comprises a side plate and a partition plate, the side plate is vertically fixed on the upper surface of the base plate, and the partition plate is fixed in a columnar space defined by the side plate and divides the columnar space into a lower cavity corresponding to the base plate and an upper cavity opposite to the lower cavity; a first shielding layer is arranged on the inner surface of the side plate and the lower surface of the partition plate facing the lower cavity; a first chip is arranged in the lower cavity, and the first chip is electrically connected with the substrate; a second chip is arranged in the upper cavity and electrically connected with the substrate. The laminated packaging structure adopts the supporting piece with a special structure and is provided with the shielding layer, so that good electromagnetic shielding can be formed on the chip in the laminated packaging structure, and the stability and the reliability of the laminated packaging structure are improved.)

1. A package on package structure, comprising: the plastic package comprises a substrate, a support piece fixed on the upper surface of the substrate and a plastic package shell covering the support piece;

the support comprises a side plate and a partition plate; the side plate is vertically fixed on the upper surface of the substrate; the partition plate is fixed in a columnar space defined by the side plates and divides the columnar space into a lower cavity corresponding to the substrate and an upper cavity opposite to the lower cavity; a first shielding layer is arranged on the inner surface of the side plate and the lower surface of the partition plate facing the lower cavity;

a first chip is arranged in the lower cavity, and the first chip is electrically connected with the substrate; and a second chip is arranged in the upper cavity and is electrically connected with the substrate.

2. The package on package structure of claim 1, wherein the first shielding layer in the upper cavity is electrically connected to the first shielding layer in the lower cavity.

3. The package on package structure of claim 2, wherein a shielding wire penetrates through the partition, and the shielding wire electrically connects the first shielding layer in the upper cavity and the first shielding layer in the lower cavity;

or, the partition plate is provided with a via hole, and the first shielding layer in the upper cavity is electrically connected with the first shielding layer in the lower cavity through the via hole.

4. The package on package structure of any one of claims 1 to 3, wherein a second shielding layer is further disposed in the upper cavity, and the second shielding layer covers the second chip and is connected to the first shielding layer.

5. The package on package structure of any one of claims 1 to 3, wherein a metal wiring layer is provided on an upper surface of the spacer, and the second chip is flip-chip mounted on the metal wiring layer;

the side plate is internally provided with a connecting wire, one end of the connecting wire is electrically connected with the metal wiring layer, and the other end of the connecting wire is electrically connected with the substrate.

6. The package on package structure according to any one of claims 1 to 3, wherein the substrate is provided with a mounting groove, a heat conducting member is provided in the mounting groove, and a lower surface of the heat conducting member is exposed from a lower surface of the substrate; one end of the side plate is inserted into the mounting groove and connected with the upper surface of the heat conducting piece.

7. The package on package structure of any one of claims 1 to 3, wherein the first chip is attached to the upper surface of the substrate, and the first chip is electrically connected to the substrate through a metal wire.

8. The package on package structure of claim 1, wherein the partition has a glue injection hole and an air exhaust hole for communicating the upper cavity and the lower cavity.

9. A method for manufacturing the package on package structure of any one of claims 1 to 8, comprising:

attaching a first chip on the upper surface of the substrate;

mounting a support on an upper surface of the substrate;

the lower cavity is sealed by glue to form a filling body filled in the lower cavity;

a second chip is pasted on the surface of the clapboard of the supporting piece;

the upper cavity is sealed by glue to form a filling body filled in the upper cavity;

and forming a plastic package shell covering the support piece.

10. The manufacturing method according to claim 9, further comprising, before forming the mold housing: and forming a second shielding layer on the surface of the filling body in the upper cavity and the surface of the second chip, which faces away from the partition plate.

Technical Field

The invention relates to the technical field of integrated circuit chip packaging, in particular to a stacked packaging structure and a manufacturing method thereof.

Background

Package-on-Package (PoP) is also called a stack Package or a stack Package, and is a Package structure developed for ic (integrated circuit) Package of a mobile device and used for system integration, and is one of three-dimensional stacking technologies very popular in the industry at present. The PoP package is formed by stacking an upper layer package and a lower layer package, and the bottom layer package and the upper layer package and the bottom layer package and a Motherboard (Motherboard) are interconnected through a solder ball array. The bottom package of the package-on-package is typically a baseband element, or application processor, etc., while the top package may be a memory, etc.

As a novel high-integration packaging form, the stack package provides a possibility of freely selecting a device combination for a terminal user while improving a logic operation function and a storage space, and the production cost can be more effectively controlled, so that the stack package is widely applied to portable electronic products such as smart phones and digital cameras at present.

With the increasing demand of electronic products for single integrated circuit products, the single integrated circuit products are also expanding toward the fields of high frequency, multi-chip module, system integration, etc. The increasing development of new technologies also puts higher requirements on packaging technologies, and the existing PoP structure cannot well meet the future market demands, especially the problems of electromagnetic interference and the like between single packages in the existing stacked package are reflected, so that the existing PoP packaging structure and the packaging technology matched with the PoP packaging structure need to be improved to meet the future product development demands.

Disclosure of Invention

In view of the above problems, an object of the present invention is to provide a package on package structure having a good electromagnetic shielding capability and a method for manufacturing the same.

To achieve the above object, a first aspect of the present invention provides a package on package structure, comprising: the plastic package comprises a substrate, a support piece fixed on the upper surface of the substrate and a plastic package shell covering the support piece; the supporting piece comprises a side plate and a partition plate; the side plate is vertically fixed on the upper surface of the substrate; the partition board is fixed in a columnar space defined by the side boards and divides the columnar space into a lower cavity corresponding to the substrate and an upper cavity opposite to the lower cavity; a first shielding layer is arranged on the inner surface of the side plate and the lower surface of the partition plate facing the lower cavity; a first chip is arranged in the lower cavity, and the first chip is electrically connected with the substrate; a second chip is arranged in the upper cavity and electrically connected with the substrate.

Further, the first shielding layer in the upper cavity is electrically connected with the first shielding layer in the lower cavity.

Furthermore, a shielding wire penetrates through the partition board and electrically connects the first shielding layer in the upper cavity with the first shielding layer in the lower cavity; or the partition plate is provided with a through hole, and the first shielding layer in the upper cavity is electrically connected with the first shielding layer in the lower cavity through the through hole.

Furthermore, a second shielding layer is arranged in the upper cavity, covers the second chip and is connected with the first shielding layer.

Furthermore, a metal wiring layer is arranged on the upper surface of the partition plate, and the second chip is inversely arranged on the metal wiring layer; a connecting wire is arranged in the side plate, one end of the connecting wire is electrically connected with the metal wiring layer, and the other end of the connecting wire is electrically connected with the substrate.

Furthermore, a mounting groove is formed in the substrate, a heat conducting piece is arranged in the mounting groove, and the lower surface of the heat conducting piece is exposed from the lower surface of the substrate; one end of the side plate is inserted in the mounting groove and connected with the upper surface of the heat conducting piece.

Furthermore, the first chip is attached to the upper surface of the substrate, and the first chip is electrically connected with the substrate through a metal wire.

Furthermore, the partition plate is provided with a glue injection port and an exhaust port which are used for communicating the upper cavity with the lower cavity.

A second aspect of the present invention provides a method for manufacturing the package on package structure, including: attaching a first chip on the upper surface of the substrate; mounting a support on an upper surface of the substrate; sealing the lower cavity by glue to form a filling body filled in the lower cavity; a second chip is pasted on the surface of the clapboard of the supporting piece; the upper cavity is sealed by glue to form a filling body filled in the upper cavity; and forming a plastic package shell covering the support piece.

Further, before forming the plastic package casing, still include: and forming a second shielding layer on the surface of the filling body in the upper cavity and the surface of the second chip, which faces away from the partition plate.

According to the stacked packaging structure provided by the invention, the stacked packaging structure is provided with the support piece with a special design, and the support piece is provided with the upper cavity and the lower cavity which are used for accommodating one chip respectively; the electromagnetic shielding layers are arranged in the upper cavity and the lower cavity of the supporting piece, so that the electromagnetic shielding layers can respectively surround the chips, and the problem that the anti-electromagnetic interference capability of the existing laminated packaging structure is not enough is effectively solved. In addition, the support piece enables the manufacturing process to be simpler, and is beneficial to improving the consistency and stability of products.

Compared with the traditional laminated packaging process, the manufacturing method of the laminated packaging structure provided by the invention has the advantages that the manufacturing process is simpler and more reliable, and the performance and the reliability of the product are effectively improved.

Drawings

The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings. Moreover, for purposes of clarity, the various features of the drawings are not necessarily to scale.

Fig. 1 is a schematic structural diagram of a package on package structure according to an embodiment of the invention;

FIG. 2 is a schematic diagram of a supporting member with a connecting wire and a shielding wire according to an embodiment of the invention;

FIG. 3 is a schematic view of a support member of an embodiment of the present invention preparing a first shielding layer;

FIG. 4 is a schematic view of a metal wiring layer prepared by the support member according to the embodiment of the invention;

FIG. 5 is a schematic view of a support member of an embodiment of the present invention with a glue injection port and a gas exhaust port;

FIG. 6 is a flow chart of a process for fabricating a support according to an embodiment of the present invention;

FIG. 7 is a diagram illustrating a package on package structure mounting a first chip according to an embodiment of the invention;

FIG. 8 is a diagram illustrating a support member of a package on package structure according to an embodiment of the present invention;

fig. 9 is a schematic diagram of a package on package structure encapsulating a first chip according to an embodiment of the invention;

FIG. 10 is a diagram illustrating a second chip mounted on the package on package structure according to an embodiment of the present invention;

fig. 11 is a schematic diagram of a package on package structure encapsulating a second chip according to an embodiment of the invention;

fig. 12 is a diagram illustrating a second metal shielding layer disposed on the package on package structure according to the embodiment of the invention;

fig. 13 is a schematic diagram of plastic packaging of the stacked package structure according to the embodiment of the present invention;

fig. 14 is a flowchart of a method for manufacturing a package on package structure according to an embodiment of the invention.

Description of reference numerals:

100-a substrate; 110-a first pad;

120-a second pad; 130-a thermally conductive member;

140-a third pad; 150-solder ball;

200-a first chip; 210-a first chip pad;

211-metal lines; 220-a filler;

300-a support; 301-side panels;

302-a separator; 310-shielded wires;

320-connecting lines; 330-a first shielding layer;

340-a second shielding layer; 350-a metal wiring layer;

351-support member pads; 360-glue injection port;

370-an exhaust port; 400-a second chip;

410-a second chip pad; 411-copper cylinder;

420-a filler; 500-plastic package casing.

Detailed Description

Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. The present invention is not limited to only these examples. In the following detailed description of the present invention, certain specific details are set forth. It will be apparent to one skilled in the art that the present invention may be practiced without these specific details. Well-known methods, procedures, and procedures have not been described in detail so as not to obscure the present invention.