Multilayer spacer and double-sided cooling power module comprising same

文档序号:1848399 发布日期:2021-11-16 浏览:28次 中文

阅读说明:本技术 多层间隔件及包括其的双面冷却电源模块 (Multilayer spacer and double-sided cooling power module comprising same ) 是由 俞明日 朴准熙 于 2020-10-12 设计创作,主要内容包括:本发明涉及多层间隔件及包括其的双面冷却电源模块。一种热膨胀系数和热导率可控的多层间隔件,以及包括该多层间隔件的双面冷却电源模块,所述多层间隔件设置在双面冷却电源模块中的半导体芯片和基板之间。所述多层间隔件包括第一金属层和第二金属层,所述第一金属层由第一金属制成并且设置为至少各自的最外层,所述第二金属层由第二金属制成并且布置在设置为最外层的第一金属层之间,所述第二金属具有的热膨胀系数低于所述第一金属的热膨胀系数。(The invention relates to a multilayer spacer and a double-sided cooling power module including the same. A multilayer spacer whose thermal expansion coefficient and thermal conductivity are controllable, which is disposed between a semiconductor chip and a substrate in a double-sided cooling power supply module, and the double-sided cooling power supply module including the multilayer spacer. The multilayer spacer includes first metal layers made of a first metal and provided as at least respective outermost layers, and second metal layers made of a second metal and disposed between the first metal layers provided as the outermost layers, the second metal having a thermal expansion coefficient lower than that of the first metal.)

1. A multilayer spacer provided between a semiconductor chip and a substrate in a double-sided cooling power supply module, comprising:

a plurality of first metal layers made of a first metal and disposed as outermost layers: and

a second metal layer made of a second metal and disposed between the plurality of first metal layers, the second metal having a thermal expansion coefficient lower than that of the first metal.

2. The multilayer spacer according to claim 1, wherein the second metal layer is provided singly and stacked between a plurality of first metal layers provided as outermost layers.

3. The multilayer spacer of claim 1, wherein:

the second metal layer is arranged in a plurality to form a plurality of second metal layers;

the plurality of second metal layers are alternately stacked between the plurality of first metal layers disposed as the outermost layers.

4. The multilayer spacer of claim 1, wherein the solder wettability of the second metal is lower than the solder wettability of the first metal.

5. The multilayer spacer of claim 1, wherein the thickness of the second metal layer is 33% to 50% of the total thickness of the multilayer spacer.

6. The multilayer spacer of claim 1, wherein the first metal is Cu and the second metal is Mo or CuMo.

7. A dual-sided cooled power module, comprising:

an upper substrate;

a lower substrate;

a semiconductor chip disposed between the upper substrate and the lower substrate; and

a spacer disposed between the semiconductor chip and the upper substrate,

wherein the spacer includes a plurality of first metal layers made of a first metal and provided as an outermost layer, and a second metal layer made of a second metal and disposed between the plurality of first metal layers, the second metal having a thermal expansion coefficient lower than that of the first metal.

8. The dual sided cooled power module of claim 7, further comprising:

a signal lead through which a signal is transmitted to or received from the semiconductor chip;

a lead connecting the semiconductor chip and the signal lead; and

conductive metal plates respectively disposed between the spacer and the upper substrate and between the semiconductor chip and the lower substrate,

wherein the bonding between the metal plate and the spacer and the bonding between the spacer and the semiconductor chip are performed by soldering.

9. The dual sided cooled power module of claim 8, wherein the solder wettability of the second metal is lower than the solder wettability of the first metal.

10. The double-sided cooling power supply module according to claim 7, wherein the second metal layer is provided singly and stacked between a plurality of first metal layers provided as outermost layers.

11. The dual sided cooled power module of claim 7, wherein:

the second metal layer is arranged in a plurality to form a plurality of second metal layers;

the plurality of second metal layers are alternately stacked between the plurality of first metal layers disposed as the outermost layers.

12. The dual sided cooled power module of claim 7, wherein the first metal is Cu and the second metal is Mo or CuMo.

13. The dual sided cooled power module of claim 7, wherein the thickness of the second metal layer is 33% to 50% of the total thickness of the spacer.

Technical Field

The present invention relates to a multilayer spacer and a double-sided cooling power module including the same. More particularly, the present invention relates to a multilayer spacer whose thermal expansion coefficient and thermal conductivity are controllable, and a double-sided cooling power supply module including the same.

Background

Hybrid or electric vehicles require an electric motor for propulsion. The motor is controlled by a power module. Thus, the starting and output power of the motor can be adjusted.

Since high-output electricity is continuously applied to the power supply module, a large amount of heat is generated in the power supply module. Therefore, many attempts have been made to cool the power supply module. Among them, there is a double-sided cooling power supply module configured such that substrates each provided with a cooler are disposed above and below semiconductor chips, respectively, which are key components of the power supply module. In this structure, the semiconductor chip is cooled from both sides.

In order to input an operation signal to the semiconductor chip, the signal lead is connected to the semiconductor chip by wire bonding via a wire.

The lead wire is inevitably bent due to the characteristics of wire bonding, and thus the lead wire is in contact with the surface of the substrate when the semiconductor chip is arranged on the substrate. In order to prevent contact between the substrate and the leads, a spacer is provided between the substrate and the semiconductor chip.

Heat generated in the semiconductor chip and current flowing through the semiconductor chip are likely to be conducted to the spacer. Therefore, the spacer must be made of a material having high electrical conductivity, high thermal conductivity, and minimal difference in thermal expansion coefficient from the substrate material.

The spacers in the prior art are typically made of Al-SiC, Al-C, etc. In the present case, since these materials are expensive, the spacer in the related art cannot be provided at a low price. On the other hand, in the case where the spacer is made of relatively inexpensive pure copper (Cu), since copper has a high thermal expansion coefficient and the substrate has a low thermal expansion coefficient, there is a large difference in thermal expansion coefficient between the copper spacer and the substrate, resulting in a large stress in the spacer.

Fig. 1 is a sectional view exemplarily showing a typical power module, and fig. 2 is a sectional view exemplarily showing a typical spacer.

As shown in fig. 1, the typical power module includes an upper substrate 11 and a lower substrate 12. The semiconductor chip 40 is disposed between the upper substrate 11 and the lower substrate 12. In addition, a multilayer structure is provided between the upper substrate 11 and the upper surface of the semiconductor chip 40 and between the lower substrate 12 and the lower surface of the semiconductor chip 40, respectively, each structure including metal plates 21 and 22 (or 23/24 and 25) and an insulating layer 81 (or 82) interposed between the metal plates 21 and 22 (or 23/24 and 25). The thermal interface material TMI 71 is bonded between the metal plate 21 and the upper substrate 11, and the thermal interface material TMI 72 is bonded between the metal plate 23 and the lower substrate 12.

The semiconductor chip 40 is connected to the signal lead 41 through a lead 42. In addition, the power supply lead 50 is connected to the semiconductor chip 40 via the metal plates 22 and 25, and the intermediate spacer 60 is arranged to maintain a distance between the metal layer 22 and the metal 25.

The joint S between the metal plate 22 and the spacer 30 and the joint S between the spacer 30 and the semiconductor chip 40 are formed by soldering.

In the present case, as shown in fig. 2, the spacer 30 is made of a composite material such as copper-molybdenum (Cu-Mo) and aluminum-silicon carbide (Al-SiC) instead of a pure metal such as copper (Cu) to minimize the difference in thermal expansion coefficient between the spacer 30 and the solder joint S. Fig. 2 is a schematic view of a spacer made of a Cu — Mo composite material, which is composed of copper (Cu)31 and molybdenum (Mo) 32.

The surface of the spacer 30 is covered with a Cu layer 33 to prevent the semiconductor chip from being damaged due to intermetallic diffusion between the solder joint and the semiconductor chip during a high temperature process.

The material of the spacer 30 must provide high heat dissipation. Therefore, the content of the composite material in the entire material of the spacer is crucial. However, there are a number of problems with using composite materials as the material for the spacer: the preparation of the composite material is complex; the conditions for obtaining a homogeneous composite are difficult to control; poor uniformity of the composite material may reduce the reliability of the power module.

The method of plating the Cu layer 33 on the surface of the spacer has a problem of increasing costs associated with quality control and workability.

The information disclosed in this background section is only for enhancement of understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information forms the prior art already known to a person skilled in the art.

Disclosure of Invention

Various aspects of the present invention are directed to provide a multi-layered spacer having controllable thermal expansion coefficient and thermal conductivity and a double-sided cooling power module including the same.

According to various aspects of the present invention, a multilayer spacer disposed between a semiconductor chip and a substrate is provided in a double-sided cooling power supply module. The multilayer spacer includes first metal layers made of a first metal and provided as at least respective outermost layers, and second metal layers made of a second metal and disposed between the first metal layers, the second metal having a thermal expansion coefficient lower than that of the first metal.

In the multilayer spacer, the second metal layer is provided as a single and stacked between the first metal layers provided as the outermost layers.

In the multi-layered spacer, the plurality of first metal layers and the plurality of second metal layers may be alternately arranged between the first metal layers disposed as outermost layers.

In the multilayer spacer, the second metal may exhibit lower solder wettability than the first metal.

In the multilayer spacer, the second metal layer may be formed to be 33% to 50% of the thickness of the entire spacer.

In the multilayer spacer, the first metal may be Cu, and the second metal may be Mo or CuMo.

According to various aspects of the present invention, there is provided a double-sided cooling power supply module including a semiconductor chip disposed between an upper substrate and a lower substrate and a spacer disposed between the semiconductor chip and the upper substrate. The spacer includes: a first metal layer made of a first metal and provided as an outermost layer; and a second metal layer made of a second metal and disposed between the first metal layers, the second metal having a thermal expansion coefficient lower than that of the first metal.

The double-sided cooling power supply module may further include: a signal lead through which a signal is transmitted to or received from the semiconductor chip; a lead connecting the semiconductor chip and the signal lead; and metal plates made of a conductive material and formed between the spacer and the upper substrate and between the semiconductor chip and the lower substrate, respectively, wherein the metal plates and the spacer are connected to each other by a soldering portion, and the spacer and the semiconductor chip are connected to each other by another soldering portion.

In the double-sided cooling power supply module, the second metal may exhibit lower solder wettability than the first metal.

In the double-sided cooling power supply module, the spacer may have a single second metal layer stacked between the first metal layers disposed as the outermost layers.

In the double-sided cooling power supply module, the spacer may include a plurality of first metal layers and a plurality of second metal layers alternately stacked between the first metal layers disposed as the outermost layers.

In the double-sided cooling power supply module, the first metal may be Cu, and the second metal may be Mo or CuMo.

In the double-sided cooling power supply module, the second metal layer forming the spacer may be formed to be 33% to 50% of the thickness of the entire spacer.

According to various exemplary embodiments of the present invention, the spacer is formed by stacking a plurality of metal material layers having different thermal expansion coefficients and thermal conductivities. Therefore, a spacer whose thickness is easily adjusted can be obtained.

In addition, the Cu plating layer does not need to be formed. This prevents an increase in thermal resistance between the semiconductor chip and the spacer, and thus can improve the reliability of the power supply module.

Further, by adjusting the number of different metal layers and the thickness of each different metal layer, the thermal expansion coefficient and thermal conductivity of the spacer can be easily controlled.

The method and apparatus of the present invention have other features and advantages which will be apparent from or are set forth in detail in the accompanying drawings and the following detailed description, which are incorporated herein, and which together serve to explain certain principles of the invention.

Drawings

Fig. 1 is a sectional view exemplarily showing a typical power module;

FIG. 2 is a sectional view exemplarily illustrating a typical spacer;

fig. 3 is a sectional view exemplarily illustrating a spacer according to various exemplary embodiments of the present invention;

FIG. 4 is a sectional view exemplarily illustrating a spacer according to various exemplary embodiments of the present invention; and

fig. 5A and 5B are schematic views showing a comparative example and an example of the present invention in which a spacer and a weld joint are formed, respectively.

It is to be understood that the drawings are not necessarily to scale, presenting a somewhat simplified representation of various features illustrative of the basic principles of the invention. The specific design features of the invention included herein, including, for example, specific dimensions, orientations, locations, and shapes, will be determined in part by the particular intended application and environment of use.

In the drawings, reference numerals designate identical or equivalent parts of the invention throughout the several views.

Detailed Description

Reference will now be made in detail to various embodiments of the present invention, examples of which are illustrated in the accompanying drawings and described below. While the present invention will be described in conjunction with the exemplary embodiments of the present invention, it will be understood that this description is not intended to limit the invention to those exemplary embodiments. On the contrary, the invention is intended to cover not only the exemplary embodiments of the invention, but also various alternatives, modifications, equivalents and other embodiments, which may be included within the spirit and scope of the invention as defined by the appended claims.

Embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. However, the present invention is not limited to the embodiments to be included below, but various different embodiments thereof may be implemented. These embodiments are provided merely for a complete disclosure of the present invention and to provide those of ordinary skill in the art with a full appreciation of the scope of the invention. The scope of the invention may be limited only by the claims. The same constituent elements are provided with the same reference numerals.

Fig. 3 is a sectional view exemplarily illustrating a spacer according to various exemplary embodiments of the present invention.

Like the spacer 30 shown in fig. 1, the spacer according to various exemplary embodiments of the present invention is disposed between the upper substrate 11 and the semiconductor chip 40.

In the present case, the power supply module including the spacer 100 includes: a signal lead 41 through which a signal is transmitted to the semiconductor chip 40 and received from the semiconductor chip 40; a lead 42 connecting the semiconductor chip 40 and the signal lead 41 to each other; and metal plates 21 to 25 made of a conductive material. The metal plates 21 and 22 are formed between the spacer 100 and the upper substrate 11, and the metal plates 23, 24, and 25 are formed between the semiconductor chip 40 and the lower substrate 12.

The exemplary power module shown in fig. 1 and the power module 100 according to various exemplary embodiments of the present invention are identical in terms of constituent elements, except for the spacer 100, the position of the spacer 100, and the coupling method. Therefore, redundant description will not be given.

However, the spacer 100 according to the exemplary embodiment of the present invention is a multi-layered structure in which layers of different metal materials are stacked.

More specifically, the spacer 100 includes a first metal layer 110 and a second metal layer 120, the first metal layer 110 being made of a first metal and being an outermost layer, the second metal layer 120 being made of a second metal having a lower thermal expansion coefficient than the first metal and being disposed between the first metal layers 110. That is, the spacer 100 is obtained by sequentially stacking the first metal layer 110, the second metal layer 120, and the first metal layer 110 in this order.

In the present case, the first metal making up the first metal layer 110 and the second metal making up the second metal layer 120 have different coefficients of thermal expansion and thermal conductivity. Therefore, the thermal expansion coefficient and the thermal conductivity of the entire spacer are adjusted by adjusting the respective thicknesses of the first metal layer 110 and the second metal layer 120.

In particular, the first metal has a lower coefficient of thermal expansion than the second metal.

Also, the second metal has a lower solder wettability than the first metal.

For example, the first metal is made of Cu, and the second metal is made of Mo or CuMo.

Cu as a material of the first metal layer 110 has a thickness of 16.5 × 10-6A coefficient of thermal expansion of/K and a thermal conductivity of 386W/mK. CuMo as a material of the second metal layer 120 has 9 × 10-6A coefficient of thermal expansion of/K and a thermal conductivity of 200W/mK. Therefore, by adjusting the thicknesses of the first metal layer 110 and the second metal layer 120, the thermal expansion coefficient and the thermal conductivity of the spacer 100 can be adjusted to 10 × 10-6Less than/K and more than 195W/mK.

The outermost layer of the spacer 100 is realized by a first metal layer 110 (which is made of Cu). Soldering is performed on the first layer 110 made of Cu, and therefore, unlike the spacer in the related art, it is not necessary to form the Cu plating layer 33 on the surface of the spacer 30.

According to an exemplary embodiment of the present invention, since the surface of the spacer 100 is plated with the copper layer, the second metal layer 120 is exposed on the side of the spacer 100. In the present case, since the solder wettability of Mo or CuMo making the second metal layer 120 is lower than that of Cu making the first metal layer 110, when soldering is performed to connect the spacer 100 with the metal plate 22 and the semiconductor chip 40, it is possible to prevent the soldering portion S connecting the spacer 100 and the metal plate 22 from being connected to the soldering portion S connecting the spacer 100 and the semiconductor chip 40 on the side face of the spacer 100.

The second metal layer 120 has a sufficient thickness to prevent the soldering portion S connected to the first metal layer 110 disposed as the uppermost metal layer from being connected to the soldering portion S connected to the first metal layer 110 disposed as the lowermost metal layer via the side of the second metal layer 120.

For example, the thickness of the second metal layer 120 is about 33% to 50% of the total thickness of the spacer. In the case where the thickness of the second metal layer 120 is less than the predetermined range suggested above, there is a risk that the soldering portion S connected to the first metal layer 110 set as the uppermost metal layer is electrically connected with the soldering portion S connected to the first metal layer 110 set as the lowermost metal layer to cause a short circuit. In contrast, in the case where the thickness of the second metal layer 120 is greater than the above suggested predetermined range, the first metal layer 110 is formed to be too thin, so that the required thermal expansion coefficient and the required thermal conductivity of the spacer cannot be secured.

The present invention is not limited to configuring the spacer 100 such that the first metal layer 110, the second metal layer 120, and the first metal layer 110 are stacked in this order. As shown in fig. 4, a plurality of first metal layers 110 and second metal layers 120 are alternately stacked between two first metal layers 110 disposed as outermost layers.

For example, the metal layers are deposited on top of each other in the following order: a first metal layer 110, a second metal layer 120, and a first metal layer 110. Even in the present case, the outermost layer of the spacer 100 is realized by the first metal layer 110.

Next, a welded joint on a spacer according to an exemplary embodiment of the present invention will be described with reference to a comparative example and an example of the present invention.

Fig. 5A and 5B are schematic views showing a comparative example and an example of the present invention in which a spacer and a weld joint are formed, respectively.

Fig. 5A is a schematic view exemplarily showing the solder joint S on the spacer 30 (in which the Cu plating layer 33 is provided) in the related art, and fig. 5B is a schematic view exemplarily showing the solder joint S on the spacer 100 according to the exemplary embodiment of the present invention.

As shown in fig. 5A, the Cu plating layer 33 covers the entire surface of the spacer 30 in the related art. Therefore, the solder joints S formed on the upper surface of the spacer 30 and the solder joints S formed on the lower surface of the spacer 30 undesirably extend to a part of the side surface of the spacer 30. Therefore, a short circuit occurs between the upper and lower portions of the spacer 30.

In contrast, in the spacer 100 according to the exemplary embodiment of the present invention, since the metal material of which the second metal layer 120 is made has poor solder wettability, it is understood from fig. 5B that the second metal layer 120 exposed on the side surface of the spacer 100 prevents the solder joint S formed on the first metal layer 110 disposed as the uppermost metal layer from being connected with the solder joint S formed on the first metal layer 110 disposed as the lowermost layer.

For convenience in explanation and accurate definition in the appended claims, the terms "upper", "lower", "inner", "outer", "upper", "lower", "upward", "downward", "front", "rear", "back", "inner", "outer", "inward", "outward", "inner", "outer", "forward" and "rearward" are used to describe features of the exemplary embodiments with reference to the positions of such features as displayed in the figures. It will be further understood that the term "coupled" or its derivatives refer to both direct and indirect connections.

The foregoing descriptions of specific exemplary embodiments of the present invention have been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed, and obviously many modifications and variations are possible in light of the above teaching. The exemplary embodiments were chosen and described in order to explain certain principles of the invention and its practical application to enable others skilled in the art to make and use various exemplary embodiments of the invention and various alternatives and modifications thereof. It is intended that the scope of the invention be defined by the following claims and their equivalents.

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