阅读说明：本技术 一种全自对准的槽栅绝缘栅双极晶体管及其制备方法 (Fully self-aligned trench gate insulated gate bipolar transistor and preparation method thereof ) 是由 陈利 陈彬 于 2021-08-19 设计创作，主要内容包括：本发明涉及晶体管技术领域,且公开了一种全自对准的槽栅绝缘栅双极晶体管及其制备方法,包括衬垫层,所述衬垫层的上表面设有P+层,所述P+层的上表面设有漏区,所述漏区的上表面两侧开设有漏注入区,所述漏注入区的顶部设有源区。该一种全自对准的槽栅绝缘栅双极晶体管及其制备方法,通过散热层的多层设置,能够充分吸收使用过过程中所产生的热量,通过散热片的设置,散热片能够有效的吸附第一铜层、陶瓷层和第二铜层所排出的热量,晶体管工作时,热量能够通过散热片被吸附出,从而有效的降低其温度,通过散热导管和延伸片的设置,进一步的提高了散热效果,使得晶体管工作时发热损耗降低,延长了使用寿命。(The invention relates to the technical field of transistors and discloses a fully self-aligned trench gate insulated gate bipolar transistor and a preparation method thereof. The fully self-aligned groove gate insulated gate bipolar transistor and the preparation method thereof can fully absorb heat generated in the using process through the multilayer arrangement of the heat dissipation layers, and through the arrangement of the heat dissipation fins, the heat dissipation fins can effectively absorb heat exhausted by the first copper layer, the ceramic layer and the second copper layer, and when the transistor works, the heat can be absorbed out through the heat dissipation fins, so that the temperature of the transistor is effectively reduced, through the arrangement of the heat dissipation conduit and the extension fins, the heat dissipation effect is further improved, the heat generation loss of the transistor during working is reduced, and the service life is prolonged.)

1. A fully self-aligned trench gate insulated gate bipolar transistor and a preparation method thereof, comprising a liner layer (1), characterized in that: the upper surface of backing layer (1) is equipped with P + layer (2), the upper surface on P + layer (2) is equipped with drain region (3), the upper surface both sides of drain region (3) have been seted up and have been leaked injection district (4), the top of leaking injection district (4) is equipped with source region (5), two the middle part of source region (5) is equipped with gate insulation layer (6), the top of gate insulation layer (6) is equipped with polycrystalline silicon gate layer (7), the edge of polycrystalline silicon gate layer (7) is equipped with insulating lateral wall (8).

2. The fully self-aligned trench gate insulated gate bipolar transistor and the manufacturing method thereof according to claim 1, wherein: the welding of the bottom of bedding (1) has heat dissipation layer (22), the bottom of heat dissipation layer (22) is equipped with insulating bottom plate (9), the jack has been seted up to the four corners department of insulating bottom plate (9), the inside fixed mounting of jack has insulating cover (10), the inside screw thread of insulating cover (10) runs through has gim peg (11), the edge fixed mounting of insulating bottom plate (9) has fin (12), the arc wall has been seted up to one side of fin (12), the inside fixed mounting of arc wall has heat dissipation pipe (13), the fixed surface of heat dissipation pipe (13) installs and extends piece (14), heat dissipation pipe (13) and the inside of extending piece (14) are equipped with the radiating fluid.

3. The fully self-aligned trench gate insulated gate bipolar transistor and the manufacturing method thereof according to claim 2, wherein: the bottom joint of insulating bottom plate (9) has fixed plate (15), the bottom fixed mounting of fixed plate (15) has card box (16), the upper surface joint of card box (15) has lid (17), the edge of lid (17) is seted up flutedly, the inside of recess is pegged graft and is had spacing subassembly (18).

4. The fully self-aligned trench gate insulated gate bipolar transistor and the manufacturing method thereof according to claim 3, wherein: the limiting assembly (18) comprises a return spring (1801), and a clamping block (1802) is fixedly mounted at one end of the return spring (1801).

5. The fully self-aligned trench gate insulated gate bipolar transistor and the manufacturing method thereof according to claim 4, wherein: the edge of the clamping box (15) is provided with a slot matched with the clamping block (1802), the inside of the slot is clamped with a pressing block (19), and anti-skid grains are carved on the outer surface of the pressing block (19).

6. The fully self-aligned trench gate insulated gate bipolar transistor and the manufacturing method thereof according to claim 3, wherein: the upper surface of the box cover (17) is embedded with a transparent acrylic plate (20).

7. The fully self-aligned trench gate insulated gate bipolar transistor and the manufacturing method thereof according to claim 2, wherein: and an insulating plate (21) is fixedly arranged at the top of the radiating fin (12).

8. The fully self-aligned trench gate insulated gate bipolar transistor and the manufacturing method thereof according to claim 1, wherein: the grid insulation layer (6) is a silicon dioxide layer formed by a thermal oxidation process, and the width of the insulation side wall (8) is 0.1-1um and the height of the insulation side wall is 0.7-2 um.

9. The fully self-aligned trench gate insulated gate bipolar transistor and the method for fabricating the same according to claims 1-8, wherein: the heat dissipation layer (22) comprises a first copper layer (2201), a ceramic layer (2202) is arranged at the bottom of the first copper layer (2201), and a second copper layer (2203) is arranged at the bottom of the ceramic layer (2202).

Technical Field

The invention relates to the technical field of transistors, in particular to a fully self-aligned trench gate insulated gate bipolar transistor and a preparation method thereof.

Background

An insulated gate bipolar transistor is a composite fully-controlled voltage-driven power semiconductor device consisting of a BJT (bipolar junction transistor) and an MOS (insulated gate field effect transistor), and has the advantages of both high input impedance of an MOSFET (metal-oxide-semiconductor field effect transistor) and low conduction voltage drop of a GTR (GTR). The GTR saturation voltage is reduced, the current carrying density is high, but the driving current is large; the MOSFET has small driving power, high switching speed, large conduction voltage drop and small current carrying density. The IGBT integrates the advantages of the two devices, and has small driving power and reduced saturation voltage. The method is very suitable for being applied to the fields of current transformation systems with direct-current voltage of 600V or more, such as alternating-current motors, frequency converters, switching power supplies, lighting circuits, traction transmission and the like. The IGBT module is a modularized semiconductor product formed by bridge packaging of an IGBT (insulated gate bipolar transistor chip) and an FWD (freewheeling diode chip) through a specific circuit; the packaged IGBT module is directly applied to equipment such as a frequency converter, a UPS (uninterrupted power supply) and the like;

the IGBT module has the characteristics of energy conservation, convenience in installation and maintenance, stable heat dissipation and the like; most of the current market products are such modular products, generally, the IGBT is also referred to as IGBT module; with the promotion of concepts of energy conservation, environmental protection and the like, the products are more and more common in the market;

the IGBT is a core device for energy conversion and transmission, is commonly called as a CPU of a power electronic device, is used as a new strategic industry of China, and is widely applied in the fields of rail transit, smart power grids, aerospace, electric vehicles, new energy equipment and the like;

although the fully self-aligned insulated gate bipolar transistor device disclosed in chinese patent application publication CN 103219238B 2 is a fully self-aligned technology, the bipolar transistor device of the present invention uses an insulating sidewall, and does not require photolithography, so that the width of the window of the polysilicon gate layer can be reduced to 4um, even to 2 um; therefore, a more refined graph can be realized, the device structure in the patent is completely symmetrical left and right, and the widths of two N + emitting electrodes are the same because the device has no photoetching alignment deviation; secondly, the reduction of the width of the window can reduce the area of the N + emission region, so that the latch-up effect of the device is obviously improved. The bipolar transistor device has the advantages that the insulating side wall is added on the structure, the structure of the device is completely aligned, the process steps can be reduced, the N + emitting region and the electrode hole do not need photoetching due to the existence of the insulating side wall, so that the steps needed by photoetching of the electrode hole and the N + emitting region can be saved, the width of a window can be reduced, the width of the window is reduced, the ratio of the areas of a polycrystalline grid and the polycrystalline window is increased, and the conduction voltage drop of the IGBT can be reduced;

however, the fully self-aligned insulated gate bipolar transistor device has the following disadvantages:

1. the structure is complex and the preparation is troublesome;

2. poor heat dissipation is easy to occur in the use process, when the temperature is too high, the internal elements of the transistor are easy to damage, and the service life is greatly reduced;

3. damage is easily caused when the device is not used, and dust easily enters the device to corrode the device.

Disclosure of Invention

Technical problem to be solved

Aiming at the defects of the prior art, the invention provides a fully self-aligned trench gate insulated gate bipolar transistor and a preparation method thereof.

(II) technical scheme

In order to achieve the purpose, the invention provides the following technical scheme: the solar cell comprises a backing layer, the upper surface of backing layer is equipped with the P + layer, the upper surface on P + layer is equipped with the drain region, the upper surface both sides of drain region have been seted up and have been leaked the injection zone, the top of leaking the injection zone is equipped with the source region, two the middle part in source region is equipped with gate insulation layer, gate insulation layer's top is equipped with polycrystalline silicon gate layer, the edge on polycrystalline silicon gate layer is equipped with insulating side wall.

Preferably, the bottom of bedding is equipped with insulating bottom plate, the jack has been seted up to insulating bottom plate's four corners department, the bottom welding of bedding has the heat dissipation layer, the bottom on heat dissipation layer is equipped with insulating bottom plate, the inside screw thread of insulating cover runs through there is the gim peg, insulating bottom plate's edge fixed mounting has the fin, the arc wall has been seted up to one side of fin, the inside fixed mounting of arc wall has the heat dissipation pipe, the fixed surface of heat dissipation pipe installs the extension piece, the heat dissipation pipe is equipped with the radiating fluid with the inside of extending the piece.

Preferably, the bottom joint of insulating bottom plate has the fixed plate, the bottom fixed mounting of fixed plate has the card box, the upper surface joint of card box has the lid, the edge of lid is seted up flutedly, the inside grafting of recess has spacing subassembly.

Preferably, the limiting assembly comprises a return spring, and a clamping block is fixedly mounted at one end of the return spring.

Preferably, the edge of the card box is provided with a slot matched with the clamping block, the inside of the slot is clamped with a pressing block, and the outer surface of the pressing block is carved with anti-skid grains.

Preferably, a transparent acrylic plate is embedded in the upper surface of the box cover.

Preferably, an insulating plate is fixedly mounted at the top of the radiating fin.

Preferably, the gate insulating layer is a silicon dioxide layer formed by a thermal oxidation process, and the width of the insulating side wall is 0.1-1um and the height is 0.7-2 um.

Preferably, the heat dissipation layer comprises a first copper layer, a ceramic layer is arranged at the bottom of the first copper layer, and a second copper layer is arranged at the bottom of the ceramic layer.

(III) advantageous effects

Compared with the prior art, the invention provides a fully self-aligned trench gate insulated gate bipolar transistor and a preparation method thereof, and the fully self-aligned trench gate insulated gate bipolar transistor has the following beneficial effects:

1. according to the fully self-aligned trench gate insulated gate bipolar transistor and the preparation method thereof, the P + layer, the drain region, the drain injection region, the source region, the gate insulating layer, the polycrystalline silicon gate layer and the insulating side wall are arranged, so that the preparation is simple, the photoetching steps are reduced, the production speed is improved, and the conduction loss of a device is reduced in the actual use process.

2. The fully self-aligned groove gate insulated gate bipolar transistor and the preparation method thereof can fully absorb heat generated in the using process through the multilayer arrangement of the heat dissipation layers, and through the arrangement of the heat dissipation fins, the heat dissipation fins can effectively absorb heat exhausted by the first copper layer, the ceramic layer and the second copper layer, and when the transistor works, the heat can be absorbed out through the heat dissipation fins, so that the temperature of the transistor is effectively reduced, through the arrangement of the heat dissipation conduit and the extension fins, the heat dissipation effect is further improved, the heat generation loss of the transistor during working is reduced, and the service life is prolonged.

3. The fully self-aligned groove gate insulated gate bipolar transistor and the preparation method thereof have the advantages that the transistor is fixed in the card box through the arrangement of the fixing plate, the transistor can be protected, the arrangement of the box cover further improves the protection effect, has high sealing degree, prevents the damage of dust and other tiny particles to the transistor, through the arrangement of the limiting component, when in use, the clamping block is pressed to drive the return spring to compress, the box cover is inserted into the clamping box to enable the clamping block to be aligned with the slot, the return spring drives the clamping block to push inwards to enable the clamping block to be inserted into the slot, thereby the effect of fixed lid has been played, prevents that the lid from droing, through the setting of pressing the briquetting, presses down during the use and presses the briquetting, makes its one end support the fixture block and inwards extrudees, makes the fixture block shift out from the slot to the effect of conveniently taking off the lid has been played.

Drawings

Fig. 1 is a schematic structural diagram of a fully self-aligned trench gate insulated gate bipolar transistor and a method for manufacturing the same according to the present invention;

fig. 2 is a schematic diagram of a split structure of a fully self-aligned trench gate insulated gate bipolar transistor and a method for manufacturing the same according to the present invention;

fig. 3 is a schematic cross-sectional view of a liner layer of a fully self-aligned trench gate insulated gate bipolar transistor and a method for fabricating the same according to the present invention;

fig. 4 is a schematic structural diagram of a fully self-aligned trench gate insulated gate bipolar transistor and a heat dissipation conduit of a method for manufacturing the same according to the present invention;

fig. 5 is a schematic structural diagram of an insulated bottom plate of a fully self-aligned trench gate insulated gate bipolar transistor and a method for manufacturing the same according to the present invention;

fig. 6 is a schematic diagram of an insulating plate structure of a fully self-aligned trench gate insulated gate bipolar transistor and a method for manufacturing the same according to the present invention;

fig. 7 is a schematic structural diagram of a fully self-aligned trench gate insulated gate bipolar transistor and a method for manufacturing the same according to the present invention;

fig. 8 is a schematic circuit structure diagram of a fully self-aligned trench gate insulated gate bipolar transistor and a method for manufacturing the same according to the present invention.

In the figure: 1. a backing layer; 2. a P + layer; 3. a drain region; 4. a drain implant region; 5. a source region; 6. a gate insulating layer; 7. a polysilicon gate layer; 8. an insulating sidewall; 9. an insulating base plate; 10. an insulating sleeve; 11. a fixing bolt; 12. a heat sink; 13. a heat dissipation conduit; 14. an extension piece; 15. a fixing plate; 16. a card box; 17. a box cover; 18. a limiting component; 1801. a return spring; 1802. a clamping block; 19. a pressing block; 20. a transparent acrylic sheet; 21. an insulating plate; 22. a heat dissipation layer; 2201. a first copper layer; 2202. a ceramic layer; 2203. a second copper layer.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Referring to fig. 1-8, the present invention provides a technical solution: a fully self-aligned trench gate insulated gate bipolar transistor and a preparation method thereof comprise a liner layer 1, wherein a P + layer 2 is arranged on the upper surface of the liner layer 1, a drain region 3 is arranged on the upper surface of the P + layer 2, drain injection regions 4 are arranged on two sides of the upper surface of the drain region 3, a source region 5 is arranged at the top of each drain injection region 4, an N + region is called a source region, and an electrode attached to the source region is called a source electrode (namely an emitter electrode E); the N base electrode is called a drain region; the control region of the device is the gate region, and the electrode attached to it is called the gate (i.e., gate G); the channel is formed close to the boundary of the gate region; the P-type region between the two poles of C, E, where the channel is formed, is referred to as the sub-channel region. And the P + region on the other side of the drain region is called a drain injection region, is a specific functional region of the IGBT, forms a PNP bipolar transistor together with the drain region and the sub-channel region, plays a role of an emitter, injects holes into the drain, and conducts modulation so as to reduce the on-state voltage of the device. The electrode attached to the drain injection region is called a drain electrode (namely a collector electrode C), the switching action of the IGBT is to form a channel by adding forward grid voltage, and base current is provided for a PNP (originally NPN) transistor to enable the IGBT to be conducted; and on the contrary, the reverse gate voltage is added to eliminate the channel, the base current is cut off, and the IGBT is turned off. The driving method of the IGBT is basically the same as that of the MOSFET, and only the N-channel MOSFET of the input electrode needs to be controlled, so that the IGBT has high input impedance characteristic; after the channel of the MOSFET is formed, injecting a hole from a P + base electrode to an N-layer, performing conductivity modulation on the N-layer, reducing the resistance of the N-layer, and enabling the IGBT to have low on-state voltage at high voltage, wherein a grid insulation layer 6 and a screen-shaped or spiral electrode consisting of metal filaments are arranged in the middle of two source regions 5; one or more electrodes with a fine wire mesh or spiral line shape arranged between an anode and a cathode in the multi-polar electron tube play a role in controlling the electric field intensity on the surface of the cathode so as to change the electron emission of the cathode or capture secondary emission electrons, and have the advantages of high input resistance (108-109 omega), low noise, low power consumption, large dynamic range, easy integration, no secondary breakdown phenomenon, wide safe working area and the like, and the electrode becomes a strong competitor of a bipolar transistor and a power transistor at present, and the field effect tube can be applied to amplification; because the input impedance of the field effect transistor amplifier is very high, the coupling capacitance can be small, and an electrolytic capacitor is not needed. Namely a metal-oxide-semiconductor type field effect, belonging to an insulated gate type; the method is mainly characterized in that a silicon dioxide insulating layer is arranged between a metal grid and a channel, so that the method has very high input resistance (up to 1015 omega); it is also divided into N channel tubes and P channel tubes; the substrate (base plate) and the source S are typically tied together. The MOSFET is further classified into an enhancement type and a depletion type according to a conduction manner. The enhancement mode refers to that: when VGS is 0, the tube is in an off state, and after the correct VGS is added, most carriers are attracted to the grid electrode, so that the carriers in the area are enhanced, and a conductive channel is formed; depletion mode is that when VGS is 0, i.e. a channel is formed, and when VGS is correct, most carriers can flow out of the channel, so that the carriers are "depleted" and the tube is turned off; taking an N channel as an example, two source diffusion regions N + and drain diffusion regions N + with high doping concentration are formed on a P-type silicon substrate, and then a source electrode S and a drain electrode D are respectively led out. The source and the substrate are internally communicated, and the source and the substrate are always kept at the same potential. When the drain is connected to the positive power supply electrode, the source is connected to the negative power supply electrode, and VGS is set to 0, the channel current (i.e., drain current) ID is set to 0. With the gradual increase of VGS, under the attraction of positive voltage of a grid electrode, negatively charged minority carriers are induced between two diffusion regions to form an N-type channel from a drain electrode to a source electrode, and when VGS is larger than the starting voltage VTN (generally about +2V) of a tube, the N-channel tube starts to be conducted to form a drain current ID; MOS field effect transistor is relatively 'gloomy'; the input resistance is very high, the capacitance between the grid and the source is very small, the capacitor is very easy to be charged by the induction of external electromagnetic field or static electricity, and a small amount of charge can form quite high voltage (U-Q/C) on the capacitance between the electrodes to damage the tube; therefore, when in a factory, all the pins are twisted together or arranged in the metal foil, so that the G pole and the S pole are in the same potential, and static charge accumulation is prevented; when the pipe is not used, all the leads are also in short circuit; when in measurement, care is taken and corresponding antistatic measures are taken, a polysilicon gate layer 7 is arranged on the top of the gate insulating layer 6, and polysilicon is in a form of simple substance silicon; when the molten simple substance silicon is solidified under the undercooling condition, silicon atoms are arranged into a plurality of crystal nuclei in a diamond lattice form, if the crystal nuclei grow into crystal grains with different crystal plane orientations, the crystal grains are combined to crystallize into polycrystalline silicon, and the polycrystalline silicon has gray metallic luster and the density of 2.32-2.34 g/cm 3. Melting point 1410 ℃. Boiling point 2355 deg.c. Dissolving in mixed acid of hydrofluoric acid and nitric acid, and dissolving in water, nitric acid and hydrochloric acid; the hardness is between germanium and quartz, and the cutting fluid is brittle at room temperature and easy to crack when being cut. When heated to 800 ℃ or higher, the steel has ductility, and when heated to 1300 ℃, the steel shows obvious deformation. Inactive at normal temperature and react with oxygen, nitrogen, sulfur and the like at high temperature; under the high-temperature melting state, the material has larger chemical activity and can almost act with any material. Has semiconductor properties and is an extremely important excellent semiconductor material, but the conductivity of the semiconductor material can be greatly influenced by trace impurities. The electronic industry is widely used for manufacturing basic materials of semiconductor radios, recorders, refrigerators, color televisions, video recorders, electronic computers and the like. The polycrystalline silicon is obtained by chlorinating dry silicon powder and dry hydrogen chloride gas under certain conditions, and then condensing, rectifying and reducing the chlorinated silicon. For example, anisotropy in mechanical, optical and thermal properties is far less pronounced than that of single crystal silicon; polysilicon crystals are also far less conductive than single crystal silicon, in terms of electrical properties, to the extent that they are almost non-conductive. The difference between the two is extremely small in chemical activity. Polycrystalline silicon and monocrystalline silicon can be distinguished from the appearance, but the real identification needs to determine the crystal face direction, the conductive type, the resistivity and the like of the crystal through analysis; the polycrystalline silicon is a direct raw material for producing monocrystalline silicon, and is an electronic information base material of semiconductor devices such as modern artificial intelligence, automatic control, information processing, photoelectric conversion and the like, an insulating side wall 8 is arranged at the edge of a polycrystalline silicon grid layer 7, and through arrangement of a P + layer 2, a drain region 3, a drain injection region 4, a source region 5, a grid insulating layer 6, the polycrystalline silicon grid layer 7 and the insulating side wall 8, the preparation is simple, photoetching steps are reduced, the production speed is improved, and the conduction loss of the devices is reduced in the actual use process; the insulating material is a non-conductive material under the allowable voltage, but is not an absolutely non-conductive material, and can also generate the processes of conduction, polarization, loss, breakdown and the like under the action of certain external electric field intensity, but can also generate aging after long-term use, the insulating material is the basis and the guarantee of the development of electrical products, has a particularly important function on the development of motors and electrical industries, the development and the progress of the insulating material depend on the development of high molecular materials and directly restrict and influence the development and the progress of the electrical products, the insulating material is the key of the advanced technology of the electrical products, and is also the important guarantee of the long-term safe and reliable operation of the electrical products; therefore, the new variety of insulating materials is required to be developed continuously, the product performance and the product quality are improved, so as to meet the requirement of the continuous development of electrical products, jacks are formed at four corners of an insulating base plate 9, an insulating sleeve 10 is fixedly installed inside each jack, a fixing bolt 11 penetrates through an internal thread of the insulating sleeve 10, and a radiating fin 12 is fixedly installed at the edge of the insulating base plate 9, is a device for radiating an easily-heating electronic element in an electrical appliance and is made of aluminum alloy, brass or bronze into a plate shape, a sheet shape, a multi-sheet shape and the like. Generally, a layer of heat-conducting silicone grease is coated on the contact surface of an electronic element and a heat sink when the heat sink is in use, so that heat emitted by the element is more effectively conducted onto the heat sink and then dissipated to ambient air through the heat sink. Copper has good thermal conductivity, but is expensive, has high processing difficulty, overlarge weight (many pure copper radiators exceed the weight limit of a CPU), small thermal capacity and easy oxidation; pure aluminum is too soft and cannot be directly used, and the pure aluminum is an aluminum alloy which can provide enough hardness, and the aluminum alloy has the advantages of low price and light weight, but the heat conductivity is much lower than that of copper; some radiators take their advantages, a copper plate is embedded in the base of the aluminum alloy radiator, through the arrangement of the radiating fin 12, the radiating fin 12 can effectively absorb the heat discharged by the first copper layer 2201, the ceramic layer 2202 and the second copper layer 2203, when the transistor works, the heat can be absorbed by the radiating fin 12, thereby effectively reducing the temperature, one side of the radiating fin 12 is provided with an arc-shaped groove, the inside of the arc-shaped groove is fixedly provided with a radiating conduit 13, the outer surface of the radiating conduit 13 is fixedly provided with an extending sheet 14, through the arrangement of the radiating conduit 13 and the extending sheet 14, the radiating effect is further improved, so that the heating loss is reduced when the transistor works, the service life is prolonged, the inside of the radiating conduit 13 and the extending sheet 14 is provided with radiating liquid, the bottom of the insulating base plate 9 is clamped with a fixing plate 15, through the arrangement of the fixing plate 15, the effect of fixing the transistor inside the card box 16 is achieved, the transistor can be protected, the bottom of the fixing plate 15 is fixedly provided with the clamping box 16, the upper surface of the clamping box 15 is clamped with the box cover 17, the protection effect is further improved through the arrangement of the box cover 17, the sealing degree is high, the transistor is prevented from being damaged by dust and other tiny particles, and the bipolar transistor is composed of two back-to-back PN junctions to obtain a voltage, a current or a signal gain; originally originated from the point contact transistor invented in 1948, the transistor was developed into a junction transistor in the first 50 s, namely a bipolar transistor; bipolar transistors have two basic structures: PNP type and NPN type; in the 3 layers of semiconductors, the middle layer is called a base region, and the two outer layers are respectively called an emitter region and a collector region; when a small amount of current is injected into the base region, a larger current is formed between the emitter region and the collector region, namely, a groove is formed at the edge of a transistor amplification effect box cover 17, a limiting component 18 is inserted into the groove, through the arrangement of the limiting component 18, when the transistor amplification effect box cover is used, a fixture block 1802 is pressed to drive a return spring 1801 to compress, the box cover 17 is inserted into a box 16, the fixture block 1802 and a slot are aligned, the return spring 1801 drives the fixture block 1802 to move inwards, the fixture block 1802 is inserted into the slot, so that the effect of fixing the box cover 17 is achieved, the box cover 17 is prevented from falling off, the limiting component 18 comprises the return spring 1801, one end of the return spring 1801 is fixedly provided with the fixture block 1802, the edge of the box 15 is provided with the slot matched with the fixture block 1802, the inside of the slot is clamped with a pressing block 19, through the arrangement of the pressing block 19, the pressing block 19 is pressed against the block 19 when the transistor amplification effect box cover is used, one end of the fixture block 1802 is pressed inwards, make fixture block 1802 follow the slot and shifted out to play the effect of conveniently taking off lid 17, set up anti-skidding line according to the surface sculpture of pressing piece 19, the upper surface of lid 17 inlays and is equipped with transparent acrylic plate 20, and acrylic plate has quartzy general transparency, and the luminousness reaches more than 92%, and the acrylic plate colored with the dyestuff has fine color development effect again, in addition, acrylic plate: the coating has excellent weather resistance, higher surface hardness and surface gloss and better high temperature resistance; the acrylic plate has good processing performance and can be divided into a casting type and an extrusion type according to the production process; both thermoforming (including molding, blow molding and vacuum forming) and machining such as drilling, turning, washing, cutting and the like can be adopted; the mechanical cutting and scraping and carving controlled by the microcomputer not only greatly improves the processing precision, but also can produce more exquisite patterns and shapes than the traditional mode; in addition, the acrylic plate can be cut by laser and engraved by laser, a product with special effect is manufactured, the acrylic plate has excellent weather resistance, is particularly applied to other plastic crowns outdoors and outdoors, has good surface hardness and luster, has large processing plasticity, and can be manufactured into various required shapes and products; the board is various in types and rich in colors (including semitransparent color boards), and is characterized in that the thick plate can still maintain high transparency, an insulating board 21 is fixedly arranged at the top of a radiating fin 12, a grid insulating layer 6 is a silicon dioxide layer formed by a thermal oxidation process, the width of an insulating side wall 8 is 0.1-1um, the height of the insulating side wall 8 is 0.7-2um, a radiating layer 22 comprises a first copper layer 2201, a ceramic layer 2202 is arranged at the bottom of the first copper layer 2201, the common metal radiator can radiate heat for fluids below 800 ℃, the metal radiator can not radiate corrosive fluids, the ceramic radiating which can not achieve the radiating purpose has the following characteristics of high temperature resistance and corrosion resistance, so that the ceramic radiator can be used for radiating heat for various high-temperature and high-corrosion fluids, the radiating effect is good, the service life is long, and the ceramic radiator is several times or dozens of that of the metal radiator under the same conditions, the bottom of the ceramic layer 2202 is provided with a second copper layer 2203.

When the invention is used, the P + layer 2, the drain region 3, the drain injection region 4, the source region 5, the grid insulation layer 6, the polysilicon grid layer 7 and the insulation side wall 8 are arranged, the preparation is simple, the photoetching steps are reduced, the production speed is improved, the conduction loss of a device is reduced in the practical use process, the heat generated in the use process can be fully absorbed by the multi-layer arrangement of the heat dissipation layer 22, the heat dissipated by the first copper layer 2201, the ceramic layer 2202 and the second copper layer 2203 can be effectively absorbed by the heat dissipation fin 12 by the arrangement of the heat dissipation fin 12, the heat dissipation effect can be further improved by the arrangement of the heat dissipation conduit 13 and the extension piece 14, the heat dissipation loss in the transistor operation process is reduced, the service life is prolonged, and by the arrangement of the fixing plate 15, the transistor fixing box has the advantages that the transistor fixing box is fixed inside the clamping box 16, the transistor can be protected, the protection effect is further improved through the arrangement of the box cover 17, the sealing degree is high, the transistor is prevented from being damaged by dust and other tiny particles, the arrangement of the limiting assembly 18 is adopted, the clamping block 1802 is pressed during use, the clamping block 1802 is made to drive the reset spring 1801 to compress, the box cover 17 is inserted into the clamping box 16, the clamping block 1802 and the inserting groove are made to be opposite to each other, the reset spring 1801 drives the clamping block 1802 to move inwards, the clamping block 1802 is made to be inserted into the inserting groove, the effect of fixing the box cover 17 is achieved, the box cover 17 is prevented from falling off, the pressing block 19 is pressed during use, one end of the pressing block 19 abuts against the clamping block 1802 to be inwards pressed, the clamping block 1802 is made to be moved out from the inserting groove, and the effect of conveniently taking down the box cover 17 is achieved

In the invention, the preparation method of the device comprises the following steps:

1. firstly, a layer of polysilicon is deposited on a single crystal silicon wafer with a silicon dioxide film, and then two diffusion windows are etched on the polysilicon. When impurities diffuse into the monocrystalline silicon through the two windows to form a source and a drain, a polycrystalline silicon gate is automatically formed. The source, the drain and the gate can be simultaneously formed only by one-time photoetching in the process, and the position of the gate is etched. "source" and "drain". The diffusion window is automatically aligned with the positions of the source and the drain, so that the silicon gate self-alignment process is called, and the diffusion self-alignment process is also called sometimes; in the fabrication of a typical metal-oxide-semiconductor (MOS) field effect transistor, at least two photolithography steps are performed: etching a diffusion window of a source and a drain on the silicon dioxide film for the first time; the second time is after growing a new silicon dioxide layer on the wafer, the location of the "gate" region is etched. Since the gate is between the "source" and "drain" and the distance between the "source" and "drain" is small (smaller is always desirable to be better to increase the frequency), it is necessary to precisely align the second photolithography with the position of the first photolithography mask, otherwise, the gate (aluminum gate) may not be connected to the "source" or "drain" and the transistor will not work. To avoid this, the second photolithography intentionally leaves the width of the gate slightly larger so that both sides of the gate can cover a bit of the "source" and "drain" regions. However, this increases the gate capacitance, increases the threshold voltage of the transistor, and decreases the switching speed;

2. wet cleaning (keeping the surface of the silicon wafer free of impurities with various reagents) → lithography (irradiating the silicon wafer with ultraviolet rays through a mask, the irradiated place is easily cleaned away, the non-irradiated place is kept as it is, and thus a desired pattern can be etched on the silicon wafer, noting that, at this time, there is no impurity added, still a silicon wafer.) → ion implantation (different impurities are added at different positions of the silicon wafer, and different impurities form a field effect tube depending on the concentration/position), → dry etching (the shape previously etched by the lithography has many structures which are not really necessary but are etched for the ion implantation; they are now washed away by plasma, or some first lithography does not require etching first, this step of etching → wet etching (further cleaning, but reagents are used, so called wet etching) -after the above steps are completed, the field effect transistor is already manufactured, but the above steps are generally not performed for more than one time, and repeated operations are likely to be required to meet the requirements. ) Plasma rinse (bombarding the entire chip with a weaker plasma beam) → rapid thermal annealing (i.e., momentarily irradiating the entire chip through high power lamps above 1200 degrees celsius and then slowly cooling down, in order to enable the implanted ions to be better activated and thermally oxidized) → Chemical Vapor Deposition (CVD), further finely processing various substances on the surface → Physical Vapor Deposition (PVD), and similarly, coating can be applied to the sensitive part → plastic encapsulation of the housing → potting and curing of the housing → terminal forming → functional testing.

It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, the use of the verb "comprise a" to define an element does not exclude the presence of another, same element in a process, method, article, or apparatus that comprises the element.

Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.