阅读说明：本技术 堆叠和交错的变压器布局 (Stacked and interleaved transformer layout ) 是由 K·哈迪珀尔·阿贝克纳尔 M·德尚 于 2021-05-26 设计创作，主要内容包括：本公开的各实施例涉及堆叠和交错的变压器布局。一种变压器结构可以包括：具有一个或多个匝的第一线圈,以及具有一个或多个匝的第二线圈。第一线圈的一个或多个匝中的匝可以基本上沿第一线圈的匝在横向方向以及基本上沿第一线圈的匝在竖直方向与第二线圈的一个或多个匝中的匝重叠。在一些实现中,变压器结构可以被集成在半导体器件中。(Embodiments of the present disclosure relate to stacked and interleaved transformer layouts. A transformer structure may include: a first coil having one or more turns, and a second coil having one or more turns. The turns of the one or more turns of the first coil may overlap the turns of the one or more turns of the second coil substantially in a lateral direction along the turns of the first coil and substantially in a vertical direction along the turns of the first coil. In some implementations, the transformer structure may be integrated in a semiconductor device.)

1. A transformer structure comprising:

a first coil having one or more turns; and

a second coil having one or more turns,

wherein a turn of the one or more turns of the first coil overlaps the one or more turns of the second coil substantially in a lateral direction along the turn of the first coil and substantially in a vertical direction along the turn of the first coil.

2. The transformer structure of claim 1, wherein the transformer structure is integrated in a semiconductor device.

3. The transformer structure of claim 1, wherein the turns of the first coil overlap the turns of the second coil in the lateral direction and in the vertical direction along more than one quarter of the turns of the first coil.

4. The transformer structure of claim 1, wherein the first coil is a primary coil of the transformer structure and the second coil is a secondary coil of the transformer structure.

5. The transformer structure of claim 1, wherein the first coil is a secondary coil of the transformer structure and the second coil is a primary coil of the transformer structure.

6. The transformer structure of claim 1, wherein a first portion of the turn of the first coil is formed from a first metal layer of a metal stack and a second portion of the turn of the first coil is formed from a second metal layer of the metal stack, the first portion of the turn of the first coil being connected to the second portion of the turn of the first coil substantially along the turn of the first coil.

7. The transformer structure of claim 6, wherein the first portion of the turn of the first coil overlaps the turn of the second coil in the lateral direction and the second portion of the turn of the first coil overlaps the turn of the second coil in the vertical direction.

8. The transformer structure of claim 6, wherein the second coil is formed from the first metal layer.

9. The transformer structure of claim 6, wherein the first metal layer is connected to the second metal layer substantially along the turns of the first coil by a via structure between the first metal layer and the second metal layer.

10. A method, comprising:

forming a first coil having at least one turn; and

forming a second coil having at least one turn,

wherein a first portion of a turn of the first coil is formed to overlap a turn of the second coil in a first direction substantially along the first portion of the turn of the first coil, an

Wherein a second portion of the turn of the first coil is formed to overlap the turn of the second coil in a second direction substantially along the second portion of the turn of the first coil,

wherein the second direction is perpendicular to the first direction.

11. The method of claim 10, wherein the first coil and the second coil are integrated in a semiconductor device.

12. The method of claim 10, wherein the first portion of the turn of the first coil is formed to overlap the turn of the second coil in the first direction along at least a quarter of the turn of the first coil, and the second portion of the turn of the first coil is formed to overlap the turn of the second coil in the second direction along the at least a quarter of the turn of the first coil.

13. The method of claim 10, wherein the first coil is a primary coil of a transformer structure and the second coil is a secondary coil of the transformer structure.

14. The method of claim 10, wherein the first coil is a secondary coil of a transformer structure and the second coil is a primary coil of the transformer structure.

15. The method of claim 10, wherein the first portion of the turn of the first coil is formed from a first metal layer of a metal stack and the second portion of the turn of the first coil is formed from a second metal layer of the metal stack, the first portion of the turn of the first coil being connected to the second portion of the turn of the first coil substantially along the turn of the first coil.

16. The method of claim 15, wherein the second coil is formed from the first metal layer.

17. A semiconductor device, comprising:

a transformer structure comprising:

a first coil having one or more turns; and

a second coil having one or more turns,

wherein a turn of the one or more turns of the first coil substantially overlaps a turn of the one or more turns of the second coil in a lateral direction and in a vertical direction along the turn of the first coil.

18. The semiconductor device of claim 17, wherein the turn of the first coil overlaps the turn of the second coil in the lateral direction and in the vertical direction along at least a quarter of the turn of the first coil.

19. The semiconductor device of claim 17, wherein the first coil is a primary coil of the transformer structure and the second coil is a secondary coil of the transformer structure.

20. The semiconductor device of claim 17, wherein a first portion of the turn of the first coil is formed from a first metal layer of a metal stack, a second portion of the turn of the first coil is formed from a second metal layer of the metal stack, and the second coil is formed from the first metal layer substantially along the turn of the first coil.

Technical Field

Embodiments of the present disclosure relate to stacked and interleaved transformer layouts.

Background

Transformers and transformer-based components (such as power splitters, combiners, etc.) may be used in millimeter (mm) wave integrated circuit designs. An important parameter in the design of a transformer structure is the insertion loss of the coils (e.g., primary, secondary), which directly affects the output power of the transmitter and/or the noise figure of the receiver. One type of conversion structure is a stacked transformer structure. Stacked transformer structures rely on vertical (i.e., transverse) coupling between coils lying primarily in different planes. Another type of transformer structure is an interleaved transformer structure. Interleaved transformer structures (also referred to as planar transformer structures) rely on lateral (i.e., side-to-side) coupling between coils that lie primarily in the same plane.

Disclosure of Invention

According to some possible implementations, the transformer structure may include a first coil having one or more turns; and a second coil having one or more turns, wherein a turn of the one or more turns of the first coil overlaps a turn of the one or more turns of the second coil substantially in a lateral direction along the turn of the first coil and substantially in a vertical direction along the turn of the first coil.

According to some possible implementations, a method may include: forming a first coil having at least one turn; and forming a second coil having at least one turn, wherein a first portion of the turn of the first coil is formed to overlap the turn of the second coil substantially along the turn of the first coil in a first direction of the first portion, and wherein a second portion of the turn of the first coil is formed to overlap the turn of the second coil substantially along the turn of the first coil in a second direction of the second portion, wherein the second direction is perpendicular to the first direction.

According to some possible implementations, the semiconductor device may include a transformer structure including: a first coil having one or more turns; and a second coil having one or more turns, wherein a turn of the one or more turns of the first coil substantially overlaps a turn of the one or more turns of the second coil in a lateral direction and in a vertical direction along the turn of the first coil.

Drawings

Fig. 1A-1H are diagrams associated with a first example implementation of a transformer structure that includes a stacked and interleaved architecture as described herein.

Fig. 2A-2D are diagrams associated with a second example implementation of a transformer structure that includes a stacked and interleaved architecture as described herein.

Fig. 3A-3J are diagrams associated with a third example implementation of a transformer structure that includes a stacked and interleaved architecture as described herein.

Fig. 4 is a flow chart of an example process for providing a transformer structure with a stacked and interleaved architecture as described herein.

Detailed Description

The following detailed description of example implementations refers to the accompanying drawings. The same reference numbers in different drawings may identify the same or similar elements.

One factor that determines the amount of insertion loss of the transformer structure is the coupling between the primary coil of the transformer structure and the secondary coil of the transformer structure. As the operating frequency of using the transformer structure increases (e.g., to millimeter wave frequencies or higher), the size of the transformer structure becomes smaller, which makes it more difficult to achieve a high coupling coefficient and thereby reduce insertion loss. Prior techniques for reducing insertion loss in transformer structures include the use of stacked or interleaved structures (e.g., with at least the minimum required spacing between transformer turns). Other options are also possible, such as using a specially designed layout (e.g., a four-wire combiner) or a design based on a different size transformer structure.

Typically, fabrication techniques that provide a metal stack with two thick metal layers (e.g., having a thickness equal to or greater than about 1 micrometer (μm)) are used to fabricate millimeter-wave integrated circuits. However, in some cases, the fabrication technique may provide a metal stack with only a single thick metal layer. In this case, a stacked structure is not feasible (e.g., because the stacked structure requires at least two thick metal layers to form the primary and secondary coils), so an interleaved structure (e.g., the primary and secondary coils are formed on a single thick metal layer) is a typical candidate for implementing a transformer structure. Both quality (Q) factor and electromigration aspects benefit from the use of an interleaved structure. However, transformer structures with a staggered design cannot achieve low insertion loss for certain primary and secondary inductances due to minimum spacing requirements (e.g., the amount of spacing between turns of a coil is certain), because the required spacing limits the achievable coupling between coils of the transformer structure.

Some implementations described herein provide transformer structures with stacked and staggered designs. In some implementations, a transformer structure having a stacked and interleaved design (referred to herein as a stacked/interleaved transformer structure) may have a first coil and a second coil, where turns of the first coil overlap turns of the second coil both substantially along turns of the first coil in a lateral direction (e.g., to provide lateral coupling substantially along turns of the first coil) and substantially along turns of the first coil in a vertical direction (e.g., to provide vertical coupling substantially along turns of the first coil).

In some implementations, the stacked/interleaved transformer structure reduces insertion loss and increases the coupling coefficient between the primary and secondary coils (e.g., compared to the stacked structure alone, compared to the interleaved structure alone). That is, by employing a combination of interleaved and stacked architectures, the stacked/interleaved transformer structure can obtain the advantages of both the stacked approach and the interleaved approach. Additionally, the stacked/interleaved transformer structure design described herein does not affect the size or overall structure of the primary or secondary coils, which means that the stacked/interleaved transformer structure can be easily integrated into a current integrated circuit design. In some implementations, the stacked/interleaved transformer structures described herein, when used in a radar transceiver system, can increase the output power of the transmitter and reduce the noise figure of the low noise amplifier, both of which affect the signal-to-noise ratio (SNR) of the radar transceiver system, meaning that the stacked/interleaved transformer structures can improve the quality of the radar image.

In some implementations, the stacked/interleaved transformer structure includes an interleaved structure in which both the primary and secondary coils are formed on a thick metal layer. Further, the stacked/interleaved transformer structure includes a stacked structure using additional winding geometries connected to the primary or secondary windings, which is formed on a thin (e.g., having a thickness of less than about 1 μm) metal layer below a thick metal layer. Here, the combination of stacked and interleaved architectures increases the coupling between the primary and secondary coils.

Notably, stacked/interleaved transformer structures may be particularly useful when the fabrication technique provides a metal stack with a single thick metal layer. However, stacked/interleaved transformer structures may be used in other situations (such as when the fabrication technique provides a metal stack with two thick metal layers) and still provide the benefits described above. For example, when the manufacturing technique provides a metal stack with two thick metal layers, a stacked/interleaved transformer structure may be achieved by including a lateral winding parallel to the upper turns, thereby increasing the coupling coefficient of the transformer structure.

Fig. 1A-1H are diagrams associated with a first example implementation of a transformer structure 100 that includes a stacked and interleaved architecture. In some implementations, the transformer structure 100 is integrated in a semiconductor device. In some implementations, the transformer structure 100 may be used to implement a coil included in a combiner, splitter, or the like in a power amplifier or another type of circuit (e.g., a low noise amplifier) that requires low insertion loss and/or high magnetic coupling.

Fig. 1A shows a two-dimensional (2D) plan view, fig. 1B shows a three-dimensional (3D) view, fig. 1C shows a 3D cross-section, and fig. 1D shows a 3D exploded view of a first example implementation of the transformer structure 100 of the first example implementation of the transformer structure 100 of the second example implementation of the transformer structure 100 of the first example implementation of the transformer structure 100 of the second example implementation of the first example implementation of the transformer structure of the second example implementation of the transformer structure of the second example implementation of the transformer structure of the second example implementation of the second example of the transformer structure of the second example of the transformer structure 100 of the second example of the second embodiment of the second example structure of the second example of the second embodiment of.

In some implementations, the transformer structure 100 may include a first coil 102 having one or more turns and a second coil 104 having one or more turns. For example, as shown in fig. 1A-1D, the transformer structure 100 may include a first coil 102 and a second coil 104, each having a single turn. It is noted that in other implementations, the first coil 102 and/or the second coil 104 may have multiple turns, and the number of turns of the first coil 102 does not have to match the number of turns of the second coil 104. In some implementations, the first coil 102 is a primary coil of the transformer structure 100 and the second coil 104 is a secondary coil of the transformer structure 100. Alternatively, in some implementations, the first coil 102 is a secondary coil of the transformer structure 100 and the second coil 104 is a primary coil of the transformer structure 100.

In some implementations, to provide a stacked and interleaved structure, the turns of the first coil 102 substantially overlap the turns of the second coil 104 in a lateral direction along the turns of the first coil 102 and substantially overlap the turns of the second coil 104 in a vertical direction along the turns of the first coil 102. For example, in some implementations, the turns of the first coil 102 overlap the turns of the second coil 104 in a lateral direction along more than one quarter of the turns of the first coil 102 (i.e., 25% of the length of the turns), and overlap the turns of the second coil 104 in a vertical direction along more than one quarter of the turns of the first coil 102. In some implementations, as indicated in the cross-section of fig. 1C, the overlap in the lateral direction is provided by the first portion 102a of the first coil 102, and the overlap in the vertical direction is provided by the second portion 102b of the first coil 102.

Notably, in the first example implementation, the first coil 102 is an outer coil of the transformer structure 100 and the second coil 104 is an inner coil of the transformer structure 100. However, in another implementation, the first coil 102 may be an inner coil of the transformer structure 100 and the second coil 104 may be an outer coil of the transformer structure 100. In this case, as shown in the first example implementation of the transformer structure 100, the second portion 102b extends outward (e.g., from the inner coil toward the outer coil) rather than inward (e.g., from the outer coil toward the inner coil).

In some implementations, the first portion 102a is formed from a first metal layer (e.g., a thick metal layer) of the metal stack and the second portion 102b is formed from a second metal layer (e.g., a thin metal layer, a second metal layer from the top) of the metal stack. Here, as shown in fig. 1C, the first portion 102a may be connected to the second portion 102b substantially along turns of the first coil 102 through a via structure 102C between the first metal layer and the second metal layer. In some implementations, the second coil 104 is formed from a first metal layer. In a first example implementation of the transformer structure 100, the first coil 102 is implemented in a first metal layer and a second metal layer (e.g., such that the first coil 102 extends below the second coil 104), while the second coil 104 is implemented in the first metal layer. Due to this stacked and interleaved structure, there will be lateral and vertical coupling between the first coil 102 and the second coil 104 substantially along the turns of the first coil 102. Furthermore, the extension of the first coil 102 below the second coil 104 improves the insulation of the second coil 104 from the substrate, resulting in an increased coupling between the first coil 102 and the substrate.

Notably, the addition of parallel metal paths on the first coil 102 (i.e., the second portion 102b) may result in a difference between the Q-factor of the first coil 102 and the Q-factor of the second coil 104. However, in many applications, equal Q factors are not required on the primary and secondary coils. In addition, since the layout of the coils requires an underground tunnel, the Q factor of the primary coil and the secondary coil in the conventional transformer structural layout is different in many cases. In some cases, the stacked/interleaved architecture of the transformer structure 100 may not only not increase this difference in Q-factor, but may also help restore a balance between the Q-factor of the first coil 102 and the Q-factor of the second coil 104. Furthermore, the stacked/interleaved transformer structure may have an increased parasitic capacitance that shifts the self-resonant frequency (SRF) by a small amount (e.g., on the order of a few gigahertz). However, the SRF is typically well beyond the operating frequency of the transformer structure 100, and therefore, such a shift does not significantly affect the performance of the transformer structure 100.

Fig. 1E-1H are diagrams illustrating examples of simulated improvements in transformer performance parameters provided by a first example implementation of transformer structure 100 (e.g., where first coil 102 is an outer coil and second coil 104 is an inner coil). In the example associated with fig. 1E-1H, the first coil 102 is a secondary coil and the second coil 104 is a primary coil. In fig. 1E-1H, the lines corresponding to the performance parameters of the first example implementation of transformer structure 100 are labeled "TS 100" and the lines corresponding to the performance parameters of a conventional transformer structure (transformer structure with only interleaved structure) are labeled "ILTS".

Fig. 1E illustrates the improvement in insertion loss provided by the first example implementation of transformer structure 100. As shown in fig. 1E, the first example implementation of the transformer structure 100 may reduce insertion loss by approximately 0.18 decibels (dB) over conventional transformer structures over the possible operating range of the transformer structure (e.g., between approximately 60 gigahertz (GHz) to approximately 100 GHz).

Fig. 1F illustrates the improvement in coupling coefficient (K) provided by the first example implementation of transformer structure 100. As shown in fig. 1F, the first example implementation of the transformer structure 100 may increase the coupling coefficient by about 0.06 (i.e., about 9%) as compared to a conventional transformer structure.

Fig. 1G illustrates the improvement in matching of the Q-factors of the primary and secondary coils provided by the first example implementation of transformer structure 100. In fig. 1G, the Q factor of the primary coil of the first example implementation of transformer structure 100 is identified as "TS 100_P", the Q factor of the secondary coil of the first example implementation of transformer structure 100 is identified as" TS100_S", the Q factor of the primary winding of a conventional transformer structure is identified as" ILTS_P", and the Q factor of the secondary winding of a conventional transformer structure is identified as" ILTSs ". As shown in fig. 1G, in the first example implementation of the transformer structure 100, the Q-factors of the primary and secondary coils of the first example implementation of the transformer structure 100 are more closely matched than the Q-factors of the primary and secondary coils of a conventional transformer structure.

Fig. 1H illustrates the effect on the inductance of a first example implementation of the transformer structure 100. In fig. 1H, the inductance of the primary coil of the first example implementation of transformer structure 100 is identified as "TS 100_P", the inductance of the secondary coil of the first example implementation of transformer structure 100 is identified as" TS100_S", the inductance of the primary of a conventional transformer structure is identified as" ILTS_P", and the inductance of the secondary of a conventional transformer structure is identified as" ILTS_S". As shown in fig. 1H, in the first example implementation of the transformer structure 100, the inductance of the secondary coil of the first example implementation of the transformer structure 100 may be lower than the inductance of the secondary coil of the conventional transformer structure. Further, as shown, the primary and secondary coils of the first example implementation of the transformer structure 100 are more conventional than conventional transformationThe inductances of the primary and secondary coils of the device structure are more closely matched.

As described above, fig. 1A to 1H are provided as examples. Other examples may differ from the examples described with respect to fig. 1A-1H. The number and arrangement of coils, turns, and layers shown in fig. 1A-1H are provided as examples. Indeed, there may be additional turns, additional layers, fewer turns, fewer layers, different coils, different turns, different layers, different shapes of coils, different shapes of turns, different shapes of layers, different arrangements of coils, different arrangements of turns, or different arrangements of layers than the turns, layers, and coils shown in fig. 1A-1H. Further, the dimensions of the coils, turns, and layers shown in fig. 1A-1H are provided as examples. Indeed, the coils, turns, and/or layers may have different sizes or relative sizes as compared to the coils, turns, and/or layers shown in fig. 1A-1H.

Fig. 2A-2D are graphs illustrating improvements in transformer performance parameters provided by a second example implementation of transformer structure 100. In a second example implementation of the transformer structure 100, the first coil 102 is an inner coil and the second coil 104 is an outer coil (e.g., such that the second portion 102b of the first coil 102 extends outward below the second coil 104). In the example associated with fig. 2A-2D, the first coil 102 is a primary coil and the second coil 104 is a secondary coil. In fig. 2A-2D, lines corresponding to performance parameters of the second example implementation of transformer structure 100 are labeled "TS 100" and lines corresponding to performance parameters of a conventional transformer structure (a transformer structure with only an interleaved structure) are labeled "ILTS".

Fig. 2A illustrates the improvement in insertion loss provided by the second example implementation of transformer structure 100. As shown in fig. 2A, the second example implementation of transformer structure 100 may reduce insertion loss by approximately 0.30dB compared to a conventional transformer structure over the possible operating range of the transformer structure (e.g., between approximately 60GHz to approximately 100 GHz).

Fig. 2B illustrates the improvement in coupling coefficient provided by the second example implementation of transformer structure 100. As shown in fig. 2B, the second example implementation of transformer structure 100 may increase the coupling coefficient by about 0.07 (i.e., about 10%) as compared to the conventional transformer structure.

Fig. 2C shows the variation of the Q-factor of the primary and secondary coils provided by the second example implementation of the transformer structure 100. In fig. 2C, the Q factor of the primary coil of the second example implementation of the transformer structure 100 is identified as "TS 100_P", the Q factor of the secondary coil of the second example implementation of transformer structure 100 is identified as" TS100_S", the Q factor of the primary winding of a conventional transformer structure is identified as" ILTS_P", and the Q factor of the secondary winding of a conventional transformer structure is identified as" ILTS_S". As shown in fig. 2C, in the second implementation of the transformer structure 100, the difference in Q-factors of the primary and secondary coils of the second example implementation of the transformer structure 100 may be greater than the difference between the Q-factors of the primary and secondary coils of a conventional transformer structure at most frequencies. In some implementations, the difference between the Q factors associated with the second example implementation of the transformer structure 100 may be designed to provide a desired difference in Q factors.

Fig. 2D shows the effect on the inductance of a second example implementation of the transformer structure 100. In fig. 2D, the inductance of the primary coil of the second example implementation of the transformer structure 100 is identified as "TS 100_P", the inductance of the secondary coil of the second example implementation of transformer structure 100 is identified as" TS100_S", the inductance of the primary of a conventional transformer structure is identified as" ILTS_P", and the inductance of the secondary of a conventional transformer structure is identified as" ILTS_S". As shown in fig. 2D, in the second example implementation of the transformer structure 100, the inductance of the primary coil of the second example implementation of the transformer structure may be lower than the inductance of the primary coil of the conventional transformer structure over the operating range, and the inductance of the secondary coil of the second example implementation of the transformer structure 100 may be lower than the inductance of the secondary coil of the conventional transformer structure over the entire operating range.

As described above, fig. 2A-2D are provided as examples. Other examples may differ from the examples described with respect to fig. 2A-2D.

Fig. 3A-3J are diagrams associated with a third example implementation of the transformer structure 100. A third example implementation of the transformer structure 100 is a 2:1 transformer. Fig. 3A shows a 2D plan view, fig. 3B shows a 3D view, fig. 3C shows a 3D cross-section, and fig. 3D shows a 3D exploded view of a third example implementation of the transformer structure 100, of the transformer structure 100. Notably, fig. 3A-3D show one half of a 1:2 power combiner.

In some implementations, as described above, the transformer structure 100 may include a first coil 102 having one or more turns and a second coil 104 having one or more turns. For example, as shown in fig. 3A-3D, the transformer structure 100 may include a first coil 102 having one turn and a second coil 104 having two turns.

In some implementations, as described above, to provide a stacked and interleaved structure, the turns of the first coil 102 substantially overlap the turns of the second coil 104 in a lateral direction along the turns of the first coil 102, and substantially overlap the turns of the second coil 104 in a vertical direction along the turns of the first coil 102. In some implementations, as shown in the cross-section of fig. 3C, the overlap in the lateral direction is provided by a first portion 102a of the first coil 102, while the overlap in the vertical direction is provided by a second portion 102b of the first coil 102.

Notably, in the third example implementation, the first coil 102 is an intermediate coil of the transformer structure 100, and the second coil 104 includes an inner coil (forming a first turn) of the transformer structure 100 and an outer coil (forming a second turn) of the transformer structure 100. As shown, in the third example implementation, the second portion 102b extends outward toward the outer coil of the second coil 104. However, in another implementation, the second portion 102b of the first coil 102 may extend inward (e.g., below the inner coil of the second coil 104).

Fig. 3E-3J are graphs illustrating examples of simulated improvements in transformer performance parameters provided by a third example implementation (e.g., combiner) of the transformer structure 100. In the example associated with fig. 3E-3J, the first coil 102 is a secondary coil and the second coil 104 is a primary coil. In fig. 3E-3J, lines corresponding to performance parameters of a third example implementation of transformer structure 100 are labeled "TS 100" and lines corresponding to performance parameters of a conventional composite transformer structure (e.g., a transformer structure having only interleaved structures) are labeled "ILTS".

Fig. 3E illustrates the improvement in insertion loss provided by the third example implementation of transformer structure 100. As shown in fig. 3E, the third example implementation of transformer structure 100 may reduce insertion loss by approximately 0.14dB compared to a conventional composite transformer structure over the possible operating range of the transformer structure (e.g., between approximately 60GHz to approximately 100 GHz).

Fig. 3F illustrates the improvement in coupling coefficient provided by the third example implementation of transformer structure 100. As shown in fig. 3F, the third example implementation of the transformer structure 100 may increase the coupling coefficient by approximately 8% compared to the conventional composite transformer structure.

Fig. 3G illustrates the improvement in Q-factor matching of the primary and secondary coils provided by the third example implementation of transformer structure 100. In fig. 3G, the Q factor of the primary coil of the third example implementation of transformer structure 100 is identified as "TS 100_P", the Q factor of the secondary coil of the third example implementation of transformer structure 100 is identified as" TS100_S", the Q factor of the primary winding of a conventional composite transformer structure is identified as" ILTS_P", and the Q factor of the secondary winding of a conventional composite transformer structure is identified as" ILTS_S". As shown in fig. 3G, in the third example implementation of the transformer structure 100, the Q-factors of the primary and secondary coils of the third example implementation of the transformer structure 100 are more closely matched than the Q-factors of the primary and secondary coils of a conventional combined transformer structure.

Fig. 3H illustrates the effect on the inductance of a third example implementation of the transformer structure 100. In fig. 3H, the inductance of the primary coil of the third example implementation of transformer structure 100 is identified as "TS 100_P", the inductance of the secondary coil of the third example implementation of transformer structure 100 is identified as" TS100_S", the inductance of the primary of a conventional composite transformer structure is identified as" ILTS_P", and the inductance of the secondary of a conventional composite transformer structure is identified as" ILTS_S". As shown in fig. 3H, in a third example implementation of the transformer structure 100, the inductance of the secondary coil of the third example implementation of the transformer structure 100 may be lower than the inductance of the secondary coil of a conventional combined transformer structure.

Fig. 3I shows the effect of a power amplifier implemented using a third example of the transformer structure 100 on the scattering parameter. In fig. 3I, the dispersion parameters S21, S11, and S22 of the power amplifier implemented using the third example of the transformer structure 100 are dashed lines labeled "TS 100", while the dispersion parameters S21, S11, and S22 of the power amplifier using the conventional composite transformer structure are solid lines labeled "ILTS". As shown in fig. 3I, in the dispersion parameter of the power amplifier implemented using the third example of the transformer structure 100, there is no significant difference from the dispersion parameter of the power amplifier using the conventional composite transformer structure.

Fig. 3J illustrates the improvement in output power and Power Added Efficiency (PAE) of a power amplifier implemented using the third example of the transformer structure 100. In fig. 3J, the output power of the power amplifier implemented using the third example of the transformer structure 100 is identified as "TS 100_Pout", the PAE of the power amplifier implemented using the third example of the transformer structure 100 is identified as" TS100_PAE", the output power of a power amplifier using a conventional combined transformer structure is identified as" ILTS_Pout", and the PAE of a power amplifier using a conventional combined transformer structure is identified as" ILTS_SAE". As shown in fig. 3J, in the power amplifier implemented using the third example of the transformer structure 100, both the output power and the PAE are higher than those of the power amplifier using the conventional composite transformer structure. Therefore, without changing the frequency center of the power amplifier (as shown by the scattering parameter in fig. 3I), the transformer junction is usedIn the power amplifier of the third example implementation of configuration 100 (as shown in fig. 3J), both output power and PAE are improved.

As described above, fig. 3A-3J are provided as examples. Other examples may differ from the examples described with respect to fig. 3A-3J. The number and arrangement of coils, turns, and layers shown in fig. 3A-3J are provided as examples. Indeed, there may be additional turns, additional layers, fewer turns, fewer layers, different coils, different turns, different layers, different shapes of coils, different shapes of turns, different shapes of layers, different arrangements of coils, different arrangements of turns, or different arrangements of layers than the turns, layers, and coils shown in fig. 3A-3J. Further, the dimensions of the coils, turns, and layers shown in fig. 3A-3J are provided as examples. Indeed, the coils, turns, and/or layers may have different sizes or relative sizes as compared to the coils, turns, and/or layers shown in fig. 3A-3J.

Fig. 4 is a flow diagram of an example process 400 for providing a stacked/interleaved transformer structure as described herein.

As shown in fig. 4, the process 400 may include forming a first coil having at least one turn (block 410). For example, as described above, a first coil having at least one turn may be formed.

As further shown in fig. 4, the process 400 may include forming a second coil having at least one turn, wherein a first portion of the turn of the first coil is formed to overlap the turn of the second coil in a first direction substantially along the first portion of the turn of the first coil, and a second portion of the turn of the first coil is formed to overlap the turn of the second coil in a second direction substantially along the second portion of the turn of the first coil (block 420). For example, as described above, a second coil having at least one turn may be formed. In some implementations, the first portion of the turn of the first coil is formed to overlap the turn of the second coil in the first direction substantially along the first portion of the turn of the first coil. In some implementations, the second portion of the turn of the first coil is formed to overlap the turn of the second coil in the second direction substantially along the second portion of the turn of the first coil. In some implementations, the second direction is perpendicular to the first direction.

Process 400 may include additional implementations such as any single implementation or any combination of implementations described below and/or in conjunction with one or more other processes described elsewhere herein.

In a first implementation, the first coil and the second coil are integrated in a semiconductor device.

In a second implementation, alone or in combination with the first implementation, a first portion of the turns of the first coil are formed to overlap the turns of the second coil in a first direction along at least a quarter of the turns of the first coil, and a second portion of the turns of the first coil are formed to overlap the turns of the second coil in a second direction along at least a quarter of the turns of the first coil.

In a third implementation, alone or in combination with one or more of the first and second implementations, the first coil is a primary coil of a transformer structure and the second coil is a secondary coil of the transformer structure.

In a fourth implementation, alone or in combination with one or more of the first to third implementations, the first coil is a secondary coil of a transformer structure and the second coil is a primary coil of the transformer structure.

In a fifth implementation, alone or in combination with one or more of the first to fourth implementations, a first portion of a turn of the first coil is formed from a first metal layer of the metal stack and a second portion of the first coil is formed from a second metal layer of the metal stack, the first portion of the turn of the first coil being connected to the second portion of the turn of the first coil substantially along the turn of the first coil.

In a sixth implementation, the second coil is formed from the first metal layer, alone or in combination with one or more implementations of the first through fifth implementations.

Although fig. 4 shows example blocks of the process 400, in some implementations, the process 400 may include more blocks, fewer blocks, different blocks, or a different arrangement of blocks than those described in fig. 4. Additionally or alternatively, one or more of the blocks of process 400 may be performed in parallel.

The foregoing disclosure provides illustration and description, but is not intended to be exhaustive or to limit the implementations to the precise form disclosed. Modifications and variations are possible in light of the above disclosure or may be acquired from practice of the implementations.

As used herein, the term "component" is intended to be broadly interpreted as hardware, firmware, and/or a combination of hardware and software.

It is to be understood that the systems and/or methods described herein may be implemented in various forms of hardware, firmware, or a combination of hardware and software. The actual specialized control hardware or software code used to implement these systems and/or methods is not limiting of implementation. Thus, the operation and behavior of the systems and/or methods were described herein without reference to the specific software code-it being understood that software and hardware may be designed to implement the systems and/or methods based on the description herein.

Even if specific combinations of features are recited in the claims and/or disclosed in the specification, these combinations are not intended to limit the disclosure of the various implementations. In fact, many of these features may be combined in ways not specifically recited in the claims and/or disclosed in the specification. Although each dependent claim listed below may be directly dependent on only one claim, the disclosure of various implementations includes each dependent claim in combination with every other claim in the set of claims.

No element, act, or instruction used herein is to be construed as critical or essential unless explicitly described as such. In addition, as used herein, the articles "a" and "an" are intended to include one or more items, and are used interchangeably with "one or more". In addition, as used herein, the article "the" is intended to include the item or items referred to by the incorporated article "the" and may be used interchangeably with "one or more". Further, as used herein, the term "collection" is intended to include one or more items (e.g., related items, unrelated items, combinations of related and unrelated items, etc.) and may be used interchangeably with "one or more. Where only one item is intended, the phrase "only one item" or similar language is used. Also, as used herein, the terms "having", "possessing", and the like are intended to be open-ended terms. Further, the phrase "based on" is intended to mean "based, at least in part, on" unless explicitly stated otherwise. Also, as used herein, the term "or" when used in a serial fashion is intended to be inclusive and may be used interchangeably with "and/or" unless explicitly stated otherwise (e.g., if used in conjunction with "or" only one of "). Furthermore, spatially relative terms (such as "below … …", "below", "above … …", "above", etc.) may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated. Spatially relative terms are intended to encompass different orientations of the device, apparatus, and/or element in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.