Substrate-less semiconductor package structure and method for fabricating the same
阅读说明:本技术 无基板半导体封装结构及其制法 (Substrate-less semiconductor package structure and method for fabricating the same ) 是由 陈裕纬 徐宏欣 蓝源富 柯志明 于 2019-04-03 设计创作,主要内容包括:本发明是一种无基板半导体封装结构及其制法,主要以含有金属盐类的一绝缘封胶体包覆一芯片,当使用激光照射绝缘封胶体的顶面并对准该芯片的金属接点位置,即可以各该金属接点为激光阻挡层,于该绝缘封胶体上形成有多个开口,使各该金属接点外露,且激光照射在该绝缘封胶层的顶面,形成一线路图案;接着,于化学电镀步骤中,于各该开口中形成有金属柱,且该线路图案上形成有线路,再形成多个外接垫与该金属柱及线路电性连接;如此,本发明的半导体封装结构不必使用基板,即可透过该些外接垫与其他电子元件或电路板电性连接。(The invention is a non-base plate semiconductor package structure and its preparation method, mainly wrap a chip with an insulating sealing colloid containing metal salt, when using laser to irradiate the top surface of the insulating sealing colloid and aim at the metal joint position of the chip, namely every metal joint can be a laser barrier layer, form multiple openings on the insulating sealing colloid, make every metal joint expose, and the laser irradiates on the top surface of the insulating sealing colloid, form a circuit pattern; then, in the chemical plating step, forming metal columns in the openings, forming circuits on the circuit patterns, and forming a plurality of external pads electrically connected with the metal columns and the circuits; therefore, the semiconductor packaging structure of the invention can be electrically connected with other electronic elements or circuit boards through the external pads without using a substrate.)
1. A substrate-less semiconductor package structure, comprising:
a chip, including an active surface and a bottom surface opposite to the active surface; wherein the active surface has a plurality of metal contacts;
an insulating encapsulant containing metal salts and covering the chip; the bottom surface of the insulating sealing colloid is flush with the bottom surface of the chip, and a plurality of openings and a first circuit pattern are formed on the top surface of the insulating sealing colloid corresponding to a plurality of metal contacts of the chip;
a plurality of first metal columns which are respectively formed in the corresponding openings and are connected with the corresponding metal contacts;
a plurality of first lines formed on the first line patterns and connected to the corresponding first metal posts; and
the first external pads are electrically connected to the first metal posts and the first circuits.
2. The substrate-less semiconductor package according to claim 1, wherein the insulating encapsulant comprises a plurality of through holes, each through hole penetrating through a top surface and a bottom surface of the insulating encapsulant, and a second metal pillar is formed in each through hole.
3. The substrate-less semiconductor package structure of claim 2, further comprising:
a protective layer covering the top surface of the insulating sealing colloid and comprising a plurality of metal pads, wherein the plurality of metal pads are correspondingly connected with the first circuit and the first metal column, and the parts of the plurality of metal pads are respectively connected with the corresponding first external pads; and
and the plurality of second external connecting pads are respectively connected to the second metal columns on the bottom surface of the insulating sealing colloid.
4. The substrate-less semiconductor package structure of claim 2, wherein:
a second circuit pattern is formed on the bottom surface of the insulating sealing colloid, and a plurality of second circuits are formed on the second circuit pattern;
the parts of the second metal columns and the parts of the second circuits which are positioned on the bottom surface of the insulating sealing colloid are further respectively connected with a second external connecting pad; and the top surface of the insulating sealing colloid is further covered with a protective layer, the protective layer comprises a plurality of metal pads, the metal pads are correspondingly connected with the first circuit and the first metal column, and each metal pad is connected with the corresponding first external pad.
5. A method for manufacturing a substrate-free semiconductor packaging structure is characterized by comprising the following steps:
(a) preparing a temporary carrier plate;
(b) adhering a back surface of a chip to the temporary carrier plate;
(c) forming an insulating sealing colloid on the temporary carrier plate and coating the chip; wherein the insulating sealing colloid contains metal salt;
(d) removing the temporary carrier plate, and irradiating a top surface of the insulating sealing colloid by laser to form a plurality of openings and a first circuit pattern; wherein each opening is aligned with a corresponding metal contact on an active surface of the chip, the metal contact is exposed, and a bottom surface of the insulating sealing colloid is flush with the back surface of the chip;
(e) chemically plating a plurality of the openings and the first circuit patterns, forming a first metal column on each opening, and forming a plurality of first circuits on the first circuit patterns; and
(f) and electrically connecting a plurality of first external pads to the plurality of first metal posts and the plurality of first circuits on the top surface of the insulating sealant.
6. The method of manufacturing a substrate-less semiconductor package according to claim 5, wherein:
further irradiating the top surface of the insulating sealant with laser in the step (d) to form a through hole penetrating the top surface and the bottom surface of the insulating sealant; and
in step (e), a second metal pillar is formed in each of the through holes.
7. The method of fabricating the substrate-less semiconductor package structure of claim 6, further comprising:
(g) and forming a plurality of second external connecting pads on a plurality of second metal columns on the bottom surface of the insulating sealing colloid.
8. The method of manufacturing a substrate-less semiconductor package according to claim 6, wherein:
further irradiating the bottom surface of the insulating encapsulant with laser in step (d) to form a second circuit pattern; and
in the step (e), a plurality of second lines are formed on the second line pattern.
9. The method of fabricating the substrate-less semiconductor package according to claim 8, further comprising:
(g) and forming a plurality of second external connecting pads on a plurality of second metal columns and a plurality of second circuits on the bottom surface of the insulating sealing colloid.
10. The method of fabricating the substrate-less semiconductor package structure of any one of claims 5 to 9, wherein:
after the step (e), further forming a protective layer on the top surface of the insulating sealing colloid, forming a plurality of pad openings on the protective layer to expose parts of the metal posts and parts of the circuits, and forming metal pads in the pad openings; and
in step (f), a plurality of first external pads are formed on the plurality of metal pads.
Technical Field
The present invention relates to a substrate-less semiconductor package and a method for fabricating the same, and more particularly, to a substrate-less semiconductor package and a method for fabricating the same that reduce delamination of an encapsulant.
Background
In a general semiconductor package structure, a chip is usually disposed and electrically connected to a substrate, and finally an encapsulant is formed on the substrate to encapsulate the chip to complete a semiconductor package structure.
In view of the overall cost of the semiconductor package structure, the cost of the substrate accounts for a large proportion of the cost of the semiconductor package structure, so that a large part of the development of the semiconductor package technology is advancing the substrate technology, and considerable package cost and technology development cost can be saved if the substrate can be saved.
Disclosure of Invention
In view of the high cost of the substrate used or developed in the semiconductor package structure, the main object of the present invention is to provide a substrate-less semiconductor package structure and a method for fabricating the same.
The main technical means to achieve the above object is to make the substrate-less semiconductor package structure include:
a chip, including an active surface and a bottom surface opposite to the active surface; wherein the active surface has a plurality of metal contacts;
an insulating encapsulant containing metal salts and covering the chip; the bottom surface of the insulating sealing colloid is flush with the bottom surface of the chip, and a plurality of openings and a first circuit pattern are formed on the top surface of the insulating sealing colloid corresponding to a plurality of metal contacts of the chip;
a plurality of first metal columns which are respectively formed in the corresponding openings and are connected with the corresponding metal contacts;
a plurality of first lines formed on the first line patterns and connected to the corresponding first metal posts; and
the first external pads are electrically connected to the first metal posts and the first circuits.
In one embodiment, the insulating sealing compound includes a plurality of through holes, each through hole penetrates through the top surface and the bottom surface of the insulating sealing compound, and a second metal pillar is formed in each through hole.
In one embodiment, the substrate-less semiconductor package structure further comprises:
a protective layer covering the top surface of the insulating sealing colloid and comprising a plurality of metal pads, wherein the plurality of metal pads are correspondingly connected with the first circuit and the first metal column, and the parts of the plurality of metal pads are respectively connected with the corresponding first external pads; and
and the plurality of second external connecting pads are respectively connected to the second metal columns on the bottom surface of the insulating sealing colloid.
In one embodiment, a second circuit pattern is formed on the bottom surface of the insulating encapsulant, and a plurality of second circuits are formed on the second circuit pattern;
the parts of the second metal columns and the parts of the second circuits which are positioned on the bottom surface of the insulating sealing colloid are further respectively connected with a second external connecting pad; and the top surface of the insulating sealing colloid is further covered with a protective layer, the protective layer comprises a plurality of metal pads, the metal pads are correspondingly connected with the first circuit and the first metal column, and each metal pad is connected with the corresponding first external pad.
As can be seen from the above description, the active surface of the chip is mainly covered by the insulating encapsulant containing metal salts, when the top surface of the insulating encapsulant corresponding to the metal contacts of the chip is irradiated with laser, each metal contact can be used as a laser blocking layer, a plurality of openings are formed on the insulating encapsulant to expose each metal contact, and the laser is irradiated on the top surface of the insulating encapsulant to form a first circuit pattern; forming first lines on the first line patterns, wherein the first lines are electrically connected with the first metal posts in the corresponding openings and are provided with first external connection pads; therefore, the semiconductor packaging structure of the invention can be electrically connected with other electronic elements or circuit boards through the external pads on the circuits without using a substrate.
The main technical means for achieving the above purpose is to make the manufacturing method of the semiconductor packaging structure include the following steps:
(a) preparing a temporary carrier plate;
(b) adhering a back surface of a chip to the temporary carrier plate;
(c) forming an insulating sealing colloid on the temporary carrier plate and coating the chip; wherein the insulating sealing colloid contains metal salt;
(d) removing the temporary carrier plate, and irradiating a top surface of the insulating sealing colloid by laser to form a plurality of openings and a first circuit pattern; wherein each opening is aligned with a corresponding metal contact on an active surface of the chip, the metal contact is exposed, and a bottom surface of the insulating sealing colloid is flush with the back surface of the chip;
(e) chemically plating a plurality of the openings and the first circuit patterns, forming a first metal column on each opening, and forming a plurality of first circuits on the first circuit patterns; and
(f) and electrically connecting a plurality of first external pads to the plurality of first metal posts and the plurality of first circuits on the top surface of the insulating sealing colloid.
In one embodiment:
further irradiating the top surface of the insulating sealant with laser in the step (d) to form a through hole penetrating the top surface and the bottom surface of the insulating sealant; and
in step (e), a second metal pillar is formed in each of the through holes.
In one embodiment, the method for fabricating a substrate-less semiconductor package further comprises:
(g) and forming a plurality of second external connecting pads on a plurality of second metal columns on the bottom surface of the insulating sealing colloid.
In one embodiment:
further irradiating the bottom surface of the insulating encapsulant with laser in step (d) to form a second circuit pattern; and
in the step (e), a plurality of second lines are formed on the second line pattern.
In one embodiment, the method for fabricating a substrate-less semiconductor package further comprises:
(g) and forming a plurality of second external connecting pads on a plurality of second metal columns and a plurality of second circuits on the bottom surface of the insulating sealing colloid.
In one embodiment:
after the step (e), further forming a protective layer on the top surface of the insulating sealing colloid, forming a plurality of pad openings on the protective layer to expose parts of the metal posts and parts of the circuits, and forming metal pads in the pad openings; and
in step (f), a plurality of first external pads are formed on the plurality of metal pads.
As can be seen from the above description, the active surface of the chip is mainly covered by the insulating encapsulant containing metal salts, when the top surface of the insulating encapsulant corresponding to the metal contacts of the chip is irradiated with laser, each metal contact can be used as a laser blocking layer, a plurality of openings are formed on the insulating encapsulant to expose each metal contact, and the laser is irradiated on the top surface of the insulating encapsulant to form a first circuit pattern; forming first lines on the first line patterns, wherein the first lines are electrically connected with the first metal posts in the corresponding openings and are provided with first external connection pads; therefore, the semiconductor packaging structure of the invention can be electrically connected with other electronic elements or circuit boards through the external pads on the circuits without using a substrate.
Drawings
Fig. 1 is a cross-sectional view of a semiconductor package according to a first embodiment of the present invention.
Fig. 2 is a cross-sectional view of a semiconductor package structure according to a second embodiment of the present invention.
Fig. 3 is a cross-sectional view of a semiconductor package according to a third embodiment of the present invention.
Fig. 4A to 4J are cross-sectional views of different steps in a first semiconductor package fabrication method according to the present invention.
Fig. 5A to 5G are cross-sectional views illustrating different steps in a second method for fabricating a semiconductor package structure according to the present invention.
Wherein, the reference numbers:
1. 1a, 1b semiconductor package structure
10 chip
11 active surface
111 metal contact
12 bottom surface
20. 20a, 20b insulating sealing colloid
200 metal particles
21 bottom surface
211 second line pattern
22 top surface
221 opening
222 line pattern
223 through hole
23 protective layer
230 pad opening
231 metal pad
30 metal column
31 second metal column
40 line
41 second line
50 external connection pad
51 second external pad
60 external chip
61 external chip
70 temporary carrier plate
71 adhesive layer
Detailed Description
The present invention provides a substrate-less semiconductor package and a method for fabricating the same, and a plurality of embodiments are provided below to explain the technical contents of the present invention in detail with reference to the drawings.
Referring to fig. 1, a
The
The insulating
The
The
As can be seen from the above description, the
Referring to fig. 2, a semiconductor package structure 1a according to a second embodiment of the present invention includes a
The
The insulating
The
The first
The second external pads 51 are formed on the corresponding second metal posts 31 on the
Referring to fig. 3, a third embodiment of a semiconductor package structure 1b according to the present invention is shown, and the structure thereof is substantially the same as the structure of the semiconductor package structure 1a shown in fig. 2, but the
Referring to fig. 4A to 4J, a method for packaging the
As shown in fig. 4B, a
As shown in fig. 4C, an insulating
As shown in fig. 4D, the
As shown in fig. 4E, the
As shown in fig. 4G, the
As shown in fig. 4H, a
As shown in fig. 4I, a
Referring to fig. 5A to 5G, which are illustrations of a packaging method of the semiconductor package structure 1a of fig. 2, the first steps of the packaging method of the present embodiment are the same as those of fig. 4A to 4C, and thus are not repeated herein. Referring to fig. 5A, the
As shown in fig. 5B, laser is irradiated onto the
As shown in fig. 5C, adjusting the laser power to form a
As shown in fig. 5D, the
As shown in fig. 5E, a
As shown in fig. 5F, a
In summary, the active surface of the chip is mainly coated with the insulating encapsulant containing metal salts, and when the top surface of the insulating encapsulant corresponding to the metal contact position of the chip is irradiated with laser, each metal contact can be a laser blocking layer, a plurality of openings are formed on the insulating encapsulant to expose each metal contact, and the laser is irradiated on the top surface of the insulating encapsulant layer to form a circuit pattern; forming circuits on the circuit pattern, wherein the circuits are electrically connected with the metal posts in the corresponding openings and are provided with external pads; therefore, the semiconductor packaging structure of the invention can be electrically connected with other electronic elements or circuit boards through the external pads on the circuits without using a substrate.
The present invention is capable of other embodiments, and various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.
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