阅读说明：本技术 陶瓷无引线片式封装结构 (Ceramic leadless chip type packaging structure ) 是由 杨振涛 于 2020-05-13 设计创作，主要内容包括：本发明提供了一种陶瓷无引线片式封装结构,属于芯片封装技术领域,包括陶瓷基体、芯片、引出端和盖板；陶瓷基体上设有第一焊盘,芯片的背面设有与第一焊盘对应的第二焊盘,第二焊盘用于在植入焊球后通过焊球与第一焊盘焊接,引出端设于陶瓷基体下部,且通过陶瓷基体内部的导电结构与第一焊盘导电连接,盖板密封盖设于芯片外周。本发明提供的陶瓷无引线片式封装结构,避免了使用键合丝进行键合,不会出现因键合丝导致的在高频高速应用场景下性能下降的问题,减少封装工艺步骤,具有更好的电性能和可靠性；有效缩小了陶瓷基体的尺寸,有利于实现封装的小型化；由于将键合的互连形式改为倒装式凸点的互连形式,极大地提高了互连的密度。(The invention provides a ceramic leadless chip type packaging structure, which belongs to the technical field of chip packaging and comprises a ceramic substrate, a chip, a leading-out end and a cover plate; be equipped with first pad on the ceramic base member, the back of chip is equipped with the second pad that corresponds with first pad, and the second pad is used for welding through solder ball and first pad after implanting the solder ball, draws forth the end and locates ceramic base member lower part, and electrically conducts through the conducting structure of ceramic base member inside and be connected with first pad, and the chip periphery is located to the apron sealed lid. The ceramic leadless chip type packaging structure provided by the invention avoids bonding by using the bonding wire, avoids the problem of performance reduction caused by the bonding wire in a high-frequency high-speed application scene, reduces packaging process steps, and has better electrical property and reliability; the size of the ceramic substrate is effectively reduced, and the miniaturization of the package is facilitated; the density of the interconnection is greatly improved due to the fact that the bonding interconnection form is changed into the flip-chip bump interconnection form.)

1. Ceramic leadless chip package structure, its characterized in that includes:

the ceramic substrate is provided with a first bonding pad;

the back surface of the chip is provided with a second bonding pad corresponding to the first bonding pad, and the second bonding pad is used for being welded with the first bonding pad through the solder ball after the solder ball is implanted;

the leading-out end is arranged at the lower part of the ceramic base body and is in conductive connection with the first bonding pad through a conductive structure in the ceramic base body; and

the cover plate is arranged on the periphery of the chip in a sealing mode.

2. The ceramic leadless chip package structure of claim 1, wherein said terminals comprise:

the third bonding pad is arranged on the bottom surface of the ceramic substrate; and

and the side surface metallization hole is formed in the peripheral side wall of the ceramic base body and is in conductive connection with the third bonding pad, and the conductive structure is in conductive connection with the side surface metallization hole.

3. The ceramic leadless chip package structure of claim 1, wherein said terminals comprise:

the fourth bonding pad is arranged on the bottom surface of the ceramic substrate; and

and the fifth bonding pad is arranged on the peripheral side wall of the ceramic substrate and is in conductive connection with the fourth bonding pad, and the conductive structure is in conductive connection with the fifth bonding pad.

4. The ceramic leadless chip package of claim 1, wherein said ceramic substrate is plate-shaped, and said first pad is disposed on an upper surface of said ceramic substrate.

5. The ceramic leadless chip package of claim 4, wherein said cover plate is a cap member, and said cover plate hermetic enclosure is disposed at an outer periphery of said chip.

6. The ceramic leadless chip package according to claim 1, wherein the ceramic substrate is a package member having a cavity for receiving the chip, and the cover plate is hermetically sealed in the cavity.

7. The ceramic leadless chip package according to claim 4 or 6, wherein a metal sealing ring is disposed on an upper outer edge of the ceramic substrate, and the cover plate sealing cap is disposed on the metal sealing ring.

8. The ceramic leadless chip package structure of claim 6, wherein said receiving cavity is provided with at least one, each of said receiving cavities being open to an upper side or a lower side of said ceramic substrate.

9. The ceramic leadless chip package of claim 1, wherein the ceramic substrate comprises a plurality of ceramic chips stacked on one another, and the conductive structure comprises conductive vias formed in the ceramic substrate and first conductive traces formed on each of the ceramic chips, and the first conductive traces are electrically connected to the conductive vias and the terminals respectively.

10. The ceramic leadless chip package structure of claim 9, wherein the first conductive trace is disposed on the upper surface of each layer of the ceramic chip, and a second conductive trace overlapping with an end of the first conductive trace is disposed adjacent to an outer edge of the lower surface of the ceramic chip, and the second conductive trace extends to an edge of the ceramic chip.

Technical Field

The invention belongs to the technical field of chip packaging, and particularly relates to a ceramic leadless chip type packaging structure.

Background

The ceramic leadless chip type shell is a miniaturized surface-mounted shell, and compared with other packaging forms, the ceramic leadless chip type shell is small in size, light in weight, and excellent in electrical property and thermal property, and the packaging form is suitable for packaging devices with high requirements on size, weight and performance, so that the ceramic leadless chip type shell is very suitable for being applied to high-speed and high-performance packages of modulus, radio frequency, microwave circuits and the like in military and high-reliability fields. The chip of the existing ceramic leadless chip type packaging structure is arranged in a cavity of a ceramic piece, the interconnection of a chip and a shell bonding finger is realized through a bonding wire or a silicon-aluminum wire, and finally the interconnection of the chip and an external circuit is realized.

Disclosure of Invention

The invention aims to provide a ceramic leadless chip type packaging structure, and aims to solve the technical problem that in the prior art, due to the fact that bonding wires are used for connecting chip and shell bonding fingers, performance is reduced under the high-speed and high-frequency application condition.

In order to achieve the purpose, the invention adopts the technical scheme that: provided is a ceramic leadless chip package structure, including:

the ceramic substrate is provided with a first bonding pad;

the back surface of the chip is provided with a second bonding pad corresponding to the first bonding pad, and the second bonding pad is used for being welded with the first bonding pad through the solder ball after the solder ball is implanted;

the leading-out end is arranged at the lower part of the ceramic base body and is in conductive connection with the first bonding pad through a conductive structure in the ceramic base body; and

the cover plate is arranged on the periphery of the chip in a sealing mode.

As another embodiment of the present application, the terminal includes:

the third bonding pad is arranged on the bottom surface of the ceramic substrate; and

and the side surface metallization hole is formed in the peripheral side wall of the ceramic base body and is in conductive connection with the third bonding pad, and the conductive structure is in conductive connection with the side surface metallization hole.

As another embodiment of the present application, the terminal includes:

the fourth bonding pad is arranged on the bottom surface of the ceramic substrate; and

and the fifth bonding pad is arranged on the peripheral side wall of the ceramic substrate and is in conductive connection with the fourth bonding pad, and the conductive structure is in conductive connection with the fifth bonding pad.

As another embodiment of the present application, the ceramic substrate has a plate shape, and the first pad is disposed on an upper surface of the ceramic substrate.

As another embodiment of the present application, the cover plate is a cap-shaped member, and the cover plate sealing cap is disposed on the periphery of the chip.

As another embodiment of the application, the ceramic substrate is a tube shell member, a containing cavity for containing the chip is arranged, and the cover plate sealing cover is arranged on the containing cavity.

As another embodiment of the present application, a metal sealing ring is disposed on an outer edge of an upper portion of the ceramic substrate, and the cover plate sealing cover is disposed on the metal sealing ring.

As another embodiment of the present application, at least one receiving cavity is provided, and each receiving cavity is opened to an upper side or a lower side of the ceramic base.

As another embodiment of this application, ceramic base includes the ceramic wafer of the range upon range of setting of multilayer, conductive structure is including locating electrically conductive via hole in the ceramic base and locate the first electrically conductive line of walking on every layer of ceramic wafer, first electrically conductive walk the line respectively with electrically conductive via hole reaches draw the end electrically conductive connection.

As another embodiment of this application, first electrically conductive line of walking sets up in every layer the upper surface of ceramic wafer, adjacent the lower surface outer fringe of ceramic wafer still be equipped with be used for with first electrically conductive second of walking line tip overlap is walked the line, the electrically conductive line of second extends to the edge of ceramic wafer.

The ceramic leadless chip type packaging structure provided by the invention has the beneficial effects that: compared with the prior art, when a chip is installed, the ceramic leadless chip type packaging structure firstly implants a solder ball on a second bonding pad on the back of the chip, then the solder ball is welded with the first bonding pad in an inverted mode, the chip is welded with a ceramic substrate by the solder ball, the chip can be simultaneously installed and electrically interconnected, the structure of a bonding finger on the ceramic substrate is removed, bonding by a bonding wire is avoided, the problem of performance reduction in a high-frequency high-speed application scene caused by the bonding wire is avoided, packaging process steps are reduced, and the ceramic leadless chip type packaging structure has better electrical property and reliability; meanwhile, the size of the ceramic substrate is effectively reduced, and the miniaturization of the package is facilitated; in addition, the interconnection density is greatly improved due to the fact that the bonding interconnection form is changed into the flip-chip bump interconnection form.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed for the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.

Fig. 1 is a schematic assembly diagram of a ceramic leadless chip package structure according to an embodiment of the present invention;

fig. 2 is a schematic view of an internal structure of a ceramic leadless chip package structure according to a second embodiment of the present invention;

fig. 3 is a schematic view of an internal structure of a ceramic leadless chip package structure according to a third embodiment of the present invention;

FIG. 4 is a bottom view of FIG. 3;

FIG. 5 is a top view of FIG. 3;

fig. 6 is a schematic view of an internal structure of a ceramic leadless chip package structure according to a fourth embodiment of the present invention;

FIG. 7 is a bottom view of FIG. 6;

FIG. 8 is a top view of FIG. 6;

fig. 9 is a schematic view of an internal structure of a ceramic leadless chip package structure according to a fourth embodiment of the present invention;

FIG. 10 is a bottom view of FIG. 9;

FIG. 11 is a top view of FIG. 9;

fig. 12 is a schematic view of an internal structure of a ceramic leadless chip package structure according to a fifth embodiment of the present invention;

fig. 13 is a schematic view of an internal structure of a ceramic leadless chip package structure according to a sixth embodiment of the present invention;

fig. 14 is a schematic structural diagram illustrating an internal structure of a ceramic leadless chip package structure according to a seventh embodiment of the present invention;

fig. 15(a) is a schematic distribution state diagram of the first conductive trace;

fig. 15(b) is a schematic distribution diagram of the first conductive traces and the second conductive traces.

In the figure: 1. a ceramic substrate; 101. a ceramic plate; 2. a chip; 3. a cover plate; 4. a first pad; 5. a solder ball; 6. a third pad; 7. side metallized holes; 9. a fifth pad; 10. an accommodating chamber; 11. a metal seal ring; 12. a conductive via; 13. a first conductive trace; 14. a second conductive trace; 15. a circuit board; 16. and (6) welding wrap angles.

Detailed Description

In order to make the technical problems, technical solutions and advantageous effects to be solved by the present invention more clearly apparent, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

Referring to fig. 1 to 14, a ceramic leadless chip package structure provided by the present invention will now be described. The ceramic leadless chip type packaging structure comprises a ceramic substrate 1, a chip 2, a leading-out end and a cover plate 3; be equipped with first pad 4 on the ceramic base member 1, the back of chip 2 is equipped with the second pad that corresponds with first pad 4, and the second pad is used for welding through solder ball 5 and first pad 4 after implanting solder ball 5, draws forth the end and locates 1 lower part of ceramic base member, and through the inside conductive structure of ceramic base member 1 and first pad 4 electrically conductive connection, lap 3 sealed lid and locate 2 peripheries of chip.

Compared with the prior art, when the chip 2 is installed, the solder ball 5 is firstly implanted into the second bonding pad on the back side of the chip 2, then the solder ball 5 is welded with the first bonding pad 4 in an inverted mode, the chip 2 is welded with the ceramic substrate 1 by the solder ball 5, the chip 2 can be installed and electrically interconnected at the same time, the structure of a bonding finger on the ceramic substrate 1 is removed, bonding by using a bonding wire is avoided, the problem of performance reduction in a high-frequency high-speed application scene caused by the bonding wire is avoided, the packaging process steps are reduced, and the chip 2 has better electrical property and reliability; meanwhile, the size of the ceramic substrate 1 is effectively reduced, which is beneficial to realizing the miniaturization of the package; in addition, the interconnection density is greatly improved due to the fact that the bonding interconnection form is changed into the flip-chip bump interconnection form.

Besides the advantages, the ceramic leadless chip type packaging structure of the invention also has the following advantages:

the packaging structure adopts a leadless chip structure without traditional packaging metal lead structures such as FP, CSOP, CQFP and the like, the conducting path between the internal bonding finger and the external conducting pad is shorter, and the packaging parasitic parameters such as wiring resistance, inductance and the like in the packaging body are low, so the structure has excellent electrical performance; the leading-out end can be provided with a large-area radiating welding disk at the bottom of the ceramic substrate, and the radiating welding disk is directly connected with the corresponding radiating welding disk and the through hole of the PCB to help radiating; and by adopting a surface mounting mode, the size of the device is effectively reduced, and the assembly density is improved. The ceramic leadless chip type packaging structure is suitable for packaging devices with high requirements on size, weight and performance in many aspects, so that the ceramic leadless chip type packaging structure is very suitable for being applied to packaging high-speed and high-performance analog-digital, radio-frequency and microwave circuits and the like in military and high-reliability fields, can meet the requirements of digital, analog and MEMS packaging, and has wide cross-field application range.

Specifically, the conventional bonding wire type bonding structure needs to be arranged around the chip, so the number of bonding fingers is limited by the size of the chip, and in the embodiment, the first bonding pads 4 and the second bonding pads are distributed in an array, so that the interconnection density is greatly improved.

As an embodiment of the ceramic leadless chip package structure provided by the present invention, referring to fig. 1 to 11, the lead terminal includes a third pad 6 and a side metallized hole 7; the third pad 6 is arranged on the bottom surface of the ceramic base body 1, the side surface metalized hole 7 is arranged on the peripheral side wall of the ceramic base body 1 and is in conductive connection with the third pad 6, and the conductive structure is in conductive connection with the side surface metalized hole 7. The side metallized hole 7 is used as a leading-out end, and the welding wrap angle 16 is partially positioned in the side metallized hole 7, so that the space occupied by the ceramic leadless chip packaging structure after being connected to a circuit board can be further reduced, and meanwhile, the welding strength can be improved.

Specifically, the diameter of the side surface metallized hole 7 is 0.10-0.60 mm, and the length is 0.10-4.00 mm.

As a specific implementation manner of the embodiment of the present invention, please refer to fig. 12 to 14, the lead-out terminal includes a fourth bonding pad and a fifth bonding pad 9; the fourth pad is arranged on the bottom surface of the ceramic base body 1, the fifth pad 9 is arranged on the peripheral side wall of the ceramic base body 1 and is in conductive connection with the fourth pad, and the conductive structure is in conductive connection with the fifth pad 9. The outer side surface of the ceramic base body 1 is provided with the welding disc, so that the requirement on use performance can be met, and meanwhile, the production difficulty is lower.

Referring to fig. 9 to 11 and 14, as a specific embodiment of the present invention, the ceramic body 1 has a plate shape, and the first pad 4 is provided on the upper surface of the ceramic body 1. In this embodiment, the ceramic substrate 1 does not have a cavity structure, the thickness of the ceramic portion is increased, the mechanical strength of the housing is improved, and the size of the housing is correspondingly reduced, thereby facilitating the miniaturization of the package.

Referring to fig. 14, in order to adapt to the plate-shaped ceramic substrate 1, the cover plate 3 is a cap-shaped member, and the cover plate 3 is disposed on the periphery of the chip 2 to ensure a good sealing environment between the cover 3 and the ceramic substrate 1.

Referring to fig. 1 to 5 and 12, as a specific implementation manner of the embodiment of the present invention, the ceramic substrate 1 is a package member, and is provided with a receiving cavity 10 for receiving the chip 2, and the cover plate 3 is disposed on the receiving cavity 10 in a sealing manner. The cooperation of holding chamber 10 and apron 3 forms sealed environment, can adapt to the installation demand of different chips 2, not only can hold a plurality of chips in holding chamber 10, can also lead to and receive other components, and the flexibility of use is stronger.

Referring to fig. 6 to 8 and 13, according to different design requirements, a metal sealing ring 11 is disposed on an upper outer edge of the ceramic substrate 1, and a sealing cover 3 is disposed on the metal sealing ring 11.

Specifically, the metal sealing ring 11 is made of iron-nickel-cobalt alloy or iron-nickel alloy, and the ceramic substrate 1 and the metal sealing ring 11 are welded by silver-copper solder, and can be sealed by gold-tin welding, parallel seam welding or laser seam welding.

Referring to fig. 1 to 5 and 12, according to different design requirements, at least one receiving cavity 10 is provided, and each receiving cavity 10 is opened to the upper side or the lower side of the ceramic substrate 1. If two containing cavities 10 with openings at the upper side and the lower side are arranged, the integration level of a single packaging structure can be further improved, and the integration level of a circuit is further improved.

As a specific implementation manner of the embodiment of the invention, please refer to fig. 15, the ceramic substrate 1 includes a plurality of ceramic sheets 101 stacked in layers, the conductive structure includes a conductive via 12 disposed in the ceramic substrate 1 and a first conductive trace 13 disposed on each layer of the ceramic sheet 101, and the first conductive trace 13 is electrically connected to the conductive via 12 and the terminal. The conductive structure is simple in design, short in path and small in interference to signals.

As a specific implementation manner of the embodiment of the present invention, please refer to fig. 15, the first conductive trace 13 is disposed on the upper surface of each layer of the ceramic sheet 101, the outer edge of the lower surface of the adjacent ceramic sheet 101 is further disposed with a second conductive trace 14 for overlapping the end of the first conductive trace 13, and the second conductive trace 14 extends to the edge of the ceramic sheet 101.

In a general conductive structure, a first conductive trace 13 is printed on the upper surface of one ceramic chip 101, so that the connection between the first conductive trace 13 and a leading-out terminal (a side metallized hole 7 or a fifth bonding pad 9) is relatively weak, which is easy to cause an open circuit and affects the normal operation of the chip. In this embodiment, by providing the second conductive trace 14, the contact area between the conductive trace and the terminal is increased, so that the connection performance between the conductive trace and the terminal can be enhanced to a great extent, and the use reliability is improved.

Specifically, Al may be used for the ceramic substrate 1₂O₃AlN, glass porcelain etc. multilayer cofiring technique, if adopt side metallization hole 7 as leading out the end, the concrete manufacturing procedure is: the housing is cast → cavity and punch → hole metallization → printing → positioning → lamination → hot cutting into individual green ceramic pieces → sintering → nickel plating → brazing → gold plating.

The ceramic leadless chip type packaging structure has the advantages of being capable of achieving multilayer wiring, enabling design of products to be more flexible, enabling design optimization of electrical performance, thermal performance and mechanical performance, enabling multi-cavity, multilayer wiring, multi-via-hole interconnection and air tightness to be achieved, being capable of meeting different requirements of devices, modules and components, being high in air tightness, wiring density and heat dissipation capacity and reliability, being capable of effectively reducing size and weight of the integrated devices, achieving miniaturization and meeting heat dissipation requirements of power devices, specifically, a ceramic substrate 1 can be provided with a wiring structure with 2 layers to 50 layers, leading-out end pitches are 1.27mm, 1.016mm, 0.80mm, 0.65mm, 0.635mm and 0.50mm, and can be customized according to use requirements of users, a third bonding pad 6 or a fourth bonding pad is arranged on two sides or four sides of the bottom of the ceramic substrate 1, the minimum external dimension can reach 3mm × 3mm, and the air tightness can meet the requirement of being not more than 1 × 10-3 cm³S, A4; the reliability is high, can satisfy temperature cycle: -65 ℃ to 175 ℃, 200 times, constant acceleration: 30000g, Y1 direction, 1 min.

The ceramic leadless chip type packaging structure combines the flip-chip mounting technology and the ceramic leadless chip type carrier shell technology, and can simultaneously have the excellent electrical property of a flip-chip shell and the mature terminal leading-out mode of the ceramic leadless chip type carrier shell, because the external dimension of the ceramic leadless chip type packaging structure is smaller than that of a shell with the traditional structure, the leadless chip type packaging structure can be directly replaced with the traditional shell in board-level mounting and use, and has the following advantages: 1. the chip packaging structure is suitable for flip chip mounting, and chip mounting and electrical interconnection are completed synchronously, so that the electrical performance is improved while the packaging process steps are reduced; 2. the chip mounting cavity and the bonding fingers are omitted, the overall dimension of the ceramic substrate is reduced, the overall dimension of the shell is reduced by at least more than 1.00mm, the processing difficulty of the ceramic substrate is reduced, the leading-out mode is the same as that of a conventional shell, and mounting substitution can be realized.

In the invention, a plurality of side metallized holes 7 are often arranged around the ceramic substrate 1 taking the side metallized holes 7 as leading-out ends, in the batch production process, a punching needle combination is established by adopting a module punching processing mode, the punching needle combination corresponds to the side metallized holes 7 around a single product, the punching of the single unit is completed by adopting the punching and cavity punching module in an array at one time, and simultaneously, the holes of one or more units of the product are punched. The purchasing demand of the leadless multi-layer shell is very large, generally in the millions, however, the traditional production mode is usually punched by a single punching needle, only one hole can be punched by one-time punching, and the cavity is formed by multiple punching and splicing modes, so that the processing efficiency is very low, the requirement of batch production is difficult to meet, and by adopting the processing mode of the module punching, the punching efficiency can be greatly improved, the production cost is reduced, and the production efficiency is improved by 5-10 times.

In addition, the ceramic substrate 1 with the side metallized holes 7 as the leading-out ends is also used, the side holes are mainly manufactured for single-layer ceramic plates in the traditional main hollow metallization processing mode, then metallization is carried out, and finally each single-layer ceramic plate is stacked to form an integral side metallized hole. The improved hollow metallization technology is provided, all layers are firstly stacked and then hollow metallization of the inner wall of a hole is carried out, the insulation between the hollow metallization holes between layers is good, the production efficiency is high, the problems that the appearance of the hole is poor and the insulation resistance fails due to overflow or overflow of the hollow metallization are solved, the processing yield of the hollow metallization technology reaches 98%, and the problem that the metallization layer has a dendritic structure can be solved.

The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.