阅读说明：本技术 一种低成本1n4148w二极管及其制造方法 (Low-cost 1N4148W diode and manufacturing method thereof ) 是由 陈海波 于 2020-03-19 设计创作，主要内容包括：本发明涉及二极管技术领域,具体涉及一种低成本1N4148W二极管,包括不接触的第一导线以及第二导线,第一导线的末端与第二导线的前端之间设有芯粒,芯粒通过焊锡膏与第一导线及第二导线电连接；第一导线、第二导线以及芯粒外围通过黑胶进行塑封形成封装体,第一导线从封装体一侧引出第一引脚,第二导线从二极管另一侧引出第二引脚。本发明还提供一种低成本1N4148W二极管的制造方法,包括涂覆光刻胶、切割、化学腐蚀、玻璃钝化及镀镍等步骤。本发明提供了一种能快速有效制作1N4148W二极管的方法,利用台面工艺替换原有的平面工艺,不仅提高了良品率,也减少了成本。(The invention relates to the technical field of diodes, in particular to a low-cost 1N4148W diode, which comprises a first wire and a second wire which are not in contact, wherein a core particle is arranged between the tail end of the first wire and the front end of the second wire, and the core particle is electrically connected with the first wire and the second wire through soldering paste; the first lead, the second lead and the periphery of the core particles are subjected to plastic package through black glue to form a package body, the first lead leads out a first pin from one side of the package body, and the second lead leads out a second pin from the other side of the diode. The invention also provides a manufacturing method of the low-cost 1N4148W diode, which comprises the steps of coating photoresist, cutting, chemical corrosion, glass passivation, nickel plating and the like. The invention provides a method for quickly and effectively manufacturing a 1N4148W diode, which replaces the original plane process with a table-board process, thereby not only improving the yield, but also reducing the cost.)

1. A low cost 1N4148W diode, comprising: the lead comprises a first lead and a second lead which are not in contact with each other, wherein a core particle is arranged between the tail end of the first lead and the front end of the second lead, and the core particle is electrically connected with the first lead and the second lead through soldering paste;

the first lead, the second lead and the periphery of the core particles are subjected to plastic package through black glue to form a package body, the first lead leads out a first pin from one side of the package body, and the second lead leads out a second pin from the other side of the package body.

2. A low cost 1N4148W diode according to claim 1, wherein: the core grain is a PN junction, and the PN junction comprises an N + type semiconductor, an N type semiconductor and a P + type semiconductor which are sequentially stacked.

3. A low cost 1N4148W diode according to claim 2 wherein: and the side edge of the contact surface of the N-type semiconductor and the P + type semiconductor is provided with a communicated groove, and the groove is internally coated with solidified glass powder slurry.

4. The invention also discloses a low-cost 1N4148W diode according to claim 1, wherein the invention further discloses a manufacturing method of the low-cost 1N4148W diode, which is characterized by comprising the following steps:

step (1): the preparation of the core particle comprises the following steps,

s1: preparing a P + NN + wafer, performing platinum diffusion on a P + type semiconductor layer and an N + type semiconductor layer of the P + type semiconductor wafer, respectively coating photoresist on the outer surfaces of the P + type semiconductor layer and the N + type semiconductor layer, and exposing the photoresist surfaces;

s2: cutting a groove on the P + type semiconductor layer coated with the photoresist obtained in the step S1 by using a diamond blade with the blade edge width of 20-30 mu m, wherein the depth of the cut groove is close to the bottom of the P + type semiconductor layer and does not penetrate through the P + type semiconductor layer;

s3: removing the residual photoresist in the groove in the S2 and the residues of the P + type semiconductor layer and the N type semiconductor layer;

s4: pouring the mixed acid liquid into the groove to carry out corrosion for 5-7 minutes, corroding the width of the groove to 60 mu m, and continuously corroding the N-type semiconductor layer for 30 mu m after the mixed acid liquid penetrates through the P + type semiconductor layer; the mixed acid solution is prepared from sulfuric acid: 3% of water: 97 percent;

s5: washing the product obtained in the step S4 to remove the mixed acid liquid and the residual colloid;

s6: coating glass powder slurry on the corroded part in the groove of the core particle obtained in the step S5, and sintering at the temperature of 500-1000 ℃ to form a passivation glass layer;

s7: plating nickel on the outer surfaces of the P + type semiconductor layer and the N + type semiconductor layer of the core particles with the formed passivation glass layer to form ohmic contact so as to generate electrical performance;

s8: detecting the formed core particles, and screening out unqualified core particles;

s9: cutting and splitting the qualified semi-finished core particles generated in the step S8, and cutting and splitting the qualified semi-finished core particles along one side of the groove close to the P + type semiconductor layer by using a laser cutting machine to form finished core particles;

step (2): mounting the chip, and eutectic-crystallizing the core particles on the lead frame at the temperature of 150-300 ℃;

and (3): welding, namely welding the two conductive ends of the core particles to the first lead wire and the second lead wire of the lead frame through soldering paste to form ohmic connection, so that the whole body of the lead frame has conductivity;

and (4): performing die pressing, namely performing press forming on the product obtained in the step (3) by using the modified epoxy molding compound, and packaging, wherein a section of the first lead and a section of the second lead are reserved as a first pin and a second pin;

and (5): baking, namely baking the product obtained in the step (4) in a baking oven at the baking temperature of 150-;

and (6): removing the flash, and removing the flash of the material sheet after mould pressing and baking by using a chemical and physical method;

and (7): electroplating, namely plating tin on the surface of the product obtained in the step (6) to ensure that the product has welding characteristics;

and (8): and (4) forming, namely cutting and forming the product subjected to tin plating in the step (7) according to a product profile drawing, performing typical test by using a white hollow billet through a through machine, printing and packaging to form a finished product.

5. The method of claim 4 for manufacturing a low cost 1N4148W diode, wherein: the chemical and physical method is

Firstly, immersing the product obtained in the step (5) into a rubber softening agent with the temperature of 80-120 ℃ for 25-35 minutes;

secondly, placing the softened product in sulfuric acid with the concentration of 2-4% for soaking for 40-50 minutes at room temperature;

and finally, spraying the product obtained in the step (5) by using a high-pressure water column of 20-34MPa for 2-6 minutes.

Technical Field

The invention relates to the technical field of diodes, in particular to a low-cost 1N4148W diode and a manufacturing method thereof.

Background

In recent years, with the rapid development of microwave devices, higher requirements are put on the switching time and conduction loss of discrete devices in the microwave frequency band. In the low voltage field of high frequency circuits, the preferred devices are schottky diodes with high switching speed and low on-state voltage drop, and rectifier tubes with MPS structure. Since the diodes of both structures are produced and operated based on the principle of the semiconductor schottky barrier, the cost is relatively high. However, in the one-way conduction and isolation of circuits with higher signal frequency, and communication, computer boards, television circuits and industrial control circuits, the switching speed of diodes is only strictly required, and the conduction loss is not high, so that a batch of high-frequency PN junction diodes represented by 1N4148 have a place in the market gradually.

1N4148 is a small high-speed switching diode which is fast to switch and widely used for unidirectional conduction and isolation of circuits with high signal frequency, communication, computer boards, television circuits and industrial control circuits. At present, the 1N4148 on the market mainly has two packaging forms: axial glass-encapsulated 1N4148, patch SOD 123-FL-encapsulated 1N4148W (hereinafter collectively referred to as 1N 4148). Compared with the manufacturing process of the Schottky diode tube core, the 1N4148 tube core adopts a plane process, and a PN junction is formed by an epitaxial method, so that the cost is greatly reduced compared with that of the Schottky diode tube core.

At present, the 1N4148 product die in the market is mainly manufactured by a planar process, and due to the large investment and slow return of the planar process, many companies do not have the process production line, and the whole market also presents a situation of short supply and short demand.

The materials mainly used in the planar process are silicon and silver; meanwhile, the fault tolerance of the planar process is low, so that the defective product rate is improved, and the production cost is improved.

Disclosure of Invention

In view of the above, the present invention provides a low cost 1N4148W diode and a method of manufacturing the same.

In order to solve the technical problems, the technical scheme adopted by the invention is as follows:

a low-cost 1N4148W diode comprises a first wire and a second wire which are not in contact, wherein a core particle is arranged between the tail end of the first wire and the front end of the second wire, and the core particle is electrically connected with the first wire and the second wire through solder paste;

the first lead, the second lead and the periphery of the core particles are subjected to plastic package through black glue to form a package body, the first lead leads out a first pin from one side of the package body, and the second lead leads out a second pin from the other side of the package body.

Further, the core particle is a PN junction, and the PN junction includes an N + type semiconductor, an N type semiconductor, and a P + type semiconductor stacked in this order.

Furthermore, the side edge of the contact surface of the N-type semiconductor and the P + type semiconductor is provided with a communicated groove, and the inside of the groove is coated with solidified glass powder slurry.

The invention also discloses a manufacturing method of the low-cost 1N4148W diode, which comprises the following steps:

step (1): the preparation of the core particle comprises the following steps,

s1: preparing a P + NN + wafer, performing platinum diffusion on a P + type semiconductor layer and an N + type semiconductor layer of the P + type semiconductor wafer, respectively coating photoresist on the outer surfaces of the P + type semiconductor layer and the N + type semiconductor layer, and exposing the photoresist surfaces;

s2: cutting a groove on the P + type semiconductor layer coated with the photoresist obtained in the step S1 by using a diamond blade with the blade edge width of 20-30 mu m, wherein the depth of the cut groove is close to the bottom of the P + type semiconductor layer and does not penetrate through the P + type semiconductor layer;

s3: removing the residual photoresist in the groove in the S2 and the residues of the P + type semiconductor layer and the N type semiconductor layer;

s4: pouring the mixed acid liquid into the groove to carry out corrosion for 5-7 minutes, corroding the width of the groove to 60 mu m, and continuously corroding the N-type semiconductor layer for 30 mu m after the mixed acid liquid penetrates through the P + type semiconductor layer; the mixed acid solution is prepared from sulfuric acid: 3% of water: 97 percent;

s5: washing the product obtained in the step S4 to remove the mixed acid liquid and the residual colloid;

s6: coating glass powder slurry on the corroded part in the groove of the core particle obtained in the step S5, and sintering at the temperature of 500-1000 ℃ to form a passivation glass layer;

s7: plating nickel on the outer surfaces of the P + type semiconductor layer and the N + type semiconductor layer of the core particles with the formed passivation glass layer to form ohmic contact so as to generate electrical performance;

s8: detecting the formed core particles, and screening out unqualified core particles;

s9: cutting and splitting the qualified semi-finished core particles generated in the step S8, and cutting and splitting the qualified semi-finished core particles along one side of the groove close to the P + type semiconductor layer by using a laser cutting machine to form finished core particles;

step (2): mounting the chip, and eutectic-crystallizing the core particles on the lead frame at the temperature of 150-300 ℃;

and (3): welding, namely welding the two conductive ends of the core particles to the first lead wire and the second lead wire of the lead frame through soldering paste to form ohmic connection, so that the whole body of the lead frame has conductivity;

and (4): performing die pressing, namely performing press forming on the product obtained in the step (3) by using the modified epoxy molding compound, and packaging, wherein a section of the first lead and a section of the second lead are reserved as a first pin and a second pin;

and (5): baking, namely baking the product obtained in the step (4) in a baking oven at the baking temperature of 150-;

and (6): removing the flash, and removing the flash of the material sheet after mould pressing and baking by using a chemical and physical method;

and (7): electroplating, namely plating tin on the surface of the product obtained in the step (6) to ensure that the product has welding characteristics;

sheet, 32 second resistor, 4 magnetic bowl, 5 pole piece

And (8): and (4) forming, namely cutting and forming the product subjected to tin plating in the step (7) according to a product profile drawing, performing typical test by using a white hollow billet through a through machine, printing and packaging to form a finished product.

Further, the chemical and physical methods are that firstly, the product obtained in the step (5) is immersed in a rubber softener with the temperature of 80-120 ℃ for 25-35 minutes;

secondly, placing the softened product in sulfuric acid with the concentration of 2-4% for soaking for 40-50 minutes at room temperature;

and finally, spraying the product obtained in the step (5) by using a high-pressure water column of 20-34MPa for 2-6 minutes.

Therefore, compared with the prior art, the technical means of the invention mainly has the following advantages:

1) the low-cost 1N4148W diode of the invention uses silicon and nickel materials as the base material, effectively reducing the manufacturing cost.

2) The invention provides a method for quickly and effectively manufacturing a 1N4148W diode, and the method for manufacturing the 1N4148W diode with low cost utilizes a table-board process to replace the original plane process, thereby not only improving the yield, but also reducing the cost.

Drawings

The foregoing and other objects, features, and advantages of the invention will be apparent from the following detailed description taken in conjunction with the accompanying drawings.

FIG. 1 is a schematic structural view of the present invention;

FIG. 2 is a schematic view of the core particle structure of the present invention;

fig. 3 is a schematic view of a core grain structure manufactured by a conventional planar process.

Wherein: 1. the structure of the semiconductor device comprises a first conducting wire, 11, a first pin, 2, a second conducting wire, 21, a second pin, 3, a core particle, 31, a P + type semiconductor, 32, an N type semiconductor, 33, an N + type semiconductor, 34, glass powder slurry, 35, a nickel plating layer, 36, an oxide layer, 4 solder paste, 5, black glue, 6, the core particle manufactured by a planar process, 61.P type semiconductor, 62, an N type semiconductor used in the planar process and 63 an isolation ring.

Detailed Description

Preferred embodiments of the present invention will be described below with reference to the accompanying drawings. The following description with reference to the accompanying drawings is provided to assist in understanding the embodiments of the invention defined by the claims. It includes various specific details to assist understanding, but they are to be construed as merely illustrative. Accordingly, those skilled in the art will recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present invention.

The invention will be further described with reference to the following several figures of the specification:

referring to FIGS. 1-2: a low-cost 1N4148W diode comprises a first wire 1 and a second wire 2 which are not in contact, wherein a core particle 3 is arranged between the tail end of the first wire 1 and the front end of the second wire 2, and the core particle 3 is electrically connected with the first wire 1 and the second wire 2 through a solder paste 4; the first lead 1, the second lead 2 and the periphery of the core particle 3 are subjected to plastic package through a black glue 5 to form a package body, the first lead 1 leads out a first pin 11 from one side of the package body, and the second lead 2 leads out a second pin 21 from the other side of the package body. The core grain 3 is a PN junction including an N + -type semiconductor 33, an N-type semiconductor 32, and a P + -type semiconductor 31 stacked in this order. The side edges of the contact surfaces of the N-type semiconductor 32 and the P + type semiconductor 31 are provided with communicated grooves, and the grooves are internally coated with solidified glass powder slurry 34. The outer layer of the glass frit slurry will form a non-conductive oxide layer 36 after curing.

In the low-cost 1N4148W diode, the PN junction of the mesa process is used to replace the original PN junction of the planar process.

Referring to fig. 3, fig. 3 is a schematic diagram of a conventional planar process, in which a P-type semiconductor 61, an isolation ring 63, and an N-type semiconductor 62 are illustrated from the inside to the outside. The core particles manufactured by the mesa technology usually need silver plating on the surface, and the cost is higher. Meanwhile, since the isolation ring 63 is narrow, the P-type semiconductor 61 is very easy to diffuse to the N-type semiconductor 62 during the manufacturing process, so that the core particle is failed, the rejection rate is high, and the cost is raised.

Referring to fig. 2, which is a schematic structural diagram of a PN junction of a mesa process, a trench is dug between a P + type semiconductor 31 and an N type semiconductor 32, and a cured glass frit slurry 34 is coated in the trench, so that electrical conduction at the side of a contact surface between the P + type semiconductor 31 and the N type semiconductor 32 is avoided, and breakdown is prevented. The surface of the table-board process adopted by the invention only needs to be plated with tin generally, thereby effectively reducing the production cost.

The invention also discloses a manufacturing method of the low-cost 1N4148W diode, which comprises the following steps:

step (1): preparing the core particles. The manufacturing of the core particles is a key part for manufacturing the low-cost 1N4148W diode, and the core particles are manufactured by utilizing a table-board process, so that the manufacturing efficiency is improved, the yield is improved, and the cost is reduced; meanwhile, the quality of the core particles is also closely related to the electrical performance of the 1N4148W diode of the final product.

S1: preparing a P + NN + wafer, performing platinum diffusion on a P + type semiconductor layer and an N + type semiconductor layer of the P + type semiconductor wafer, respectively coating photoresist on the outer surfaces of the P + type semiconductor layer and the N + type semiconductor layer, and exposing the photoresist surfaces. The P + type semiconductor layer is a P + type semiconductor part of the core grain, the N type semiconductor layer is an N type semiconductor part of the core grain, and the N + type semiconductor layer is an N + type semiconductor part of the core grain, and the 1N4148W diode is a high-speed switching diode, so that the electrical performance requirement is high. The photoresist is coated on the outer surfaces of the P + type semiconductor layer and the N + type semiconductor layer and is exposed so as to facilitate a graver to cut the surface of the P + type semiconductor layer in the subsequent steps.

S2: the photoresist-coated P + -type semiconductor layer obtained in S1 was grooved using a diamond blade having a blade width of 20 μm or 25 μm or 30 μm to a depth close to the bottom of the P + -type semiconductor layer without penetrating the P + -type semiconductor layer.

S3: and removing the photoresist and the P + type semiconductor layer residues remained in the groove in the S2.

S4: pouring the mixed acid liquid into the groove to perform corrosion for 5-7 minutes (5 minutes or 6 minutes or 7 minutes or 8 minutes), corroding the width of the groove to 60 micrometers, and continuously corroding the N-type semiconductor layer for 30 micrometers after the groove penetrates through the P + type semiconductor layer; the mixed acid solution is prepared from sulfuric acid: 3% of water: 97 percent.

S5: and (4) washing the product obtained in the step (S4), and washing away the mixed acid liquor and residual colloid.

S6: the etched portion in the groove of the core particle obtained in S5 was coated with a glass frit paste and sintered at a temperature of 500 c or 600 c or 700 c or 800 c or 900 c or 1000 c to form a passivated glass layer.

The purpose of the steps is as follows: because the invention adopts the P + type semiconductor and the N + type semiconductor with high doping degree, the P + type semiconductor layer and the N type semiconductor layer are tightly abutted, and the PN junction is very narrow, the Zener breakdown is easy to occur at the side edge of the P + type semiconductor layer and the N type semiconductor layer, thereby burning the diode. According to the invention, the groove is arranged between the P + type semiconductor layer and the N type semiconductor layer, and the groove is coated with the glass powder slurry and sintered to form the passivation glass layer, so that Zener breakdown is effectively avoided, the core particles are effectively protected, and the reliability of the core particles is improved.

S7: and plating nickel on the outer surfaces of the P + type semiconductor layer and the N + type semiconductor layer of the core particles with the formed passivation glass layers to form ohmic contact, so that the core particles generate electrical performance.

S8: and detecting the formed core particles, and screening out unqualified core particles.

S9: and cutting and splitting the qualified semi-finished core particles generated in the step S8, and cutting and splitting the qualified semi-finished core particles along one side of the groove close to the P + type semiconductor layer by using a laser cutting machine to form finished core particles.

Step (2): and (3) mounting, and eutectic-crystallizing the core particles onto a lead frame at the temperature of 150 ℃, or 200 ℃, or 250 ℃ or 300 ℃. This step makes the core grain can completely install to the lead frame on, the lead frame is the fashioned frame shape of an organic whole, and a plurality of compartments have been seted up to inside, is equipped with two sets of first wires and second wire in the compartment.

And (3): and in the step of welding, the two conductive ends of the core particles are welded between the first lead and the second lead of the lead frame through the soldering paste to form ohmic connection, so that the whole body has conductivity.

And (4): and (3) performing mould pressing, namely performing press forming on the product obtained in the step (3) by using the modified epoxy plastic package material, and packaging, wherein a section of the first lead and a section of the second lead are reserved as a first pin and a second pin. The modified epoxy molding compound is generally EMG400 black gel from Huahai corporation.

And (5): and (3) baking, namely baking the product obtained in the step (4) in an oven at the baking temperature of 150 ℃, or 175 ℃ or 200 ℃.

And (6): and (3) removing the flash, namely removing the flash of the tablet after mould pressing and baking by using a chemical and physical method.

And (7): electroplating, and plating tin on the surface of the product obtained in the step (6) to ensure that the product has welding characteristics.

And (8): and (4) forming, namely cutting and forming the product subjected to tin plating in the step (7) according to a product profile drawing, performing typical test by using a white hollow billet through a through machine, printing and packaging to form a finished product.

The chemical and physical methods are that firstly, the product obtained in the step (5) is immersed in a rubber softener with the temperature of 80 ℃ or 90 ℃ or 100 ℃ or 110 ℃ or 120 ℃ for 25-35 minutes (25 minutes or 30 minutes or 35 minutes)

Secondly, soaking the softened product in sulfuric acid with the concentration of 2% or 3% or 4% for 40-50 minutes (40 minutes or 45 minutes or 50 minutes) at room temperature;

finally, the product obtained in step (5) is sprayed with a high-pressure water column of 20MPa or 23MPa or 27MPa or 30MPa or 34MPa for a period of 2-6 minutes (6 minutes, 5 minutes, 4 minutes, 3 minutes, 2 minutes).

The 1N4148W diode finally produced by the method of the invention has the following performance levels:

the reverse breakdown voltage VB is more than or equal to 90V (@ IR ═ 10 muA);

the forward constant current IFM is less than or equal to 310 mA;

the maximum average rectified current I (AV) is less than or equal to 150 mA;

maximum forward voltage VF at 25 ℃ is less than or equal to 1.20V (@ IF ═ 150 mA);

the reverse recovery time Trr is less than or equal to 4 ns;

the one-time yield of the package is more than 99.9 percent.

The performance indexes of the 1N4148W diode produced by the traditional planar process are as follows:

the reverse breakdown voltage VB is more than or equal to 100V (@ IR ═ 10 muA);

the forward constant current IFM is less than or equal to 300 mA;

the maximum average rectified current I (AV) is less than or equal to 150 mA;

maximum forward voltage VF at 25 ℃ is less than or equal to 1.25V (@ IF ═ 150 mA);

the reverse recovery time Trr is less than or equal to 4 ns;

the one-time yield of the package is 90%.

As can be seen from the above comparison, the 1N4148W diode provided by the present invention has a significantly improved yield at one time of packaging, and the nickel is used to replace silver as one of the base materials, thereby reducing the overall cost by about 30%, when the performance is similar to that of the 1N4148W diode produced by the conventional planar process.