阅读说明：本技术 空腔器件组的封装结构及封装方法 (Packaging structure and packaging method of cavity device group ) 是由 林耀剑 刘硕 陈雪晴 周莎莎 何晨烨 徐晨 于 2019-11-11 设计创作，主要内容包括：本发明涉及的一种空腔器件组的封装结构,包括基板,所述基板包括相对设置的基板第一表面与基板第二表面,所述基板第一表面设有第一空腔器件组,所述封装结构还包括：第一密封层,所述第一密封层包封第一空腔器件组；第一塑封层,所述第一塑封层包封所述第一密封层,且所述第一密封层密封材料的流动性小于所述第一塑封层塑封材料的流动性。通过上述设置,可解决目前封装结构中的滤波器等空腔器件组易受到注塑过程中的模流压力而造成器件损坏、功能失效的问题,并可保持模组的功能和小型化。(The invention relates to a packaging structure of a cavity device group, which comprises a substrate, wherein the substrate comprises a substrate first surface and a substrate second surface which are oppositely arranged, the substrate first surface is provided with a first cavity device group, and the packaging structure further comprises: a first sealing layer encapsulating a first group of cavity devices; the first sealing layer is encapsulated by the first plastic packaging layer, and the flowability of the sealing material of the first sealing layer is smaller than that of the plastic packaging material of the first plastic packaging layer. Through the arrangement, the problems that cavity device groups such as a filter and the like in the existing packaging structure are damaged and function failure is caused due to the fact that the cavity device groups are prone to mold flow pressure in the injection molding process can be solved, and the functions and miniaturization of the modules can be kept.)

1. The utility model provides a packaging structure of cavity device group, includes the base plate, the base plate includes relative base plate first surface and the base plate second surface that sets up, base plate first surface is equipped with first cavity device group, its characterized in that, packaging structure still includes:

a first sealing layer encapsulating a first group of cavity devices;

the first sealing layer is encapsulated by the first plastic packaging layer, and the flowability of the sealing material of the first sealing layer is smaller than that of the plastic packaging material of the first plastic packaging layer.

2. The package structure of a set of cavity devices according to claim 1, wherein the first sealing layer further covers the substrate first surface.

3. The package structure of the cavity device set as claimed in claim 1, wherein the second surface of the substrate is provided with a second cavity device set and a second sealing layer, and the second sealing layer encapsulates the second cavity device set.

4. The package structure of the cavity device set according to claim 3, wherein the second surface of the substrate is further covered with a second molding compound, the second molding compound encapsulates the second sealing layer, and the flowability of the sealing material of the second sealing layer is smaller than the flowability of the molding compound of the second molding compound.

5. The package structure of the cavity device set as claimed in claim 1, wherein a dummy wafer is further disposed on an edge of the first surface of the substrate, and the dummy wafer is encapsulated by the first sealing layer and the first molding layer in sequence.

6. The package structure of the cavity device set as claimed in claim 1, wherein the first surface of the substrate is further provided with a passive device, and the first sealing layer and the first molding layer sequentially encapsulate the passive device.

7. The package structure of the cavity device set as claimed in claim 1, wherein the second surface of the substrate is further provided with an electrical and thermal conduction structure and a second molding compound layer, and the second molding compound layer encapsulates at least a portion of the electrical and thermal conduction structure.

8. A method for packaging a cavity device group is characterized by comprising the following steps:

arranging a first cavity device group on the first surface of the substrate;

disposing a first sealing layer at a periphery of the first cavity device group such that the first sealing layer encapsulates the first cavity device group;

and plastically packaging the first surface of the substrate to form a first plastic packaging layer, so that the first plastic packaging layer encapsulates the first sealing layer, and the flowability of the sealing material of the first sealing layer is smaller than that of the plastic packaging material of the first plastic packaging layer.

9. The method for packaging a cavity device group according to claim 8, wherein the step of providing a first sealing layer at a periphery of the first cavity device group so that the first sealing layer encapsulates the first cavity device group specifically comprises:

disposing a first sealing layer at a periphery of the first cavity device group and the substrate first surface such that the first sealing layer covers the substrate first surface and encapsulates the first cavity device group.

10. The method for packaging a cavity device group according to claim 8, wherein before the step of providing the first cavity device group on the first surface of the substrate or after the step of molding the first surface of the substrate to form the first molding layer, the first molding layer encapsulates the first sealing layer, and the flowability of the sealing material of the first sealing layer is smaller than the flowability of the molding material of the first molding layer, the method further comprises:

and arranging a second cavity device group and a second sealing layer on the second surface of the substrate, so that the second sealing layer encapsulates the second cavity device group.

11. The method for packaging a set of cavity devices according to claim 10, wherein after the step of providing a second set of cavity devices and a second sealing layer on the second surface of the substrate such that the second sealing layer encapsulates the second set of cavity devices, the method further comprises:

covering a second plastic package layer on the second surface of the substrate, so that the second plastic package layer encapsulates the second sealing layer, and the flowability of the sealing material of the second sealing layer is smaller than that of the plastic package material of the second plastic package layer.

12. The method of packaging a set of cavity devices of claim 8, wherein after the step of providing the first set of cavity devices on the first surface of the substrate, the method further comprises:

and arranging a dummy sheet at the edge of the first surface of the substrate, so that the dummy sheet is sequentially encapsulated by the first sealing layer and the first plastic packaging layer.

13. The method of packaging a set of cavity devices of claim 8, wherein after the step of providing the first set of cavity devices on the first surface of the substrate, the method further comprises:

and arranging a passive element on the first surface of the substrate, so that the passive element is sequentially encapsulated by the first sealing layer and the first plastic packaging layer.

14. The method for packaging a group of cavity devices according to claim 8, wherein after the step of "molding the first surface of the substrate to form a first molding layer such that the first molding layer encapsulates the first sealing layer and the first sealing layer sealing material has a flowability smaller than that of the first molding layer molding material", the method further comprises:

and thinning the first plastic packaging layer.

15. The method for packaging a set of cavity devices according to claim 11, wherein after the step of "covering a second molding compound layer on the second surface of the substrate such that the second molding compound layer encapsulates the second sealing layer and the flowability of the sealing material of the second sealing layer is smaller than the flowability of the molding compound of the second molding compound layer", the method further comprises:

and thinning the second plastic packaging layer.

Technical Field

The invention relates to the technical field of packaging, in particular to a packaging structure and a packaging method of a cavity device group.

Background

In the current system-level packaging structure, cavity devices such as a filter and the like are sensitive to the plastic package pressure due to the existence of cavities, so that when an injection molding material is used for plastic package of a module product in a subsequent process, the body structures of the cavity devices such as the filter and the like collapse due to incapability of bearing the mold flow pressure in the injection molding process, or the residual stress of the surface of the cavity contacting the plastic package material deforms or cracks in a subsequent reliability test, so that the internal cavities are damaged by pressure, and the functions of the cavity devices such as the filter and the like fail.

Therefore, there is a need for improvement of the related art to solve the above problems, so as to improve the reliability and the package yield of the package structure including the cavity device, and to maintain the function and the miniaturization of the module.

Disclosure of Invention

The invention aims to provide a packaging structure and a packaging method of a cavity device group, which are used for solving the problems of device damage and function failure caused by the fact that cavity device groups such as a filter and the like in the conventional packaging structure are easily subjected to mold flow pressure in the injection molding process, and simultaneously ensuring the function of a radio frequency front-end module.

In order to achieve one of the above objects, an embodiment of the present invention provides a package structure of a cavity device group, including a substrate, where the substrate includes a first substrate surface and a second substrate surface that are oppositely disposed, and the first substrate surface is provided with a first cavity device group, and the package structure further includes: a first sealing layer encapsulating a first group of cavity devices; the first sealing layer is encapsulated by the first plastic packaging layer, and the flowability of the sealing material of the first sealing layer is smaller than that of the plastic packaging material of the first plastic packaging layer.

As a further improvement of an embodiment of the present invention, the first sealing layer further covers the substrate first surface.

As a further improvement of the first embodiment of the present invention, a second cavity device group and a second sealing layer are disposed on the second surface of the substrate, and the second sealing layer encapsulates the second cavity device group.

As a further improvement of the embodiment of the present invention, the second surface of the substrate is further covered with a second plastic package layer, the second plastic package layer encapsulates the second sealing layer, and the flowability of the sealing material of the second sealing layer is smaller than that of the plastic package material of the second plastic package layer.

As a further improvement of the embodiment of the present invention, a dummy wafer is further disposed at an edge of the first surface of the substrate, and the dummy wafer is sequentially encapsulated by the first sealing layer and the first plastic sealing layer.

As a further improvement of an embodiment of the present invention, a passive element is further disposed on the first surface of the substrate, and the passive element is sequentially encapsulated by the first sealing layer and the first plastic sealing layer.

As a further improvement of the embodiment of the present invention, an electrical and thermal conduction structure is further disposed on the second surface of the substrate, and the second plastic encapsulation layer encapsulates at least a portion of the electrical and thermal conduction structure.

An embodiment of the present invention further provides a method for packaging a cavity device group, including: arranging a first cavity device group on the first surface of the substrate; disposing a first sealing layer at a periphery of the first cavity device group such that the first sealing layer encapsulates the first cavity device group; and plastically packaging the first surface of the substrate to form a first plastic packaging layer, so that the first plastic packaging layer encapsulates the first sealing layer, and the flowability of the sealing material of the first sealing layer is smaller than that of the plastic packaging material of the first plastic packaging layer.

As a further improvement of an embodiment of the present invention, the method further comprises: disposing a first sealing layer at a periphery of the first cavity device group and the substrate first surface such that the first sealing layer covers the substrate first surface and encapsulates the first cavity device group.

As a further improvement of an embodiment of the present invention, the method further comprises: and arranging a second cavity device group and a second sealing layer on the second surface of the substrate, so that the second sealing layer encapsulates the second cavity device group.

As a further improvement of an embodiment of the present invention, the method further comprises: covering a second plastic package layer on the second surface of the substrate, so that the second plastic package layer encapsulates the second sealing layer, and the flowability of the sealing material of the second sealing layer is smaller than that of the plastic package material of the second plastic package layer.

As a further improvement of an embodiment of the present invention, the method further comprises: and arranging a dummy sheet at the edge of the first surface of the substrate, so that the dummy sheet is sequentially encapsulated by the first sealing layer and the first plastic packaging layer.

As a further improvement of an embodiment of the present invention, the method further comprises: and arranging a passive element on the first surface of the substrate, so that the passive element is sequentially encapsulated by the first sealing layer and the first plastic packaging layer.

As a further improvement of an embodiment of the present invention, the method further comprises: and thinning the first plastic packaging layer.

As a further improvement of an embodiment of the present invention, the method further comprises: and thinning the second plastic packaging layer.

Compared with the prior art, the invention has the beneficial effects that: in the packaging structure, a sealing layer is arranged between the cavity device group and the plastic packaging layer to seal the cavity device group without contacting with a cavity area of the cavity device, and meanwhile, the fluidity of the sealing layer sealing material is smaller than that of the plastic packaging material of the plastic packaging layer, so that the cavity device group can be protected from being damaged by the molding pressure and functional failure caused by the change of residual stress of other non-device materials, the integral reliability and packaging yield of the packaging structure are finally improved, and the function and miniaturization of the module can be kept.

Drawings

Fig. 1 is a schematic structural view of a package structure in embodiment 1 of the present invention;

fig. 2 is a schematic structural diagram of a first cavity device group in embodiment 1 of the present invention;

fig. 3 is a schematic structural view of a package structure in embodiment 2 of the present invention;

fig. 4 is a schematic structural diagram of a second cavity device group in embodiment 2 of the present invention;

FIG. 5 is a schematic structural diagram of a package structure according to another embodiment of the present invention;

FIG. 6 is a schematic structural diagram of a package structure according to yet another embodiment of the present invention;

FIG. 7 is a schematic structural diagram of a conventional device group according to another embodiment of the present invention;

fig. 8 is a schematic structural view of a package structure in embodiment 3 of the present invention;

FIG. 9 is a schematic structural diagram of a dummy wafer and a passive device in embodiment 3 of the present invention;

fig. 10 is a schematic structural view of a package structure in embodiment 4 of the present invention;

fig. 11 is a flowchart illustrating a packaging method of the package structure according to an embodiment of the invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present application more clear, the technical solutions of the present application will be clearly and completely described below with reference to the detailed description of the present application and the accompanying drawings. It should be apparent that the described embodiments are only some embodiments of the present application, and not all embodiments. All other embodiments obtained by a person of ordinary skill in the art without any inventive work based on the embodiments in the present application are within the scope of protection of the present application.

Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.

As shown in fig. 1 to fig. 6, an embodiment of the invention provides a package structure of a cavity device group, including a substrate 1, where the substrate 1 includes a substrate first surface 11 and a substrate second surface 12 that are disposed opposite to each other, the substrate first surface 11 is provided with a first cavity device group 3, and the package structure further includes: a first sealing layer 5 covering the first surface 11 of the substrate, the first sealing layer 5 encapsulating the first cavity device group 3; the first plastic package layer 7 encapsulates the first sealing layer 5, and the flowability of a sealing material of the first sealing layer 5 is smaller than that of a plastic package material of the first plastic package layer 7.

Specifically, in the package structure, the substrate 1 is a device embedded substrate in which a passive device and an IC chip are embedded; the embedded substrate 1 includes two opposite surfaces, and the first cavity device group 3 sensitive to the molding flow pressure is disposed on the first surface of the substrate 1 and electrically connected to the substrate 1. Further, the substrate 1 may be a non-device embedded type substrate in addition to the device embedded type substrate; the embedded device includes a passive device, a chip, and the like.

In order to prevent mold flow pressure in a subsequent plastic packaging process from damaging cavity devices, a first sealing layer 5 is covered on the first surface 11 of the substrate in advance before the plastic packaging process, and the first sealing layer 5 encapsulates the first cavity device group 3, namely the first sealing layer 5 encapsulates all cavity devices on the first surface 11 of the substrate; the first sealing layer 5 is encapsulated by the first plastic encapsulation layer 7, namely the first cavity device group 3 is sequentially encapsulated by the first sealing layer 5 and the first plastic encapsulation layer 7; meanwhile, the fluidity of the sealing material of the first sealing layer 5 is smaller than that of the plastic packaging material in the subsequent process, so that the sealing material of the first sealing layer 5 does not flow into or contact the pressure sensitive area of the cavity device, and the effect of protecting the first cavity device group 3 is achieved; in the plastic packaging process, the mold flow pressure generated by the first plastic packaging layer 7 is buffered by the first sealing layer 5 in time, so that the first cavity device group 3 can be further protected.

The first sealing layer 5 may be a single-material structure or a structure composed of multiple layers of materials, in which the inner layer is an insulating material, the outer layer is a conductive material, for example, the inner layer is an insulating sealing material at the edge of the device, and the outer layer is a copper Cu or silver Ag conductive spray coating shielding material.

Optionally, the first cavity device group 3 includes at least one cavity device, i.e. the number is not limited, and a plurality of cavity devices may be inside the first cavity device group. The packaging form of each cavity device is not limited, and may be a system-in-package, a WLP wafer-level package, a chip-level package, or the like, or may also be an LGA planar grid array package, a BGA ball grid array package, or the like. Therefore, the first cavity device group 3, the passive components and the IC chip in the substrate 1 and the substrate circuit are organized together to form a radio frequency front end SiP system.

As shown in fig. 2, the first cavity device group 3 includes cavity devices in two package forms, one is in a WLP wafer level package form, and the other is in an LGA or BGA package form.

Optionally, the processing technology of the first sealing layer 5 can adopt a vacuum or low-pressure film pasting technology, and the material can be an organic composite film with a filler; or organic epoxy composite high-viscosity paste is adopted to carry out vacuum low-pressure dispensing, and the edge sealing and integral spraying of the device are combined to process the first sealing layer 5. The sprayed material may be an electromagnetic shielding material such as a conductive spray material of copper Cu combined with silver Ag. The processing technology of the first plastic package layer 7 can adopt a conventional injection molding technology or a hot pressing technology, and the material is a plastic package material with better fluidity.

Alternatively, due to the difference in processing technology, the first sealing layer 5 may encapsulate only the first cavity device group 3 without covering the substrate first surface 11, or may encapsulate the first cavity device group 3 while covering the substrate first surface 11.

Optionally, a device or a passive element 93 with a small I/O and a large center distance, which is not easy to bridge a short circuit, such as a large inductor, may be further disposed on the first surface 11 or the second surface 12 of the substrate; when the passive component 93 such as a large inductor is disposed on the first surface 11 of the substrate, it may be sequentially encapsulated by the first sealing layer 5 and the first molding compound 7, or only encapsulated by the first molding compound 7.

Optionally, other thin devices and chips may be embedded into the substrate 1, that is, the substrate 1 may be embedded into the thin devices in a hollow manner, or the thin devices and the substrate 1 are integrally molded, so as to save the overall space of the package structure and improve the package integration level.

In addition, other devices may be disposed on the second surface 12 of the substrate or in the substrate, such as passive components or other pin-short sensitive and non-pressure sensitive devices like IC chips.

Further, the first sealing layer 5 also covers the substrate first surface 11.

When a processing method such as film pasting is adopted, the first sealing layer 5 can cover the whole substrate first surface 11 and completely encapsulate the first cavity device group 3. Therefore, the processing and setting of the first sealing layer 5 are convenient and quick.

Further, the second surface 12 of the substrate is provided with a second cavity device group 2 and a second sealing layer 4, and the second sealing layer 4 encapsulates the second cavity device group 2.

Further, the second surface 12 of the substrate is covered with a second plastic package layer 6, the second plastic package layer 6 encapsulates the second sealing layer 4, and the flowability of the sealing material of the second sealing layer 4 is smaller than that of the plastic package material of the second plastic package layer 6.

As shown in fig. 3 to 4, the second surface 12 of the substrate may further be provided with a second cavity device group 2 sensitive to the pressure of the molding flow, the second cavity device group 2 is encapsulated by a second sealing layer 4, and the second sealing layer 4 has low fluidity of a sealing material, and may not flow into or contact with the pressure sensitive area of the cavity device, so as to protect the second cavity device group 2.

Meanwhile, the second surface 12 of the substrate may be further provided with solder balls 821 for further electrical connection with other substrates or structures.

The second sealing layer 4 is optional, i.e. can be selected according to the specific situation of the second surface 12 of the substrate; for example, when the second surface 12 of the substrate is provided with other conventional device sets insensitive to molding pressure, the second sealant 4 may not be present on the second surface 12 of the substrate, and only the second molding layer 6 is required to cover the second surface.

In addition, the second surface 12 of the substrate may further be covered with a second molding compound layer 6, and the second molding compound layer 6 encapsulates the second sealing layer 4 and does not contact the cavity region of the cavity device; meanwhile, when the materials are selected, the flowability of the sealing material of the first sealing layer 5 is ensured to be smaller than that of the plastic packaging material of the second plastic packaging layer 6; therefore, in the plastic packaging process, the mold flow pressure generated by the second plastic packaging layer 6 is buffered by the second sealing layer 4 in time, and the second sealing layer 4 further plays a role in protecting the second cavity device group 2.

Meanwhile, when the solder balls 821 are disposed on the second surface 12 of the substrate, at least a portion of the solder balls 821 is exposed by the second molding layer 6 for further electrical connection.

Here, the second molding compound 6 encapsulates the second sealing layer 4, which means that the second molding compound 6 may completely cover all the peripheral surface of the second sealing layer 4, or the second molding compound 6 may cover the peripheral surface of the second sealing layer 4. The second sealing layer 4 is optional and can be selected according to the specific situation of the second surface 12 of the substrate.

The material of the second sealing layer 4 can be an organic composite film with filler, or organic epoxy composite high-viscosity paste is adopted for vacuum low-pressure dispensing to seal the edge of the device and locally spray-bond the substrate. The sprayed material may be an electromagnetic shielding material such as a conductive spray material of copper Cu combined with silver Ag.

In another embodiment of the package structure, the second sealing layer 4 may cover the entire second surface 12 of the substrate instead of encapsulating the second cavity device group 2, as shown in fig. 5, and the second surface 12 of the substrate may also be covered with only one second sealing layer 4. Similarly, the material of the second sealing layer 4 may be an organic composite film with filler, or a vacuum low-pressure glue dispensing with organic epoxy composite high-viscosity paste is performed to seal the edge of the device and locally spray-bond the substrate. The sprayed material can be electromagnetic shielding material, such as conductive sprayed material combining copper Cu and silver Ag, and can also be insulating material.

When the second sealant 4 covers the entire second surface 12 of the substrate, the pads 121 on the second surface 12 need to be exposed by a laser opening process, so that the pads 121 are electrically connected to the subsequently implanted solder balls 821 and do not cause short circuit.

In yet another embodiment of the package structure, as shown in fig. 6 to 7, the second sealant 4 may be omitted, and only one second molding layer 6 is covered. Specifically, the second surface 12 of the substrate is further provided with other conventional device sets 2' insensitive to molding pressure, such as WLP wafer level package devices. At this time, the substrate second surface 12 only needs to be covered with the second molding layer 6, so as to protect the conventional device group 2'.

Optionally, when the second molding layer 6 covers the second surface 12 of the substrate, the solder balls 821 may also be exposed by a laser drilling process, so that the solder balls 821 can be electrically connected to other substrates 1 or structures.

Further, a dummy sheet 91 is further disposed on an edge of the first surface 11 of the substrate, and the dummy sheet 91 is sequentially encapsulated by the first sealing layer 5 and the first plastic package layer 7. The dummy piece 91 may be made of silicon, ceramic, glass, etc., or may be made of PCB or substrate material or different plastic package material, or may be made of metal, such as a metal frame made of copper material, etc.

Further, a passive element 93 is further disposed on the first surface 11 of the substrate, and the passive element 93 is sequentially encapsulated by the first sealing layer 5 and the first plastic sealing layer 7.

As shown in fig. 8 to 9, the package structure further includes a dummy wafer 91, where the dummy wafer 91 is a chip without circuit lines made of silicon material, and can be disposed at the edge of the first surface 11 of the substrate and also sequentially encapsulated or covered by the first sealing layer 5 and the first molding layer 7; when the first sealing layer 5 and the first plastic package layer 7 are cured, the dummy sheet 91 can effectively balance and relieve the shrinkage stress generated during material curing, and the stress is prevented from damaging the first cavity device group 3.

The dummy piece 91 may be made of silicon, ceramic, glass, etc., or may be made of PCB or substrate material or different plastic package material, or may be made of metal, such as a metal frame made of copper material, etc.

In addition, the first surface 11 of the substrate is further provided with a passive element 93 such as a large inductor, and the first sealing layer 5 and the first molding compound layer 7 sequentially encapsulate or cover the passive element 93, which also can protect the passive element 93 and balance and relieve curing stress.

Meanwhile, an isolation adhesive may be further disposed between the lower surface of the passive component 93 and the first surface 11 of the substrate to prevent the short circuit of the pins.

Optionally, dummy wafer 91 may be placed on non-edge regions of substrate 1, such as a larger spacing region between devices in the center of substrate 1, to balance stress relief from material curing.

Further, the second surface 12 of the substrate is further provided with an electrical and thermal conduction structure 8 and a second plastic package layer 6, and the second plastic package layer 6 encapsulates at least part of the electrical and thermal conduction structure 8.

As shown in fig. 10, the substrate second surface 12 may further be provided with an electrical and thermal conduction structure 8, and the second molding compound layer 6 encapsulates the electrical and thermal conduction structure 8 and at least partially exposes the electrical and thermal conduction structure 8, so as to further electrically connect the substrate second surface 12 with other substrates or structures. The electric and heat conduction structure 8 is a 3D electric and heat connection structure, and the 3D electric and heat conduction structure comprises a PCB adapter plate, a copper column, a solder ball and other connection structures.

In addition, the substrate second surface 12 may be further provided with a non-pressure-sensitive device 10, and the non-pressure-sensitive device 10 may be a non-pressure-sensitive cavity device, an IC chip, a passive component, or the like. Meanwhile, the first surface 11 of the substrate is provided with a device which is not easy to cause short circuit of the pins, such as a passive device of the pre-dotting isolation glue.

During process, the non-pressure-sensitive device 10 and the 3D electrical and thermal conduction structure may be bonded 8 to the second surface 12 of the substrate, the second molding compound layer 6 encapsulates the non-pressure-sensitive device 10, and the 3D electrical and thermal conduction structure 8 is at least partially exposed through processing forms such as laser opening, so as to facilitate further electrical connection.

For ease of understanding, examples are described in detail below:

example 1

As shown in fig. 1 to fig. 2, the package structure of the cavity device group in the present embodiment includes a substrate 1, a first cavity device group 3, a first sealing layer 5, and a first molding compound layer 7; the substrate 1 is a device embedded substrate, wherein a passive component and an IC chip are embedded, the embedded substrate 1 comprises a substrate first surface 11 and a substrate second surface 12, and a first cavity device group 3 sensitive to mold flow pressure during plastic packaging is arranged on the substrate first surface 11; the first sealing layer 5 and the first plastic packaging layer 7 sequentially encapsulate the first cavity device group 3, and the first sealing layer 5 covers the whole first surface 11 of the substrate; the flowability of the sealing material of the first sealing layer 5 is smaller than that of the plastic packaging material of the first plastic packaging layer 7. Therefore, in the plastic packaging process, the mold flow pressure generated by the first plastic packaging layer 7 is buffered and reduced by the first sealing layer 5 in time, so that the first cavity device group 3 can be protected and prevented from being damaged under the action of the mold flow pressure. The dummy piece 91 may be made of silicon, ceramic, glass, etc., or may be made of PCB or substrate material or different plastic package material, or may be made of metal, such as a metal frame made of copper material, etc.

Example 2

As shown in fig. 3 to 4, the package structure of the cavity device group in the present embodiment is different from that in embodiment 1, and the package structure further includes a second cavity device group 2, a second sealing layer 4, a second molding layer 6 and solder balls 821; the second cavity device group 2 sensitive to the pressure of the plastic package mold flow is arranged on the second surface 12 of the substrate, the second sealing layer 4 encapsulates the second cavity device group 2, and the second plastic package layer 6 covers the second surface 12 of the substrate and encapsulates the second sealing layer 4; the solder balls 821 in the second molding compound layer 6 are electrically connected to the pads 121 on the second surface 12 of the substrate, and the openings are exposed therebelow, so as to electrically connect the whole package structure with other substrates 1 or structures. With the arrangement, in the plastic package process, the mold flow pressure generated by the second plastic package layer 6 is buffered and reduced by the second sealing layer 4 in time, and the second sealing layer 4 plays a role in protecting the second cavity device group 2.

Example 3

As shown in fig. 8 to 9, the package structure of the cavity device set in this embodiment is different from that in embodiment 2, in that the package structure further includes a dummy sheet 91 and a passive element 93, the dummy sheet 91 is disposed at an edge of the first surface 11 of the substrate and is also sequentially encapsulated by the first sealing layer 5 and the first molding compound layer 7; the passive component 93 is a large inductance component, and is also sequentially encapsulated by the first sealing layer 5 and the first plastic encapsulation layer 7; therefore, the dummy wafer 91 can effectively balance and relieve the shrinkage stress generated when the sealing material and the plastic packaging material are cured, and the first cavity device group 3 is prevented from being damaged by the shrinkage stress.

Example 4

As shown in fig. 10, the package structure of the cavity device assembly in this embodiment is different from that in embodiment 1, and the package structure further includes a second plastic package layer 6 and an electrical and thermal conduction structure 8; the second molding compound layer 6 encapsulates the electrical and thermal communication structure 8, and at least partially exposes the electrical and thermal communication structure 8, so as to electrically connect the substrate second surface 12 with other substrates or structures. The electric and heat conduction structure 8 is a 3D electric and heat connection structure, and the 3D electric and heat conduction structure comprises a PCB adapter plate, a copper column, a solder ball and other connection structures.

In addition, the substrate second surface 12 may be further provided with a non-pressure-sensitive device 10, and the non-pressure-sensitive device 10 may be a non-pressure-sensitive cavity device, an IC chip, a passive component, or the like. Meanwhile, the first surface 11 of the substrate is provided with a device which is not easy to cause short circuit of the pins, such as a passive device of the pre-dotting isolation glue.

As shown in fig. 11, an embodiment of the present invention further provides a packaging method for a cavity device group, where the packaging method includes the following steps:

s01: providing a first set of cavity devices 3 on a first surface 11 of a substrate;

s03: providing a first sealing layer 5 at the periphery of the first cavity device group 3 such that the first sealing layer 5 encloses the first cavity device group 3;

s05: and plastically packaging the first surface 11 of the substrate to form a first plastic packaging layer 7, so that the first plastic packaging layer 7 encapsulates the first sealing layer 5, and the flowability of a sealing material of the first sealing layer 5 is smaller than that of a plastic packaging material of the first plastic packaging layer 7.

Specifically, in the package structure, the substrate 1 includes two opposite surfaces, i.e., a first substrate surface 11 and a second substrate surface 12.

Firstly, a first cavity device group 3 sensitive to the pressure of plastic package mold flow is arranged on a first surface 11 of a substrate, so that the two are electrically connected; after the completion of the arrangement, the first sealing layer 5 is arranged on the outer periphery of the first cavity device group 3 so that the first sealing layer 5 encloses the first cavity device group 3, the sealing material of the first sealing layer 5 has low fluidity and thus does not flow into and contact the pressure sensitive regions of the cavity devices, and the first sealing layer 5 can function to protect the first cavity device group 3.

Then, plastic packaging is performed on the first surface 11 of the substrate to form a first plastic packaging layer 7 to encapsulate the first sealing layer 5, and meanwhile, the flowability of a sealing material of the first sealing layer 5 is smaller than that of a plastic packaging material of the first plastic packaging layer 7, so that the mold flow pressure generated by the first plastic packaging layer 7 can be buffered by the first sealing layer 5 in time in the plastic packaging process, and the first cavity device group 3 can be further protected from being influenced by the mold flow pressure of the plastic packaging.

Optionally, the first cavity device group 3 includes one or more cavity devices. The packaging form of each cavity device is not limited, and may be a system-in-package, a WLP wafer-level package, a chip-level package, or the like, or may also be an LGA planar grid array package, a BGA ball grid array package, or the like.

Optionally, the processing technology of the first sealing layer 5 can adopt a vacuum or low-pressure film pasting technology, and the material can be an organic composite film with a filler; or organic epoxy composite high-viscosity paste is adopted for vacuum low-pressure dispensing and a spraying process can be selected to process the first sealing layer 5. The processing technology of the first plastic package layer 7 can adopt a conventional injection molding technology or a hot pressing technology, and the material is a plastic package material with better fluidity.

Alternatively, due to the difference in processing technology, the first sealing layer 5 may encapsulate only the first cavity device group 3 without covering the substrate first surface 11, or may encapsulate the first cavity device group 3 while covering the substrate first surface 11.

Optionally, a device or a passive element 93 with a small I/O and a large center distance, which is not easy to bridge a short circuit, such as a large inductor, may be further disposed on the first surface 11 or the second surface 12 of the substrate; when the passive component 93 such as a large inductor is disposed on the first surface 11 of the substrate, it may be sequentially encapsulated by the first sealing layer 5 and the first molding compound 7, or only encapsulated by the first molding compound 7.

Optionally, other thin devices and chips may be embedded into the substrate 1, that is, the substrate 1 may be embedded into the thin devices in a hollow manner, or the thin devices and the substrate 1 are integrally molded, so as to save the overall space of the package structure and improve the package integration level.

Further, step S03 specifically includes:

s031: a first sealing layer 5 is provided at the periphery of the first cavity device group 3 and the substrate first surface 11 such that the first sealing layer 5 covers the substrate first surface 11 and encapsulates the first cavity device group 3.

After the first cavity device group 3 is disposed on the first surface 11 of the substrate, the first sealing layer 5 may be disposed on the first surface 11 of the substrate by a film pasting process or the like, such that the first sealing layer 5 covers the first surface 11 of the substrate and simultaneously encapsulates the first cavity device group 3, and the first sealing layer 5 does not contact the cavity region of the cavity device, thereby rapidly forming the first sealing layer 5 to protect the first cavity device group 3.

The first sealing layer 5 may be a single-material structure or a structure composed of multiple layers of materials, in which the inner layer is an insulating material, the outer layer is a conductive material, for example, the inner layer is an insulating sealing material at the edge of the device, and the outer layer is a copper Cu or silver Ag conductive spray coating shielding material.

Further, before step S01, or after step S05, the method further comprises:

s006: a second set of cavity devices 2 and a second sealing layer 4 are disposed on the second surface 12 of the substrate such that the second sealing layer 4 encapsulates the second set of cavity devices 2.

Further, after step S006, the method further includes:

s007: covering a second plastic package layer 6 on the second surface 12 of the substrate, so that the second plastic package layer 6 encapsulates the second sealing layer 4, and the flowability of the sealing material of the second sealing layer 4 is smaller than that of the plastic package material of the second plastic package layer 6.

Specifically, the second cavity device group 2, the second sealing layer 4 and the second molding layer 6 may also be disposed on the second surface 12 of the substrate, and the processing of the second surface 12 of the substrate may be performed before the first surface 11 of the substrate, or may be performed after the first surface 11 of the substrate, and the processing sequence is not limited.

Similarly, the second cavity device group 2 sensitive to the pressure of the plastic package mold flow is arranged on the second surface 12 of the substrate, the second sealing layer 4 is arranged on the periphery of the second cavity device group 2, the flowability of the sealing material of the second sealing layer 4 is low, the sealing material can not flow into or contact with the pressure sensitive area of the cavity device, and the function of protecting the second cavity device group 2 is achieved.

Meanwhile, the second surface 12 of the substrate may be further provided with solder balls 821 for further electrical connection with other substrates 1 or structures.

The second sealing layer 4 is optional, i.e. can be selected according to the specific situation of the second surface 12 of the substrate; for example, when the second surface 12 of the substrate is provided with other conventional device sets insensitive to molding pressure, the second sealant 4 may not be present on the second surface 12 of the substrate, and only the second molding layer 6 is required to cover the second surface.

In addition, a second plastic packaging layer 6 can be further covered on the second surface 12 of the substrate, and the second plastic packaging layer 6 encapsulates the second sealing layer 4; meanwhile, when the materials are selected, the flowability of the sealing material of the first sealing layer 5 is ensured to be smaller than that of the plastic packaging material of the second plastic packaging layer 6; therefore, in the plastic packaging process, the mold flow pressure generated by the second plastic packaging layer 6 is buffered by the second sealing layer 4 in time, and the second sealing layer 4 further plays a role in protecting the second cavity device group 2.

Meanwhile, when the solder balls 821 are disposed on the second surface 12 of the substrate, at least a portion of the solder balls 821 is exposed by the second molding layer 6 for further electrical connection.

Optionally, the second sealing layer 4 may cover the entirety of the second surface 12 of the substrate in addition to encapsulating the second cavity device group 2; when the second sealant 4 covers the entire second surface 12 of the substrate, the pads 121 on the second surface 12 of the substrate need to be exposed by a laser opening process, so that the pads 121 are electrically connected to the subsequently implanted solder balls 821.

Optionally, when the second molding layer 6 covers the second surface 12 of the substrate, the solder balls 821 may also be exposed by a laser drilling process, so that the solder balls 821 can be electrically connected to other substrates 1 or structures.

Further, after step S01, the method further includes:

s021: and arranging a dummy sheet 91 at the edge of the first surface 11 of the substrate, so that the first sealing layer 5 and the first plastic packaging layer 7 sequentially encapsulate the dummy sheet 91.

Further, after step S01, the method further includes:

s022: a passive element 93 is disposed on the first surface 11 of the substrate, such that the passive element 93 is sequentially encapsulated by the first sealing layer 5 and the first molding compound layer 7.

Specifically, the first surface 11 of the substrate may further include a dummy wafer 91 and a passive component 93. After the first cavity device group 3 is disposed on the first surface 11 of the substrate, the dummy wafer 91 may be disposed on the edge of the first surface 11 of the substrate, and is also encapsulated by the first sealing layer 5 and the first molding layer 7 in sequence; similarly, a passive component 93 such as a large inductor is also disposed on the first surface 11 of the substrate and is sequentially encapsulated by the first encapsulant layer 5 and the first molding layer 7. Therefore, the dummy wafer 91 and the passive element 93 can effectively balance and relieve the shrinkage stress generated when the sealing material and the plastic packaging material are cured, and the first cavity device group 3 is prevented from being damaged by the shrinkage stress.

Meanwhile, an isolation adhesive may be further disposed between the lower surface of the passive component 93 and the first surface 11 of the substrate to prevent the short circuit of the pins.

Optionally, dummy wafer 91 may be placed on non-edge regions of substrate 1, such as a larger spacing region between devices in the center of substrate 1, to balance stress relief from material curing.

The dummy piece 91 may be made of silicon, ceramic, glass, etc., or may be made of PCB or substrate material or different plastic package material, or may be made of metal, such as a metal frame made of copper material, etc.

Further, after step S05, the method further includes:

s08: and thinning the first plastic packaging layer 7.

Further, after step S007, the method further includes:

s009: and thinning the second plastic packaging layer 6.

Specifically, the first plastic package layer 7 and the second plastic package layer 6 can be finally thinned to reduce the thickness of the plastic package layers, reduce deformation and warpage caused by material curing, and reduce the contraction pressure caused by further curing, so that the overall reliability of the packaging structure is improved.

The thinning process of the first plastic package layer 7 can be selected according to specific situations, that is, the thinning process may not be performed. The thinning process of the second molding compound 6 is also optional, and at the same time, the second molding compound 6 can also be opened by laser to expose at least part of the solder balls.

Optionally, the thinning process may be mechanical grinding thinning or laser thinning.

The packaging method of the cavity device group is generally described as follows:

in the package structure of the cavity device group, the package structure includes a substrate 1, and the substrate 1 includes a substrate first surface 11 and a substrate second surface 12.

Arranging a first cavity device group 3 sensitive to mold flow pressure during plastic packaging and a passive element 93 such as a large inductor on a first surface 11 of a substrate, and arranging a dummy wafer 91 on the edge of the first surface 11 of the substrate; covering the first sealing layer 5 on the first surface 11 of the substrate to encapsulate all devices on the first surface 11 of the substrate; then, a first plastic package layer 7 is arranged on the surface of the first sealing layer 5, so that the first sealing layer 5 and the first plastic package layer 7 sequentially encapsulate all devices on the first surface 11 of the substrate, and the flowability of a sealing material of the first sealing layer 5 is ensured to be smaller than that of a plastic package material of the first plastic package layer 7.

Next, a second cavity device set 2 is disposed on the second surface 12 of the substrate, and solder balls 821 are implanted into the second surface 12 of the substrate to be electrically connected to the pads 121 on the second surface 12 of the substrate; then, a second sealing layer 4 is provided on the outer periphery of the second cavity device group 2 so as to encapsulate the second cavity device group 2; finally, covering a second plastic packaging layer 6 on the second surface 12 of the substrate, wherein the second plastic packaging layer 6 encapsulates the second sealing layer 4; in addition, the solder ball 821 can be exposed by laser drilling process, so that the solder ball 821 can electrically connect the whole package structure with other substrate 1 or structure.

In summary, in the cavity device package structure provided by the present invention, the first cavity device group 3 sensitive to the molding die flow pressure is disposed on the first surface of the substrate 1, and the first sealing layer 5 and the first molding layer 7 are sequentially disposed on the periphery of the first cavity device group 3; the fluidity of the sealing material of the first sealing layer 5 is lower and is smaller than that of the plastic packaging material of the first plastic packaging layer 7; therefore, in the plastic packaging process, the mold flow pressure generated by the first plastic packaging layer 7 is buffered and reduced by the first sealing layer 5 in time, the first cavity device group 3 can be effectively protected, and the first cavity device group is prevented from being damaged under the action of the mold flow pressure in the plastic packaging process, so that the reliability and the packaging yield of the whole packaging structure are improved.

It should be understood that although the present description refers to embodiments, not every embodiment contains only a single technical solution, and such description is for clarity only, and those skilled in the art should make the description as a whole, and the technical solutions in the embodiments can also be combined appropriately to form other embodiments understood by those skilled in the art.

The above-listed detailed description is only a specific description of a possible embodiment of the present invention and is not intended to limit the scope of the present invention, and equivalent embodiments or modifications made without departing from the technical spirit of the present invention are included in the scope of the present invention.