阅读说明：本技术 部件承载件及其制造方法 (Component carrier and method for producing the same ) 是由 马库斯·莱特格布 伯恩哈德·赖特迈尔 于 2020-11-09 设计创作，主要内容包括：本申请提供了部件承载件(100)及其制造方法,该部件承载件(100)包括叠置件(102),该叠置件(102)包括至少一个电传导层结构(104)和/或至少一个电绝缘层结构(106)以及位于叠置件(102)的中央区域中的部分暴露层(108),该暴露层(108)就上侧(112)和下侧(114)而言是通过形成在叠置件(102)中的相应的盲孔(116、118)而暴露的,其中,暴露层(108)的相反的主表面中的每个主表面部分地由相应的粘合剂层(120、122)覆盖。(The present application provides a component carrier (100) and a method of manufacturing the same, the component carrier (100) comprising a stack (102), the stack (102) comprising at least one electrically conductive layer structure (104) and/or at least one electrically insulating layer structure (106) and a partially exposed layer (108) in a central region of the stack (102), the exposed layer (108) being exposed with respect to an upper side (112) and a lower side (114) by respective blind holes (116, 118) formed in the stack (102), wherein each of opposite main surfaces of the exposed layer (108) is partially covered by a respective adhesive layer (120, 122).)

1. A component carrier (100), comprising:

a stack (102), the stack (102) comprising at least one electrically conductive layer structure (104) and/or at least one electrically insulating layer structure (106); and

a partially exposed layer (108) located in a central region of the stack (102), the exposed layer (108) being exposed in terms of an upper side (112) and a lower side (114) by respective blind holes (116, 118) formed in the stack (102);

wherein each of the opposing major surfaces of the exposed layer (108) is partially covered by a respective adhesive layer (120, 122).

2. The component carrier (100) according to claim 1, wherein the component carrier (100) is configured as a sensor, in particular as one of a microphone, a pressure sensor, an acceleration sensor and a gas sensor, as well as a micro-electromechanical system, the actuator being in particular a loudspeaker.

3. The component carrier (100) according to claim 1, comprising at least one of the following features:

wherein the exposed layer (108) forms a functional membrane in the blind hole (116, 118);

wherein the exposed layer (108) comprises or consists of an elastic material, such as polyimide;

wherein the exposed layer (108) is a single layer of material;

wherein the exposed layer (108) comprises sub-structures of different materials;

wherein the thickness (d) of the exposure layer (108) is in a range between 1 μm and 30 μm, in particular the thickness (d) of the exposure layer (108) is in a range between 3 μm and 7 μm;

wherein the lateral offset (l) between the central portion of the outermost portion (124) of the first blind hole (116) and the central portion of the outermost portion (124) of the second blind hole (118) is less than 20 μm, in particular the lateral offset (l) between the central portion of the outermost portion (124) of the first blind hole (116) and the central portion of the outermost portion (124) of the second blind hole (118) is not more than 15 μm;

wherein a lateral offset (L) between a central portion of an innermost portion (126) of the first blind hole (116) and a central portion of an innermost portion (126) of the second blind hole (118) is greater than a lateral offset (L) between a central portion of an outermost portion (124) of the first blind hole (116) and a central portion of an outermost portion (124) of the second blind hole (118);

wherein an innermost portion (126) of the first blind hole (116) tapers from the exposed layer (108) towards a first major surface of the stack (102) in which the first blind hole (116) extends;

wherein an innermost portion (126) of the second blind hole (118) tapers from the exposed layer (108) towards a second major surface of the stack (102) in which the second blind hole (118) extends;

wherein an outermost portion (124) of the first blind via (116) tapers from a first major surface of the stack (102) from which the first blind via (116) extends toward the exposure layer (108);

wherein an outermost portion (124) of the second blind via (118) tapers from a second major surface of the stack (102) from which the second blind via (118) extends toward the exposure layer (108);

wherein at least one electrically conductive layer structure (104) within the stack (102) has a recess (130) at an inner side wall of the stack (102) defining the first blind hole (116) or the second blind hole (118).

4. The component carrier (100) according to claim 1, the component carrier (100) comprising a component (132), the component (132) being embedded in the exposure layer (108), the component (132) being surface mounted on the exposure layer (108), the component (132) being arranged next to the exposure layer (108) in one of the blind holes (116, 118) or the component (132) being arranged immediately behind the exposure layer (108).

5. The component carrier (100) according to claim 4, the component carrier (100) comprising at least one of the following features:

wherein at least a portion of a surface of the component (132) is exposed to the environment;

wherein the component (132) is a sensor component.

6. The component carrier (100) according to claim 1, the component carrier (100) comprising at least one of the following features:

wherein the stack (102) forms an annular body;

the component carrier (100) comprises an element (132, 146) to be protected, in particular a sensor element, wherein the exposure layer (108) is arranged for protecting the element (132, 146) to be protected;

wherein the exposed layer (108) comprises or consists of at least one of an electrically conductive material and an electrically insulating material, in particular the electrically insulating material is a high performance plastic material, wherein more in particular the high performance plastic material comprises at least one of: polyethylene terephthalate, polyoxymethylene, polyamide, polyimide, polytrimethylene terephthalate, polyetheretherketone, polyetherketoneetherketoneketone, polyetherketone, ethylene tetrafluoroethylene, perfluoroalkoxyalkane, fluorinated ethylene propylene, styrene polymer ester, polycarbonate, polyphenylene sulfide, polyethersulfone, polyphenylsulfone, and polysulfone;

wherein each of the opposite major surfaces of the exposure layer (108) is covered by a respective adhesive layer (120, 122) in a portion of the exposure layer (108) within the material of the stack (102), and wherein each of the opposite major surfaces of the exposure layer (108) is free of a respective adhesive layer (120, 122) in a portion associated with the blind hole (116, 118);

the component carrier (100) comprises at least one component (132), the at least one component (132) being surface-mounted on the stack (102) and/or the exposure layer (108) and/or the at least one component (132) being embedded in the stack (102) and/or the exposure layer (108), wherein in particular the at least one component (132) is selected from: electronic components, non-conductive and/or conductive inlays, heat transfer units, light guiding elements, energy harvesting units, active electronic components, passive electronic components, electronic chips, memory devices, filters, integrated circuits, signal processing components, power management components, optoelectronic interface elements, voltage converters, cryptographic components, transmitters and/or receivers, electromechanical transducers, actuators, microelectromechanical systems, microprocessors, capacitors, resistors, inductors, accumulators, switches, cameras, antennas, magnetic elements, further component carriers (100) and logic chips;

wherein the at least one electrically conductive layer structure (104) comprises at least one of copper, aluminum, nickel, silver, gold, palladium and tungsten, any of which is optionally coated with a superconducting material, such as graphene;

wherein the at least one electrically insulating layer structure (106) comprises at least one of: resins, in particular reinforced or non-reinforced resins, such as epoxy resins or bismaleimide-triazine resins, FR-4, FR-5, cyanate esters, polyphenylene derivatives, glass, prepregs, polyimides, polyamides, liquid crystal polymers, epoxy-based laminates, polytetrafluoroethylene, ceramics and metal oxides;

wherein the component carrier (100) is shaped as a plate;

wherein the component carrier (100) is configured as one of a printed circuit board and a substrate;

wherein the component carrier (100) is configured as a laminated component carrier (100).

7. A method of manufacturing a component carrier (100), wherein the method comprises:

forming a stack (102) comprising at least one electrically conductive layer structure (104) and/or at least one electrically insulating layer structure (106);

forming a first blind hole (116) in the stack (102), the first blind hole (116) extending from a first major surface of the stack (102) up to an exposed layer (108) in a central region of the stack (102);

forming a second blind hole (118) in the stack (102), the second blind hole (118) extending from a second major surface of the stack (102) opposite the first major surface up to the exposure layer (108); and

attaching the exposed layer (108) within the stack (102) between two adhesive layers (120, 122), each of the two adhesive layers (120, 122) being disposed on a portion of a respective one of the opposing major surfaces of the exposed layer (108).

8. The method of claim 7, wherein the method comprises arranging the layer (108) to be exposed between two portions of the stack (102), each portion comprising a respective cavity (160), each cavity (160) exposing a portion of a respective major surface of the layer (108) to be exposed.

9. The method of claim 8, wherein the method comprises:

-attaching one or more further layer structures (104, 106) to the outer main surface of the portion of the stack (102), in particular laminating the further layer structures (104, 106) to the outer main surface of the portion of the stack (102); and

forming a respective recess (164) in the further layer structure (104, 106) on each of the outer main surfaces, thereby obtaining an intermediate structure in which exposed portions of the layer (108) are protected at two opposite main surfaces of the layer (108) by a retaining protection layer (165) of the stack (102).

10. The method of claim 9, wherein the respective one of the protective layers (165) is spaced apart from the layer (108) to be exposed by the respective one of the cavities (160).

11. The method of claim 9, wherein the method comprises patterning and plating an exterior portion of the intermediate structure.

12. The method of claim 9, wherein the method comprises subsequently removing exposed portions of the protective layer (165) such that the blind holes (116, 118) are formed by connecting the respective cavities (160) with the respective recesses (164).

13. The method of claim 12, wherein the method comprises: before the exposed portions of the protective layer (165) are removed, outer portions of the further layer structure (104, 106) are patterned and plated.

14. The method of claim 7, wherein the method comprises forming at least a portion of the blind via (116, 118) by laser processing.

15. The method of claim 8, wherein the method comprises forming the cavity (160) and/or the recess (164) by laser processing.

Technical Field

The invention relates to a method for producing a component carrier and a component carrier.

Background

With the ever increasing product functionality of component carriers equipped with one or more electronic components and the progressive miniaturization of these components and the increasing number of components to be connected to component carriers such as printed circuit boards, increasingly powerful array-like components or packages with a plurality of components are employed, which have a plurality of contact portions or connection portions, wherein the spacing between these contact portions is increasingly small. In particular, the component carrier should be mechanically stable and electrically reliable in order to be able to operate even under severe conditions.

Disclosure of Invention

There may be a need to provide an efficiently manufacturable component carrier with extended functionality.

According to an exemplary embodiment of the invention, a component carrier is provided, comprising a (in particular laminated) stack comprising at least one electrically conductive layer structure and/or at least one electrically insulating layer structure and a partially exposed layer in a central region of the stack, the exposed layer being exposed with respect to an upper side and a lower side by means of a blind hole formed in the stack, wherein each of the opposite main surfaces of the exposed layer is partially covered by a respective adhesive layer.

According to another exemplary embodiment of the invention, a method of manufacturing a component carrier is provided, wherein the method comprises: forming a stack comprising at least one electrically conductive layer structure and/or at least one electrically insulating layer structure; forming a first blind hole in the stack, the first blind hole extending from the first major surface of the stack up to an exposed layer in a central region of the stack; forming a second blind hole in the stack, the second blind hole extending from a second major surface of the stack opposite the first major surface up to the exposed layer; and joining (particularly directly joining) the exposed layer within the stack between two adhesive layers each disposed on a portion of a respective one of the opposite major surfaces of the exposed layer.

In the context of the present application, the term "component carrier" may particularly denote any support structure capable of accommodating one or more components thereon and/or therein for providing mechanical support and/or electrical connection. In other words, the component carrier may be configured as a mechanical and/or electronic carrier for the component. In particular, the component carrier may be one of a printed circuit board, an organic interposer, and an IC (integrated circuit) substrate. The component carrier may also be a hybrid board combining different ones of the above-mentioned types of component carriers.

In the context of the present application, the term "stack" may denote a flat body of substantially parallel aligned layer structures of component carrier material (e.g. copper, resin and glass), wherein the layer structures are integrally connected to each other, e.g. by lamination.

In the context of the present application, the term "layer structure" may particularly denote a continuous layer, a patterned layer or a plurality of non-continuous islands in the same plane.

In the context of the present application, the term "blind hole" may particularly denote a hole in the stack, which is defined by the exposed layer at the bottom side or top side and laterally by the side walls of the stack.

In the context of the present application, the term "exposed layer" may particularly denote a thin film which is partly uncovered and partly covered by the material of the component carrier. In particular, the exposure layer may be uncovered in surface areas of the opposite two main surfaces at a horizontal central portion of the exposure layer. At the same time, however, the partially exposed layer may be partially covered on the opposite major surfaces by respective adhesive layers, for example connecting the exposed layer with lateral zones, in particular circumferential zones, of the stack.

In the context of the present application, the term "adhesive layer" may particularly denote a sheet or film made of a material capable of adhering the exposed layer to the material of the stack on both opposite main surfaces of the exposed layer. Such bonding may be achieved by curing a liquid adhesive, by curing a solid adhesive layer (e.g. by lamination of prepregs), or in any other way.

In the context of the present application, the term "central region of the stack" may particularly denote a region of the stack which is in the interior of the layer structure of the stack and is spaced apart with respect to the two opposite main surfaces of the stack. For example, the central region may be located in the middle in the vertical direction of the stack. However, the central region may also be arranged asymmetrically with respect to the opposite two main surfaces of the stack, i.e. closer to one of the main surfaces than to the other of the main surfaces.

According to an exemplary embodiment of the invention, a component carrier is provided in which the exposure layer is environmentally exposed from the opposite main surfaces of the component carrier and preferably in a central region of the stack. The stack may support and protect the exposed layer, preferably in the circumferential direction, via an adhesive layer that securely connects the exposed layer on the top and bottom. By taking such measures, it is possible to provide the component carrier with an exposed layer which is in direct communication or interacts with the environment, so that it can be used as e.g. a sensor and/or an actuator. By arranging the exposed layer in a central region of the stack, i.e. vertically spaced with respect to the opposite two main surfaces of the stack, it is also possible to reliably protect the mechanically sensitive exposed layer from mechanical damage by external impacts. It is highly advantageous that an exposure layer (which may be partially exposed or exposed over the entire surface of the exposure layer) may be sandwiched between two patterned adhesive layers to ensure that the exposure layer is simultaneously exposed in the region of the blind holes of the stack and that the sensitive exposure layer is brought into proper mechanical connection with the stack.

Detailed description of exemplary embodiments

In the following, further exemplary embodiments of the component carrier and of the method will be explained.

In an embodiment, the component carrier is configured as a sensor (in particular as one of a microphone, a pressure sensor, a humidity sensor, an acceleration sensor and a gas sensor), an actuator (in particular as a loudspeaker) or as a micro-electromechanical system (MEMS). In the case of such an application, the exposed layer may be functionally an active component.

In an embodiment, the exposed layer forms a functional membrane (which may alternatively be denoted as a membrane or a functional layer of a separation structure, in particular an ultrasensitive separation structure). When the exposed layer is implemented as a functional membrane, the exposed layer may be configured and capable of free oscillation or movement within the volume defined by the opposing blind holes at the exposed portion of the exposed layer. Such a free-running functional diaphragm may be advantageous for functions such as sensor applications (e.g. when the component carrier is used as a microphone) and for actuation functions (e.g. when the component carrier is used as a loudspeaker).

For example, the functional layer or membrane may be an electrically insulating and/or electrically conducting layer or membrane. The functional layer or membrane may be a polymer-based (e.g. organic) structure, a copper-based structure, a graphene-coated (in particular superconducting) layer, or the like. Other materials for the functional layer or the membrane are also possible. For example, the functional layer or membrane may be made of a uni-directionally permeable material. The functional layer or membrane may also be made of a high power support thermoplastic or elastomeric material. In yet another embodiment, the functional layer or membrane may be made of a non-elastic material. In an embodiment, the exposure layer comprises or consists of an elastic material, in particular polyimide. When the functional diaphragm is made of an elastic material such as polyimide, the oscillation characteristic of the functional diaphragm can be achieved. To enhance the specific function of the elastically exposed layer, one or more additional layers, for example made of piezoelectric material, may also be formed on the surface of the exposed layer. With piezoelectric materials, mechanical oscillation of the elastically exposed layer can be electrically detected or the elastically exposed layer forced to move in accordance with an applied electrical signal.

In an embodiment, the exposed layer is a single layer of material. In such embodiments, the exposed layer is made of a homogeneous material. This ensures uniform properties of the exposed layer as a whole.

In another embodiment, the exposed layer includes a plurality of sub-structures of different materials. In such embodiments, the exposed layer may have a heterogeneous material composition (e.g., made of different layers, each having another material), which allows for fine tuning or adjustment of the desired characteristics of the exposed layer. For example, the exposed layer may be composed of a plurality of sub-layers: the multiple sub-layers may be stacked or sandwiched together to form an exposed layer. One example is the above-mentioned covering of an elastomeric sublayer (e.g. made of polyimide) with a piezoelectric sublayer for fine-tuning of e.g. sensor or actuator functions of the component carrier.

In an embodiment, the thickness of the exposure layer is in a range between 1 μm and 30 μm, in particular in a range between 3 μm and 7 μm. When the thickness of the exposed layer is selected from the above ranges, it may be ensured on the one hand that the exposed layer may move freely (e.g. triggered by an external influence such as external pressure or by an internal electrical stimulation signal, which may be applied, for example, via the piezoelectric material of the exposed layer). On the other hand, the exposed layer should not become too thin to prevent the component carrier and its highly sensitive exposed layer from becoming susceptible to mechanical damage from the environment during use.

In an embodiment, the lateral offset between the central portion of the outermost portion of the first blind hole and the central portion of the outermost portion of the second blind hole is less than 20 μm, in particular not more than 15 μm. In the context of the present application, the term "lateral offset" may particularly denote a spatial offset along a horizontal plane between said opposite outermost portions of the blind hole, i.e. between the portions of the blind hole immediately adjacent to the main surface of the stack. According to a highly advantageous manufacturing process, which will be described in further detail below, it may be the result that the lateral or horizontal offset between the opposite two outermost portions of the blind hole defining the exposure site of the exposed layer may be very small. Such a lateral offset may be a result of the fact that a certain error is involved in readjusting the laser source to the preform of the component carrier, resulting in a lateral offset, when the blind holes are formed, for example, by laser cutting.

In an embodiment, the lateral offset between the central portion of the innermost portion of the first blind hole and the central portion of the innermost portion of the second blind hole (i.e. the portion of the blind hole immediately adjacent to the exposed layer) is greater than the lateral offset between the central portion of the outermost portion of said first blind hole and the central portion of the outermost portion of the second blind hole (i.e. the portion of the blind hole immediately adjacent to the main surface of the stack). Referring again to the highly advantageous manufacturing method described in more detail below, the lateral offset of one or both of the blind holes may be larger at the inner side of the respective blind hole that exposes the exposed layer than at the outermost portion. However, a small lateral offset at the outermost portion simplifies the mechanical matching between the component carrier and other components that may be mounted on the component carrier at the outer surface of the component carrier.

In an embodiment, an innermost portion of the first blind hole tapers from the exposed layer towards the first major surface of the stack from which the first blind hole extends. Accordingly, an innermost portion of the second blind hole may taper from the exposed layer towards the second major surface of the stack from which the second blind hole extends. This tapering in a conical or truncated manner may be characteristic of the innermost portion of the respective blind hole being formed by laser treatment. This tapering may occur due to the energetic impact of the laser beam on the stack material in the innermost portion of the blind hole during laser processing. Due to the advantageous manufacturing method, which will be described in further detail below, the tapering of the innermost portion occurs from the inside to the outside of the respective blind hole, i.e. narrowing towards the outer main surface of the respective blind hole and the stack.

In an embodiment, an outermost portion of the first blind via tapers from the first major surface of the stack from which the first blind via extends toward the exposed layer. Accordingly, an outermost portion of the second blind hole may taper from the second major surface of the stack from which the second blind hole extends toward the exposed layer. This geometry may be characteristic of the fact that the blind holes may be formed by two stages of laser processing.

The outermost portion may taper in an opposite direction as compared to the innermost portion of the first blind hole and the innermost portion of the second blind hole. Illustratively, this may result in the formation of a generally X-shaped blind hole.

In an embodiment, at least one electrically conductive layer structure located within the stack and defined by the first or second blind hole has a recess at an inner side wall of the stack. Such recesses of the electrically conductive layer structure, in particular the copper foil, may also be a feature of an advantageous manufacturing method, as described below.

In an embodiment, the component carrier comprises a component embedded in or surface mounted on an exposure layer. Such components may form exposed sites of the exposed layer. Highly advantageously, components (e.g. semiconductor chips, MEMS or any other kind of sensor or actuator components) may be embedded in the exposed layer in order to be particularly sensitive to any phenomena or parameters to be detected in the environment. For example, the pressure sensor may be formed by component carrier technology (in particular PCB technology), wherein the pressure sensing component is arranged in an exposed site of the exposed layer. In one embodiment, the component may form the entire exposed portion of the exposed layer, i.e. without any other components. In another embodiment, the component may be embedded in the exposure layer, for example so as to extend up to the exposed surface of the exposure layer. In such embodiments, the embedded component is directly exposed to the environment, which may be advantageous for sensing and/or actuation applications. In yet another embodiment, the embedded component may be embedded in the interior of the exposed layer so as to be completely circumferentially covered by the material of the exposed layer in the circumferential direction. It is also possible to arrange the component in one of the blind holes next to or adjacent to the exposure layer or immediately behind the exposure layer (for example for protection purposes).

In an embodiment, at least a portion of a surface of the component is exposed to the environment. This may be particularly advantageous when the component is a sensor component, e.g. for sensing a parameter from the environment, such as in the case of a microphone, a gas sensor or a chemical sensor.

In an embodiment, the stack forms an annular body. Thus, the space consumption of such a component carrier is very small. The exposed sites of the exposed layer may be arranged in a central through hole of the annular body and thus in a protected but externally still accessible manner.

In an embodiment, the component carrier comprises an element to be protected (in particular a sensor element), wherein the exposure layer is arranged for protecting the element to be protected. In such embodiments, the function of the exposed layer may be to protect the sensitive elements against undesired effects such as mechanical loading or chemical environment. Thus, the exposed layer may also serve as protection for certain components (e.g., for the sensor).

In an embodiment, the exposed layer comprises or consists of at least one of an electrically conductive material and an electrically insulating material, in particular a high performance plastic material. For example, the high performance plastic material includes at least one of: polyethylene terephthalate, polyoxymethylene, polyamide, polyimide, polytrimethylene terephthalate, polyetheretherketone, polyetherketoneetherketoneketone, polyetherketone, ethylene tetrafluoroethylene, perfluoroalkoxyalkane, fluorinated ethylene propylene, styrene polymer ester, polycarbonate, polyphenylene sulfide, polyethersulfone, polyphenylsulfone, and polysulfone.

In an embodiment, each of the opposite major surfaces of the exposed layer is covered by a respective adhesive layer in the portion of the exposed layer that is within the material of the stack, i.e. not exposed. Further, each of the opposing major surfaces of the exposed layer may be free of a respective adhesive layer in the portion associated with the blind via. Therefore, the exposed layer can be reliably mounted within the stack with high mechanical strength while leaving the central portion in the blind hole region exposed. This may advantageously ensure that the exposure layer may fulfill the function of the exposure layer.

In an embodiment, the method comprises arranging the layer to be exposed (i.e. the above-mentioned exposed layer which has not been exposed in an earlier stage of the manufacturing process) between two parts of a stack (or two part stacks), each part comprising a respective cavity, and each cavity exposing a portion of a respective major surface of the layer. In other words, each partial stack or a part of a stack may be formed as two or more stacked layer structures having respective cavities with closed bottoms. The partial stack or a portion of the stack may then be connected with the layer to be exposed, such that the open side of the cavity is oriented towards the layer to be exposed. This may simplify the manufacturing process, since two separate easy-to-machine part stacks may first be formed and connected to the layer between them before further processing of the obtained structure. The connection of the layer to be exposed to the open side of the respective cavity may ensure that the layer to be exposed is mechanically protected by the closed side of the cavity during the subsequent manufacturing process.

Thus, the method may include sandwiching the layer to be exposed between two partial stacks having cavities that expose a portion of the layer. Thereafter, the method may comprise connecting (in particular laminating) one or more further layer structures to the opposite main surfaces of the partial stack, such that the at least one further layer structure located on each of the opposite main surfaces is provided with recesses from the other side (in particular by laser treatment), thus obtaining an intermediate structure in which exposed locations of the layer are arranged, such that the intermediate layer is protected from both sides by the retaining protective layer. By this very advantageous manufacturing method, it is possible to reliably protect the exposed layer inside the preform of the component carrier during further stacking of the stack by lamination or the like. For example, when the stack is inserted into a press to connect other layer structures of the stack at the upper and lower main surfaces, the exposed layers can be safely protected from damage due to the upper and lower protective layers. The respective protective layer on each of the two opposite sides of the stack prevents any influence from the environment on the sensitive layer to be exposed.

In an embodiment, the method includes using the intermediate structure for at least one of patterning and plating. In particular, the method may comprise: before removing the exposed portions of the protective layer, outer portions of the further layer structure are patterned and plated. In the protected configuration of the preform of the component carrier, any etching, laser treatment and material deposition procedures can be carried out without undesired effects on the sensitive exposed layers which are still protected by the protective layer.

In an embodiment, the method comprises subsequently removing the protective layer in the blind hole, such that the blind hole is formed by connecting the respective cavity with the respective recess as a result of removing the protective layer. Finally, this exposes the exposed layer at the final stage of the manufacturing process, thereby leaving the sensitive exposed layer protected for a long period of time during the manufacturing process.

In an embodiment, the method comprises forming the recess and/or cavity, and in particular the entire blind hole, by laser treatment. By forming recesses and/or cavities in the stack by laser processing, a high precision laser cutting procedure can be performed, thereby translating into a precisely defined exposed layer. Therefore, high accuracy and high precision can be obtained. Therefore, laser processing is a preferred option for the formation of the recesses and cavities, since laser processing ensures a high precision and fast manufacturing process.

In an embodiment, the component carrier comprises at least one component surface-mounted on and/or embedded in the component carrier. The at least one component may be selected from a non-conductive inlay, a conductive inlay (e.g. a metal inlay, preferably comprising copper or aluminum), a heat transfer unit (e.g. a heat pipe), a light guiding element (e.g. a light guide or a light conductor connection), an optical element (e.g. a lens), an electronic component or a combination thereof. For example, the component may be an active electronic component, a passive electronic component, an electronic chip, a storage device (e.g., DRAM or other data storage), a filter, an integrated circuit, a signal processing component, a power management component, an optoelectronic interface element, a voltage converter (e.g., DC/DC converter or AC/DC converter), a cryptographic component, a transmitter and/or receiver, an electromechanical converter, a sensor, an actuator, a micro-electro-mechanical system (MEMS), a microprocessor, a capacitor, a resistor, an inductance, a battery, a switch, a camera, an antenna, a logic chip, and an energy harvesting unit. However, other components may also be embedded in the component carrier. For example, a magnetic element may be used as the component. Such a magnetic element may be a permanent magnetic element (such as a ferromagnetic element, an antiferromagnetic element, a multiferroic element or a ferrimagnetic element, e.g. a ferrite core) or may be a paramagnetic element. However, the component may also be a further component carrier (e.g. printed circuit board, substrate, interposer) in a board-in-board configuration. The component may be surface mounted on the component carrier and/or may be embedded inside the component carrier. In addition, other components may be used as components, particularly those that generate and emit electromagnetic radiation and/or are sensitive to electromagnetic radiation propagating from the environment.

For example, the component carrier may be a laminate of the mentioned electrically insulating layer structure and electrically conductive layer structure, which is formed in particular by applying mechanical pressure and/or thermal energy. The mentioned stack may provide a plate-like component carrier which is capable of providing a large mounting surface for further components and which is still very thin and compact.

In an embodiment, the component carrier is shaped as a plate. This contributes to a compact design, wherein the component carrier nevertheless provides a large base for the mounting components on the component carrier. Further, in particular, a bare chip as an example of an embedded electronic component can be easily embedded in a thin plate such as a printed circuit board due to its small thickness.

In an embodiment, the component carrier is configured as one of a printed circuit board and a substrate (in particular an IC substrate).

In the context of the present application, the term "printed circuit board" (PCB) may particularly denote a component carrier (which may be plate-like (i.e. flat), three-dimensionally curved (e.g. when manufactured using 3D printing), or which may have any other shape) formed by laminating a plurality of electrically conductive layer structures with a plurality of electrically insulating layer structures, e.g. by applying pressure, if required accompanied by supplying thermal energy. As a preferred material for PCB technology, the electrically conductive layer structure is made of copper, while the electrically insulating layer structure may comprise resin and/or glass fibres, so-called prepreg or FR4 material. The electrically conductive layer structures can be connected to each other in a desired manner by forming through-holes through the laminate, for example by laser drilling or mechanical drilling, and by filling the through-holes with an electrically conductive material, in particular copper, so as to form vias as through-hole connections. In addition to one or more components that may be embedded in a printed circuit board, printed circuit boards are typically configured to receive one or more components on one surface or both opposing surfaces of a plate-like printed circuit board. The one or more components may be attached to the respective major surfaces by welding. The dielectric portion of the PCB may include a resin with reinforcing fibers, such as glass fibers.

In the context of the present application, the term "substrate" may particularly denote a small component carrier. The substrate may be a relatively small component carrier with respect to the PCB, on which one or more components may be mounted, and which may serve as a connection medium between one or more chips and another PCB. For example, the substrate may have substantially the same size as the component (in particular the electronic component) to be mounted on the substrate (for example in the case of a Chip Scale Package (CSP)). More specifically, a substrate may be understood as a carrier for electrical connections or electrical networks and a component carrier comparable to a Printed Circuit Board (PCB) but with a relatively high density of laterally and/or vertically arranged connections. The transverse connections are, for example, conduction channels, while the vertical connections may be, for example, bores. These lateral and/or vertical connections are arranged within the base plate and may be used to provide an electrical and/or mechanical connection of a housed or unreceived component (such as a bare wafer), in particular an IC chip, to a printed circuit board or an intermediate printed circuit board. Thus, the term "substrate" also includes "IC substrates". The dielectric portion of the substrate may comprise a resin with reinforcing spheres, such as glass spheres.

The substrate or the interposer may comprise or consist of: at least one layer of glass, silicon, ceramic and/or organic material (e.g., resin). The substrate or interposer may also comprise a photoimageable or dry-etchable organic material such as an epoxy-based laminate film or a polymeric compound such as polyimide, polybenzoxazole or benzocyclobutene.

In an embodiment, the at least one electrically insulating layer structure comprises at least one of: resins (such as reinforced or non-reinforced resins, for example epoxy or bismaleimide-triazine resins), cyanate esters, polyphenylene derivatives, glass (especially glass fibers, multiple layers of glass, glassy materials), pre-preg materials (such as FR-4 or FR-5), polyimides, polyamides, Liquid Crystal Polymers (LCP), epoxy-based laminates, polytetrafluoroethylene (teflon), ceramics and metal oxides. Reinforcing structures, such as meshes, fibers or spheres, for example made of glass (multiple layers of glass) may also be used. While prepreg, FR4, or epoxy based laminate film or photoimageable dielectric material are generally preferred, other materials may be used. For high frequency applications, high frequency materials such as polytetrafluoroethylene, liquid crystal polymers and/or cyanate resins can be implemented as an electrically insulating layer structure in the component carrier.

In an embodiment, the at least one electronically conductive layer structure comprises at least one of: copper, aluminum, nickel, silver, gold, palladium, and tungsten. Although copper is generally preferred, other materials or other types of coatings thereof are possible, in particular coated with superconducting materials such as graphene.

In an embodiment, the component carrier is a laminated component carrier. In this embodiment, the component carrier is a composite of a multilayer structure which is stacked and joined together by applying a pressing force, if necessary with heat.

After the treatment of the inner layer structure of the component carrier, one main surface or both opposite main surfaces of the treated layer structure may be covered (in particular by lamination) symmetrically or asymmetrically with one or more further electrically insulating layer structures and/or electrically conductive layer structures. In other words, the stacking may continue until the desired number of layers is achieved.

After the formation of the stack of electrically insulating layer structures and electrically conductive layer structures is completed, a surface treatment of the obtained layer structure or component carrier may be performed.

In particular, in terms of surface treatment, an electrically insulating solder resist may be applied to one main surface or both opposite main surfaces of the layer stack or the component carrier. For example, the solder resist may be formed over the entire major surface and subsequently patterned to expose one or more electrically conductive surface portions that will be used to electrically couple the component carrier to the electronic periphery. The surface portion of the component carrier, in particular the surface portion comprising copper, which remains covered with the solder resist, can be effectively protected against oxidation or corrosion.

In the case of surface treatment, it is also possible to apply surface finishes selectively to the exposed electrically conductive surface portions of the component carrier. Such a surface finish may be an electrically conductive covering material on an exposed electrically conductive layer structure (such as pads, electrically conductive tracks, etc., in particular comprising or consisting of copper) on the surface of the component carrier. Without protecting such exposed electrically conductive layer structures, the exposed electrically conductive component carrier material (particularly copper) may oxidize, thereby rendering the component carrier less reliable. The surface finish may then be formed, for example, as a joint between the surface-mounted component and the component carrier. The surface finish has the function of protecting the exposed electrically conductive layer structure (in particular the copper circuitry) and of carrying out the bonding process with one or more components, for example by soldering. Examples of suitable materials for the surface finish are Organic Solderability Preservative (OSP), chemical nickel immersion gold (ENIG), gold (especially hard gold), chemical tin, nickel gold, nickel palladium, and the like.

The aspects defined above and further aspects of the invention are apparent from the examples of embodiment to be described hereinafter and are explained with reference to these examples of embodiment.

Drawings

Fig. 1 to 8 show cross-sectional views of structures obtained during manufacturing of the component carrier shown in fig. 8 according to an exemplary embodiment of the present invention.

Fig. 9 shows a cross-sectional view of a component carrier according to another exemplary embodiment of the present invention.

Fig. 10 shows a cross-sectional view of a component carrier according to a further exemplary embodiment of the present invention.

Fig. 11 shows a flow chart of a method of manufacturing a component carrier according to an exemplary embodiment of the invention.

Fig. 12 shows a cross-sectional view of a component carrier according to a further exemplary embodiment of the present invention.

Detailed Description

The illustration in the drawings is schematically. In different drawings, similar or identical elements are provided with the same reference signs.

Before describing exemplary embodiments in further detail with reference to the accompanying drawings, some basic considerations upon which exemplary embodiments of the present invention are developed will be outlined.

According to exemplary embodiments of the present invention, PCB inner layers can be accurately exposed by forming blind holes from both sides, with very small back-and-forth offsets of the blind holes and sub-portions of the blind holes on opposite major surfaces of the exposed layer. In particular, such high accuracy may be obtained by forming at least a portion of the blind via using laser processing. Furthermore, the exposed layer to be partially exposed may be covered on the opposite major surfaces with a very thin layer of adhesive, which preferably does not overlap into the exposed areas. Therefore, the thickness of the exposed portion of the exposed layer can be further reduced. For example, the thickness of the adhesive layer may be in a range between 1 μm and 30 μm, in particular in a range between 3 μm and 7 μm, for example 5 μm. It is possible that the exposed area is first exposed and then cleaned.

As a result of the manufacturing process described in detail below with reference to the drawings, the outer portion of the blind hole may taper slightly towards the interior of the blind hole. In contrast to this, the innermost portion of the blind hole may taper towards the outside of the blind hole and thus towards the opposite main surface of the stack, in particular the innermost portion of the blind hole tapers in a stronger manner towards the outside of the blind hole and thus towards the opposite main surface of the stack than the outermost portion. Advantageously, the up-down offset, in particular between the outermost portions of the blind holes, may be small, since such an offset is only caused by tolerances resulting from optical imaging and/or sensing. Furthermore, the lateral offset of the innermost portion of the blind hole may be greater than the outermost portion.

According to an exemplary embodiment of the present invention, ultra-precise exposure of the inner layers of the stack may be achieved. The internal exposed layers of a component carrier, such as a printed circuit board, should be as thin and precise as possible. Until finally, the inner exposed layer can be protected from external influences (such as those occurring in the context of PCB manufacturing processes). In addition, the ultra-thin structure of the inner layer can be realized by embedding the layer partially or completely on the surface. The use of copper foil (on the carrier) instead of a core may make it possible to form the inner exposed layers of the ultra-thin stack.

Opening of the exposed layer may be achieved by applying an adhesive layer on top and bottom of the exposed layer by performing an ablation process (e.g. laser or dry etching, e.g. compared to fig. 2), followed by performing a laser process.

An advantage of exemplary embodiments of the present invention is the option of having a very thin multilayer structure when using copper foil. Furthermore, the pre-lamination process can be avoided and thus the alignment can be improved in other settings. The layer to be exposed may be further protected until the end of the manufacturing process. As a result, the exposed layer is kept free from the manufacturing process for the majority of the manufacturing process.

The core used in the manufacturing process may be provided with openings or cavities by laser drilling. The core thus treated may be applied to the inner layer. By attaching such a core on each side of the inner layer, the cavity may be formed to be protected by the copper layer of the core during different processes of multilayer stacking.

With respect to tolerances, the maximum possible range may be a diameter of ± 150 μm. The smallest possible range may be a diameter of 15 μm.

The effect of the reduction of the flow rate (flow) of the carbonized layer produced as a result of the laser treatment may be advantageous. The thickness of such a carbonized layer may be not more than 5 μm, in particular less than 1 μm.

Fig. 1 to 8 show cross-sectional views of structures obtained during manufacturing of the component carrier 100 shown in fig. 8 according to an exemplary embodiment of the invention.

Fig. 1 shows a cross-sectional view of a portion of a stack 102, the portion of the stack 102 comprising a central electrically insulating layer structure 106, the central electrically insulating layer structure 106 being covered on one major surface with an electrically conductive layer structure 104 and on the opposite major surface with an adhesive layer 120. For example, the electrically-conductive layer structure 104 may include a continuous or patterned copper foil and/or vertical through-connections, such as copper-filled laser vias. In the illustrated embodiment, the electrically conductive layer structure 104 is a continuous copper foil. The electrically insulating layer structure 106 may comprise a resin, such as an epoxy resin, optionally including reinforcing particles (e.g., glass fibers or glass spheres) in the resin. For example, the electrically insulating layer structure 106 may be made of FR 4. In the illustrated embodiment, the electrically insulating layer structure 106 may be fully cured. The layer structures 104, 106 may be joined by lamination, i.e. application of pressure and/or heat.

The adhesive material of the adhesive layer 120 may be solid (e.g., an at least partially uncured resin such as prepreg) or may be liquid. The thin adhesive layer 120 may, for example, have a thickness of 5 μm. For example, the adhesive layer 120 may be applied to the electrically insulating layer structure 106 by dispensing or printing. Alternatively, the adhesive layer 120 may be laminated to the electrically insulating layer structure 106 in such a way that the lamination does not cause complete curing of the adhesive layer 120.

Fig. 1 shows a layer stack 102, which layer stack 102 serves twice as a component (constituent) forming the component carrier 100. In other words, two of the components shown in fig. 1 may be manufactured as a basis for forming a component carrier 100 according to an exemplary embodiment of the present invention.

To obtain the layer structure shown in fig. 2, the assembly shown in fig. 1 may be subjected to a material removal process to form a cavity 160, the cavity 160 extending through the electrically insulating layer structure 106 and through the adhesive layer 120, but the cavity 160 not extending through the electrically conductive layer structure 104. The formation of the cavity 160 may be accomplished, for example, by laser processing, by mechanical cutting, by etching, or any other form of ablation. When laser processing or another ablation process is used to form the cavity 160, the outer width w of the cavity 160 may be defined with particularly high precision. Although not shown in fig. 2, the laser-formed cavities 160 may taper toward the electrically-conductive layer structure 104.

To obtain the structure shown in fig. 3, two of the processed components shown in fig. 2 may be connected to each other by a continuous layer 108 interposed between the two components (which layer may also be discretely placed by less overlap into adjacent rigid portions), which continuous layer 108 will then form the exposed layer 108. The two components according to fig. 2 are connected with the layer 108 such that: the layer 108 is sandwiched directly between two opposing adhesive layers 120 and such that the electrically conductive layer structure 104 closes a cavity 160 towards the exterior of the preform of the component carrier 100 as shown. In other words, the open side of the respective cavity 160 may face the layer 108, while the closed side of the respective cavity 160 may form part of the outer surface of the structure as shown in fig. 3. This protects the sensitive layer 108 from mechanical damage and provides a robust outer surface to enable further stacking according to the desired application.

As a result of the process according to fig. 3, a layer 108 to be exposed later is positioned in the interior of the layer stack 102 sandwiched between two adhesive layers 120, 122. Thus, the layer 108 to be exposed is interposed between two partial stacks of stacks 102. The cavity 160 exposes a laterally central portion of the layer 108 to be exposed.

Referring to fig. 4 and 5, further layer structures 104, 106 are partially formed in the structure shown in fig. 3 and partially laminated to opposite major surfaces of the structure shown in fig. 3.

As shown in fig. 4, the structure shown in fig. 3 may be subjected to any desired patterning and/or plating (plating) process. In particular, the vertical through connections 162 may be formed in the stack 102 by: laser drilling is performed from opposite major surfaces of the structure shown in fig. 3 and the laser perforations so formed are filled by subsequently using an electrically conductive material, such as copper, for example by plating. As also shown in fig. 4, both the upper and lower major surfaces of the illustrated process stack 102 may be subjected to a patterning process. Patterning may be accomplished by photolithography and etching, by laser processing, and the like.

As shown in fig. 5, the structure shown in fig. 4 may then be subjected to a further stacking process. More specifically, one or more additional electrically insulating layer structures 106 and/or one or more additional electrically conductive layer structures 104 may be attached to the upper and/or lower major surfaces of the structure shown in fig. 4. The corresponding stacks may be symmetrical (i.e., the same on opposite major surfaces) or asymmetrical (i.e., different on opposite major surfaces). Such connection of the further layer structures 104, 106 may be achieved, for example, by lamination, i.e. the application of pressure and/or heat.

Referring to figure 6, a respective recess 164 may be formed in the further layer structure 104, 106 on each of the opposite major surfaces of the stack 102. For example, each respective recess 164 may extend from an exterior of the stack 102 up to a respective second electrically-conductive layer structure 104 calculated from each of the opposing major surfaces of the stack 102. The respective second electrically conductive layer structure 104 is shown as a protective layer 165 and may serve as a stop layer for the recess forming process. Preferably, the recess 164 is formed by laser processing. Although not shown in fig. 6, this may result in the recesses 164 tapering toward the central layer 108. The result of forming such a recess is an intermediate structure in which the exposed portions of layer 108 are protected on both sides by a remaining protective layer 165. As shown, a respective one of the protective layers 165 is spaced apart from the layer 108 by a respective one of the cavities 160 relative to the layer 108. Thus, the protective layer 165 may protect the layer 108 during subsequent patterning and plating processes, see fig. 7.

In order to obtain the layer structure shown in fig. 6, the layer structure shown in fig. 5 may be subjected to a further material removal process. Also, the material removal process may be performed by laser processing to obtain high accuracy. Alternatively, the material removal process may be a mechanical material removal process or may be achieved by etching. As a result of the material removal process, removal of material of the two uppermost layer structures 104, 106 shown in fig. 5 on the opposite two main surfaces of the stack 102 may be achieved. Thus, the recesses 164 may be formed on opposite major surfaces of the structure shown in fig. 6. The electrically-conductive layer structure 104 under the two uppermost layer structures 104, 106 on the opposite major surfaces of the stack 102 may serve as a stop layer for the material removal process and may withstand the material removal process.

To obtain the layer structure shown in fig. 7, the exposed electrically-conductive layer structures 104 on the opposite major surfaces of the stack 102 shown in fig. 6 may be patterned. Such patterning process may be performed again by a photolithography and etching process, by mechanically removing the copper material, by laser processing, or the like. Further vertical through-connections 169 may be formed in the stack 102 by laser drilling the opposite main surfaces of the structure shown in fig. 6 and subsequently filling the laser perforations with an electrically conductive material, such as copper, for example by plating. Thus, the intermediate structure of fig. 6 may be further processed by patterning and plating to obtain the structure shown in fig. 7.

During this process, the protective layer 165 may advantageously protect the sensitive layer 108 to be exposed from being damaged during the patterning and plating process.

Referring to fig. 8, a first blind hole 116 may be formed in the stack 102, the first blind hole 116 extending from a first main surface (main surface according to the upper part of fig. 8) of the stack 102 up to the exposed layer 108 in a central region of the stack 102 in the lateral direction. Furthermore, a second blind hole 118 is formed in the stack 102, which second blind hole 118 extends from a second main surface (the main surface of the lower part according to fig. 8) opposite to the first main surface up to the exposure layer 108. The blind holes 116, 118 may be formed by removing exposed portions of the protective layer 165 by laser treatment. By forming the blind vias 116, 118, the portion of the protective layer 165 not disposed within the layer structures 104, 106 of the stack 102 is removed above and below the layer 108, whereby the layer 108 is exposed to the environment. The blind holes 116, 118 can be formed in a conventional process, in particular by etching the protective layer 165 (the protective layer 165 can be made of copper).

As a result, a component carrier 100 is obtained, which component carrier 100 comprises the stack 102 and the partially exposed layer 108 in a vertically and horizontally central region of the stack 102. The exposed layer 108 is exposed with respect to the upper side 112 and the lower side 114 by a respective one of blind holes 116, 118 formed in the stack 102. Each of the opposing major surfaces of the exposed layer 108, when covered within the stack 102, is partially covered by a respective adhesive layer 120, 122, while the stack-exposed portions of the layer 108 are also exposed relative to the adhesive layers 120, 122. More specifically, each of the opposing major surfaces of the exposure layer 108 is covered by a respective adhesive layer 120, 122 only at the portions of the exposure layer 108 within the material of the stack 102, while each of the opposing major surfaces of the exposure layer 108 is free of a respective adhesive layer 120, 122 in the portions associated with the blind vias 116, 118. The illustrated component carrier 100 can be configured as a sensor or a microelectromechanical system with the exposed layer 108 forming a functional diaphragm as the functional structure. For example, the exposed layer 108 includes or is composed of an elastic polymer. The thickness d of the exposed layer 108 may be, for example, 5 μm, enabling free movement of the functional membrane even in the presence of small forces.

As shown, the lateral front-to-back side offset/, between the central portion of the outermost portion 124 of the first blind via 116 and the central portion of the outermost portion 124 of the second blind via 118 may be 15 μm. In contrast (see fig. 9), the lateral front-to-back offset L between the central portion of the innermost portion 126 of the first blind hole 116 and the central portion of the innermost portion 126 of the second blind hole 118 may be greater than the lateral front-to-back offset L between the central portion of the outermost portion 124 of the first blind hole 116 and the central portion of the outermost portion 124 of the second blind hole 118.

Although not shown in fig. 8, the innermost portion 126 of the first blind hole 116 may taper slightly from the exposed layer 108 towards the first major surface of the stack 102 (upper portion according to fig. 8) where the first blind hole 116 extends. Accordingly, an innermost portion 126 of the second blind hole 118 may taper slightly from the exposed layer 108 towards the second major surface of the stack 102 (lower according to fig. 8) where the second blind hole 118 extends. Furthermore, an outermost portion 124 of the first blind via 116 tapers from the first major surface of the stack 102 from which the first blind via 116 extends toward the exposure layer 108. In a corresponding manner, the outermost portion 124 of the second blind via 118 tapers from the second major surface of the stack 102 from which the second blind via 118 extends toward the exposure layer 108. This geometry is best seen in the embodiment of fig. 12 described below. Illustratively, the blind holes 116, 118 may be generally X-shaped. This tapered geometry may be the result of the features (finger print) and the laser treatment used to create the cavity 160 and recess 164.

As already mentioned, in order to obtain the component carrier 100 according to fig. 8, the exposed central portion of the protective layer 165 may be removed. This can be achieved, for example, by etching. As a result, recesses 130 are formed in the correspondingly partially removed exposed sidewalls of the electrically-conductive layer structure 104, as shown in detail 166 of fig. 8.

As can be seen from detail 168, the component carrier 100 has an annular shape in plan view (e.g., has a circular or rectangular shape or any other shape). By combining or connecting the cavity 160 with the recess 164 by removing the exposed portion of the protective layer 165 to define the blind holes 116, 118, a precisely defined and fully exposed layer 108 is obtained, which layer 108 is, however, securely connected within the stack 102 by the adhesive layers 120, 122. Furthermore, since the recess 164 and the cavity 160 are formed by laser processing, the lateral offset L, L between the outermost portion 124 and the innermost portion 126 of the blind holes 116, 118 is both very small.

Fig. 9 shows a cross-sectional view of a component carrier 100 according to another exemplary embodiment of the present invention.

As shown by a comparison of fig. 8 and 9, the lateral offset L in the innermost portion 126 of the blind holes 116, 118 is greater than the lateral offset L at the outermost portion 124 of the blind holes 116, 118. This is the result of the manufacturing method described above.

Furthermore, in contrast to fig. 8, the component carrier 100 according to fig. 9 has an exposure layer 108 which is composed of two sub-structural parts, namely a resilient body (for example made of polyimide) and a piezoelectric layer 146 which is formed on the two sub-structural parts for applying and/or detecting electrical signals in connection with the resilient movement of the exposure layer 108.

Fig. 10 shows a cross-sectional view of a component carrier 100 according to a further exemplary embodiment of the present invention. This embodiment includes a component 132 embedded in the exposure layer 108 but exposed to the environment.

Fig. 10 shows a component carrier 100 according to a further exemplary embodiment of the present invention. In this embodiment, a component 132, such as a pressure sensitive body or a semiconductor chip, is embedded in the exposed portion of the exposed layer 108, and the component 132 itself is exposed to the environment. For example, the component 132 may be a pressure or gas sensor, the component 132 being exposed to the environment via the upper blind hole 116, and thus the pressure or gas in the environment may be suitably detected. Alternatively, the embedded component 132 is an acceleration sensor that moves with the movable functional membrane-type layer 108 to accurately detect acceleration in the environment (e.g., forming part of an airbag). In yet another embodiment, the embedded component 132 may be an antenna structure capable of transmitting and/or receiving electromagnetic radiation in, for example, a communication device.

Fig. 11 shows a flow chart of a method of manufacturing a component carrier 100 according to an exemplary embodiment of the invention. Hereinafter, referring to fig. 11, a process flow of the method of manufacturing the component carrier 100 will be described.

As shown by block 200, adhesive layers 120, 122 may be applied to the core with the electrically insulating layer structure 106. For example, the thickness of the core may be 50 μm. As shown in block 202, the gap may then be opened, for example, by laser processing or plasma processing (see fig. 2). As shown by block 204, lamination may then be performed between the two components as shown in fig. 2, resulting in the structure as shown in fig. 3. Thereafter, referring to block 208, laser drilling may be performed to form laser vias. Referring to block 210, the laser via may then be filled with a copper material by plating. As shown by block 212, a structuring process may then be performed to pattern the opposite major surfaces of the structure shown in fig. 3, thereby obtaining the structure as shown in fig. 4. Referring to block 214, one or more additional electrically-conductive layer structures 104 and/or electrically-insulating layer structures 106 may then be connected to the stack 102 by lamination, see, e.g., fig. 5. The opening of the final gap may then be completed, as shown in block 216, see, e.g., fig. 6. Block 218 shows the subsequent laser drilling process. The subsequent process may be a plating process to fill the laser via, as shown in block 220. Block 222 illustrates an additional structuring or patterning process, for example to obtain the structure shown in fig. 7 or fig. 8. Finally, block 226 indicates that solder resist may be applied on the surface portion of the manufactured component carrier 100.

Fig. 12 shows a cross-sectional view of a component carrier 100 according to an exemplary embodiment of the invention.

In the illustration of the component carrier 100 according to fig. 12, certain specific structural features are exaggerated to demonstrate the presence of such features. As shown, the result of forming the cavities 160 by laser drilling is that there is a corresponding taper (taper) of these cavities 160 in the innermost portion 126, as shown in fig. 12. Recesses 164 are again formed on opposite major surfaces of stack 102 as a result of laser drilling, which also results in the taper of outermost portion 124, however outermost portion 124 is tapered in the opposite direction.

As also shown in fig. 12, the electrically conductive layer structure 104, which serves as a protective layer 165 exposing both sides of the layer 108 during further deposition, is formed to have a recess 130 due to laser processing or etching. Furthermore, fig. 12 shows that the up and down offset is very small, since the up and down offset is only caused by laser tolerances. The up-down offset of the innermost portion 126 of the blind holes 116, 118 may be greater than the outermost portion 124 of the blind holes 116, 118. It should also be noted that the taper in the previous cavity 160 may be stronger (α < β) than the previous recess 164.

It should be noted that the term "comprising" does not exclude other elements or steps and the "a" or "an" does not exclude a plurality. Also elements described in association with different embodiments may be combined.

It should also be noted that reference signs in the claims shall not be construed as limiting the scope of the claims.

The practice of the invention is not limited to the preferred embodiments shown in the drawings and described above. On the contrary, many variants are possible using the illustrated solution and the principle according to the invention, even in the case of fundamentally different embodiments.