Solder micro-bump array preparation method

文档序号:973281 发布日期:2020-11-03 浏览:2次 中文

阅读说明:本技术 焊料微凸点阵列制备方法 (Solder micro-bump array preparation method ) 是由 刘建军 胡海霖 郭育华 张孔 王运龙 于 2020-08-03 设计创作,主要内容包括:本发明涉及芯片封装领域,具体涉及一种焊料微凸点阵列制备方法,包括如下步骤:贴焊片,将焊片贴合在载板上;切割,在焊片上切割出焊料柱阵列;剥离,将多余的焊片撕掉或剥离,只留下焊料柱阵列;倒装焊接,焊料柱阵列转移到需制作凸点面阵的焊盘上;回流,对带有焊料柱阵列的焊盘进行回流,使焊料柱阵列熔化成球,形成规则的焊料凸点阵列。本发明的优点在于:该方法工艺简单,效率高,灵活方便,可适用各种型号焊料,无需特制微球,成本低,不仅适用于晶圆整体制作,对划切好的芯片,转接板同样适用,而且无需特制植球模板,可大规模应用。(The invention relates to the field of chip packaging, in particular to a method for preparing a solder micro-bump array, which comprises the following steps: bonding a soldering lug, namely bonding the soldering lug on the carrier plate; cutting, namely cutting the solder column array on the soldering lug; stripping, namely tearing off or stripping the redundant soldering lugs to only leave the solder column array; flip-chip bonding, wherein the solder column array is transferred to a bonding pad on which a bump area array needs to be manufactured; and reflowing, namely reflowing the bonding pad with the solder column array to melt the solder column array into balls so as to form a regular solder bump array. The invention has the advantages that: the method has the advantages of simple process, high efficiency, flexibility, convenience, suitability for various types of welding fluxes, no need of special microspheres, low cost, suitability for the integral manufacture of wafers, suitability for well-cut chips and adapter plates, no need of special ball-planting templates and large-scale application.)

1. A solder micro-bump array preparation method is characterized in that: the method comprises the following steps:

s1, attaching solder pads:

bonding the soldering lug (2) on the carrier plate (1);

s2, cutting:

cutting a solder column array (21) on the soldering lug (2);

s3, peeling:

forming an island by the processed solder column array (21), tearing off or stripping the redundant soldering lug (2) and only leaving the solder column array (21);

s4, flip chip bonding:

aligning the carrier plate (1) with a bonding pad (3) of which a salient point area array needs to be manufactured, carrying out flip-chip welding, and transferring the solder column array (21) to the bonding pad (3) of which the salient point area array needs to be manufactured;

s5, reflux:

and reflowing the pad (3) with the solder column array (21) to melt the solder column array (21) into a ball to form a regular solder bump array (22).

2. The method for preparing a solder micro-bump array according to claim 1, wherein: before the soldering lug is attached in the step s1, the raw material needs to be processed, namely, the soldering lug (2) with the required model and thickness is prepared, the soldering lug is cut into the required size, the soldering lug is ensured to be flat, the carrier plate (1) with the required shape and size is prepared, and the surface is cleaned.

3. The method for preparing a solder micro-bump array according to claim 1, wherein: in step s1, a clean carrier plate (1) is coated with an adhesive, spread sufficiently and uniformly by high-speed whirl coating or strickling, and a flat soldering lug (2) is attached to the carrier plate (1).

4. The method for preparing a solder micro-bump array according to claim 1, wherein: in step s2, UV, or CO is applied2Or picosecond laser processing equipment cuts the solder column array (21) with designed size on the soldering lug (2) according to the designed pattern.

5. The method for preparing a solder micro-bump array according to claim 1, wherein: in step s4, a flip-chip bonding machine is used to align the carrier plate (1) with the pads (3) of the area array where the bumps are to be made and perform flip-chip bonding, and the solder column array (21) is transferred to the pads (3) of the area array where the bumps are to be made.

6. The method for preparing a solder micro-bump array according to claim 1, wherein: in the step s4, in the flip chip bonding, heating and pressurizing are carried out during the flip chip bonding, so that the solder columns are preliminarily melted to form metallurgical bonding with the pads (3), and simultaneously the solder column array (21) and the carrier plate (1) are debonded, so as to realize the transfer of the solder columns from the carrier plate (1) to the pads (3).

7. The method for preparing a solder micro-bump array according to claim 1, wherein: step s4 is flip-chip bonding, wherein, soldering flux (4) is coated on the bonding pad (3), the carrier plate (1) is aligned with the side of the bonding pad (3) which needs to be provided with the bump area array and coated with the soldering flux (4), and flip-chip bonding is carried out, and the solder column array (21) is transferred to the bonding pad (3) which needs to be provided with the bump area array.

8. The method for preparing a solder micro-bump array according to claim 1, wherein: in the step s4, in the flip chip bonding, when the bonding pad (2) is an AuSn bonding pad, an inert or reducing atmosphere is used for protection.

9. The method for preparing a solder micro-bump array according to claim 1, wherein: in step s5, the pad (3) with the solder column array (21) is placed in a vacuum reflow oven for reflow, so that the solder column array (21) is melted into a ball, and a regular solder bump array (22) is formed by the self-alignment effect.

10. The method for preparing a solder micro-bump array according to claim 1, wherein: after step s5, the following steps are performed:

s6, cleaning:

and cleaning impurities generated in the manufacturing process by using ultrasonic waves, solvent cleaning and other modes.

Technical Field

The invention relates to the field of chip packaging, in particular to a method for preparing a solder micro-bump array.

Background

In order to meet the requirements of miniaturization and high integration of a subsystem and a complete machine of a future electronic component, a flip chip, a stacked chip or a device, an embedded device or a multi-layer package, and the like, the development of a combined technology for realizing high assembly density and function density is urgently needed. The flip chip, the chip stacking and other advanced assembly technologies mostly adopt an area array bump interconnection process, have the advantages of saving area, reducing lead length, being beneficial to heat dissipation, improving performance, reducing volume and the like, and are a packaging technology with high technical competitiveness and development potential. Therefore, to develop advanced micro-system assembly technology, the interconnection area array bump manufacturing technology is first implemented. The solder micro-bump is the most common bump form, and has reliable performance and low cost.

The size of the area array bump used for interconnection of flip chips, chip stacks and the like is usually below 200 μm, and some are even below 100 μm. For the solder micro bump with the size order, the existing bump manufacturing mode mainly comprises two types of laser ball planting and mechanical printing, wherein the laser ball planting is to heat and melt a single solder ball by laser, then spray the solder ball onto a PAD corresponding to a chip or a ceramic adapter plate, naturally cool the solder ball in the spraying process, and then solidify the solder ball on the PAD of the chip or the ceramic adapter plate. The laser ball planting speed is slow (0.1-0.2 s/ball), funnels with different sizes are needed for different ball diameters, and the funnels are often irradiated by laser, so that the ablation of funnel openings is serious, and the funnels are often required to be replaced. The funnel with the small ball diameter is easy to block and can not be sprayed. Laser ball planting belongs to laser irradiation heating, solder balls are instantly melted at high temperature, the spraying force of the melting condition of a single solder ball is inconsistent, the shapes of the melted balls falling on a pad are also different, and poor coplanarity of a solder microsphere bump array can be caused. In the prior art, for example, in a coreless interposer packaging method with a two-dimensional arrangement disclosed in chinese patent application with publication number CN102651325A, a interposer substrate is exposed at a terminal of a metal pillar array, and a BGA solder ball bump array is formed by ball-planting or solder paste printing and reflow, in which a ball-planting bump manufacturing method is applied. The mechanical printing ball-planting is that the solder micro-ball is poured on the template by making the template with specific hole pattern, and scraped by a special steel brush, so that the micro-ball enters the hole of the template and falls on the chip or the substrate pad below. In this way, the required size of the template hole is small, the precision is high, and the template can only be manufactured in an electroforming mode, so that the cost is high. Meanwhile, because the thickness of the template is fixed, only microspheres with one size can be poured, and only solder balls with the same size can be planted.

Therefore, it is an urgent need to solve the problem to find a method for preparing solder micro bumps, which has simple process, high efficiency and low cost, and can meet the requirements of multiple varieties and sizes.

Disclosure of Invention

The technical problem to be solved by the invention is as follows: the method for preparing the solder micro-convex points in the prior art has the technical problems of complex process, low efficiency and high cost.

The invention solves the technical problems through the following technical means: a method for preparing a solder micro-bump array comprises the following steps:

s1, attaching solder pads:

attaching the soldering lug to the carrier plate;

s2, cutting:

cutting an array of solder columns on the solder pad;

s3, peeling:

forming an island by the processed solder column array, tearing off or stripping the redundant soldering lug, and only leaving the solder column array;

s4, flip chip bonding:

aligning the carrier plate with a bonding pad of an area array of which a salient point needs to be manufactured, carrying out flip-chip welding, and transferring the solder column array to the bonding pad of the area array of which the salient point needs to be manufactured;

s5, reflux:

and reflowing the bonding pad with the solder column array to melt the solder column array into balls to form a regular solder bump array.

Optimally, before the soldering lug is attached in the step s1, the raw material needs to be processed, namely, the soldering lug with the required model and thickness is prepared, the soldering lug is cut into the required size, the soldering lug is ensured to be flat, the carrier plate with the required shape and size is prepared, and the surface is cleaned.

Preferably, in step s1, a clean carrier plate is coated with an adhesive, and spread sufficiently and uniformly by high-speed whirl coating or strickling, so as to attach the flat soldering lug to the carrier plate.

Optimized, step s2, using UV, or CO2Or picosecond laser processing equipment cuts the solder column array with the designed size on the soldering lug according to the designed pattern.

Preferably, in step s4, the carrier board is aligned with the pad on which the bump area array is to be fabricated by using a flip-chip bonding machine, and the solder column array is transferred to the pad on which the bump area array is to be fabricated.

Preferably, in the step s4 of flip chip bonding, heating and pressurizing are performed during flip chip bonding, so that the solder columns are initially melted to form metallurgical bonding with the pads, and simultaneously the solder column array and the carrier plate are debonded, so as to realize the transfer of the solder columns from the carrier plate to the pads.

Preferably, in the step s4, in the flip-chip bonding, the soldering flux is coated on the pad, the carrier plate is aligned with the side, coated with the soldering flux, of the pad on which the area array of the salient points needs to be manufactured, the flip-chip bonding is performed, and the solder column array is transferred to the pad on which the area array of the salient points needs to be manufactured.

Preferably, in the step s4, in the flip chip bonding, when the bonding pad is an AuSn bonding pad, an inert or reducing atmosphere is used for protection.

Preferably, in step s5, the pad with the solder column array is placed into a vacuum reflow oven for reflow, so that the solder column array is melted into a ball, and a regular solder bump array is formed through the self-alignment effect.

Preferably, after step s5, the following steps are performed:

s6, cleaning:

and cleaning impurities generated in the manufacturing process by using ultrasonic waves, solvent cleaning and other modes.

The invention has the advantages that:

first, the method for preparing solder bumps according to the present invention can be used not only for preparing the entire wafer, but also for preparing the scribed single chip, and the method is flexible. The size of the manufactured salient point can be adjusted at any time according to needs, and the size of the isolated solder column only needs to be adjusted according to design, so that the process compatibility is strong.

Second, the solder sheet used in the present invention is much cheaper than the solder micro-sphere made of the same material, so the manufacturing cost is low. Moreover, after the micro-bump array is prepared, flip-chip bonding is required subsequently. By the method, the flip-chip welding machine can be used for two purposes, and the equipment investment is reduced. Meanwhile, the method does not need various additional auxiliary materials and templates, and can also reduce the production cost.

Thirdly, the method of the invention can also be used for the ball supplement of the solder micro bump array, namely when a small amount of welding spots of the manufactured bump array on the wafer are missing, a ball supplement machine is required to be used for ball supplement conventionally, and additional equipment and process investment are required. By using the method, the salient point can be prepared and repaired flexibly and quickly.

Therefore, the method has the advantages of simple process, flexibility, rapidness, easily controlled conditions, low preparation cost, cheapness and good use. The method has the advantages of simple process, high efficiency, flexibility, convenience, suitability for various types of welding fluxes, no need of special microspheres, low cost, suitability for the integral manufacture of wafers, suitability for well-cut chips and adapter plates, no need of special ball-planting templates and large-scale application.

Drawings

FIG. 1 is a process flow diagram of a method for fabricating a solder micro-bump array in accordance with an embodiment of the present invention;

wherein the content of the first and second substances,

the solder comprises a carrier plate-1, a soldering lug-2, a solder column array-21, a solder bump array-22, a bonding pad-3 and a soldering flux-4.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the embodiments of the present invention, and it is obvious that the described embodiments are some embodiments of the present invention, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

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