阅读说明：本技术 半导体装置及半导体装置的制造方法 (Semiconductor device and method for manufacturing semiconductor device ) 是由 作元祥太朗 于 2021-04-12 设计创作，主要内容包括：目的在于提供能够在半导体装置中抑制由于存在于粘接剂内的气泡到达电路图案而产生的绝缘不良的技术。半导体装置(100)具有：树脂绝缘铜基座板(1),其具有铜基座板(1a)、在铜基座板(1a)的上表面设置的绝缘层(1b)和在绝缘层(1b)的上表面设置的电路图案(1c)；半导体元件(2),其搭载于树脂绝缘铜基座板(1)的上表面；壳体(4),其经由粘接剂(9)而与树脂绝缘铜基座板(1)的外周部接合；封装材料(8),其在壳体(4)的内部将树脂绝缘铜基座板(1)的上表面以及半导体元件(2)封装；以及粗糙化图案(11),其在绝缘层(1b)的上表面以在俯视观察时将电路图案(1c)包围的方式形成。(Provided is a technique for suppressing, in a semiconductor device, insulation failure caused by bubbles present in an adhesive reaching a circuit pattern. A semiconductor device (100) comprises: a resin-insulated copper base plate (1) having a copper base plate (1a), an insulating layer (1b) provided on the upper surface of the copper base plate (1a), and a circuit pattern (1c) provided on the upper surface of the insulating layer (1 b); a semiconductor element (2) mounted on the upper surface of the resin-insulated copper-based base plate (1); a case (4) joined to the outer peripheral portion of the resin-insulated copper base plate (1) via an adhesive (9); a sealing material (8) which seals the semiconductor element (2) and the upper surface of the resin-insulated copper-based base plate (1) inside the case (4); and a roughened pattern (11) that is formed on the upper surface of the insulating layer (1b) so as to surround the circuit pattern (1c) when viewed in plan.)

1. A semiconductor device, comprising:

a resin-insulated copper base plate having a copper base plate, an insulating layer provided on an upper surface of the copper base plate, and a circuit pattern provided on an upper surface of the insulating layer;

a semiconductor element mounted on an upper surface of the resin-insulated copper base plate;

a case joined to an outer peripheral portion of the resin-insulated copper base plate via an adhesive;

a sealing material for sealing the semiconductor element and the upper surface of the resin-insulated copper base plate in the case; and

and a roughened pattern formed on the upper surface of the insulating layer so as to surround the circuit pattern in a plan view.

2. The semiconductor device according to claim 1,

the roughened pattern is formed at a portion of the upper surface of the insulating layer, which is greater than or equal to 500 μm from an end of the circuit pattern.

3. The semiconductor device according to claim 1 or 2,

the roughened pattern has a width of 200 μm and a depth of 1/3 a of the thickness of the insulating layer.

4. A semiconductor device, comprising:

a resin-insulated copper base plate having a copper base plate, an insulating layer provided on an upper surface of the copper base plate, and a circuit pattern provided on an upper surface of the insulating layer;

a semiconductor element mounted on an upper surface of the resin-insulated copper base plate;

a case joined to an outer peripheral portion of the resin-insulated copper base plate via an adhesive;

a sealing material for sealing the semiconductor element and the upper surface of the resin-insulated copper base plate in the case; and

and a metal spacer provided on an upper surface of the insulating layer so as to surround the circuit pattern in a plan view.

5. The semiconductor device according to claim 4,

the metal spacer is disposed at a portion of the upper surface of the insulating layer, which is greater than or equal to 500 μm from an end of the circuit pattern.

6. The semiconductor device according to claim 4 or 5,

the metal spacer has a width greater than or equal to 500 μm and less than or equal to 1.0mm and a thickness identical to a thickness of the circuit pattern.

7. The semiconductor device according to any one of claims 4 to 6,

the metal spacers are intermittently provided.

8. A method for manufacturing a semiconductor device according to any one of claims 1 to 3, wherein,

the roughened pattern is formed by laser processing or mechanical processing of the insulating layer after the formation of the circuit pattern.

9. A method for manufacturing a semiconductor device according to any one of claims 4 to 7, wherein,

the metal spacer is formed by etching at the time of formation of the circuit pattern.

Technical Field

The present invention relates to a semiconductor device having a resin-insulated copper base plate and a method for manufacturing the same.

Background

A semiconductor device is proposed which has a resin-insulated copper base plate having a copper base plate, an insulating layer provided on an upper surface of the copper base plate, and a circuit pattern provided on an upper surface of the insulating layer, a semiconductor element, and a package material. The semiconductor element is mounted on the upper surface of the resin-insulated copper base plate. The case is joined to an outer peripheral portion of the resin-insulated copper base plate via an adhesive. The encapsulating material encapsulates the semiconductor element and the upper surface of the resin-insulated copper base plate inside the case (see, for example, patent document 1).

Patent document 1: japanese laid-open patent publication No. 2016-096188

In recent years, semiconductor devices are increasingly operated at high temperatures. For example, in the case of a semiconductor device using silicon (Si) as a base material, the operating temperature is 175 ℃. For a wide band gap semiconductor device using silicon carbide (SiC) and gallium nitride (GaN) as a base material, an operating temperature of 200 ℃. Therefore, the encapsulating material filled inside needs to have a glass transition point temperature exceeding the operating temperature of the semiconductor element.

In addition, a resin having properties substantially similar to those of the encapsulating material is used as the adhesive for bonding the case to the resin-insulated copper base plate. Since the viscosity of the sealing material and the adhesive agent compatible with such high-temperature operation is high and the fluidity thereof is poor, it is difficult to fill the sealing material and the adhesive agent into a narrow space between the case and the resin-insulated copper-based substrate plate or into a deformed shape of the space without an unfilled portion.

If the adhesive has an unfilled portion, air is present in many cases, and bubbles are formed. Further, if the air bubbles present in the adhesive reach the circuit pattern, creeping discharge occurs due to the air bubbles, which causes a problem that the insulating property of the semiconductor device is deteriorated.

Disclosure of Invention

Accordingly, an object of the present invention is to provide a technique for suppressing an insulation failure in a semiconductor device, which is caused by bubbles present in an adhesive reaching a circuit pattern.

The semiconductor device according to the present invention includes: a resin-insulated copper base plate having a copper base plate, an insulating layer provided on an upper surface of the copper base plate, and a circuit pattern provided on an upper surface of the insulating layer; a semiconductor element mounted on an upper surface of the resin-insulated copper base plate; a case joined to an outer peripheral portion of the resin-insulated copper base plate via an adhesive; a sealing material for sealing the semiconductor element and the upper surface of the resin-insulated copper base plate in the case; and a roughened pattern formed on the upper surface of the insulating layer so as to surround the circuit pattern in a plan view.

ADVANTAGEOUS EFFECTS OF INVENTION

According to the present invention, since the surface area around the circuit pattern at the upper surface of the insulating layer is increased by the roughened pattern, it is possible to suppress the adhesive containing air bubbles from reaching the circuit pattern. This can suppress insulation failure in the semiconductor device, which is caused by bubbles present in the adhesive reaching the circuit pattern.

Drawings

Fig. 1 is a sectional view of a semiconductor device according to embodiment 1.

Fig. 2 is a sectional view of a semiconductor device according to embodiment 2.

Fig. 3 is a plan view of a resin-insulated copper base plate included in a semiconductor device according to embodiment 3 and its surroundings.

Detailed Description

< embodiment 1 >

Hereinafter, embodiment 1 will be described with reference to the drawings. Fig. 1 is a sectional view of a semiconductor device 100 according to embodiment 1.

As shown in fig. 1, the semiconductor device 100 has a resin-insulated copper base plate 1, a semiconductor element 2, a case 4, an electrode terminal 6, a sealing material 8, and a roughened pattern 11.

The resin-insulated copper base plate 1 includes a copper base plate 1a, an insulating layer 1b, and a circuit pattern 1 c. The copper base plate 1a, the insulating layer 1b, and the circuit pattern 1c are integrated. The copper base plate 1a is formed in a rectangular shape in a plan view. The insulating layer 1b is provided over the entire upper surface of the copper base plate 1 a. The insulating layer 1b was made of resin and had a thickness of 0.2 mm. The circuit pattern 1c is provided at a portion other than the outer peripheral portion at the upper surface of the insulating layer 1 b. The circuit pattern 1c is made of copper and has a thickness of 0.5 mm.

The semiconductor element 2 is mounted on the upper surface of the circuit pattern 1c via the solder 3. The case 4 is formed in a rectangular frame shape in a plan view, and is joined to an outer peripheral portion of the resin-insulated copper base plate 1 via an adhesive 9. The case 4 is made of resin and has insulation properties.

The electrode terminal 6 is provided in the case 4, and is connected to the circuit pattern 1c and the semiconductor element 2 via an aluminum wire 7. The sealing material 8 is made of, for example, epoxy resin, and is filled in the case 4. Thus, the encapsulating material 8 encapsulates the upper surface of the resin-insulated copper base plate 1 and the semiconductor element 2 inside the case 4.

The number of the roughened patterns 11 is 2 on the upper surface of the insulating layer 1b so that the circuit pattern 1c can be doubly surrounded in a plan view. Each of the roughened patterns 11 is formed in a rectangular frame shape in a plan view. The number of the roughened patterns 11 is not limited to 2, and may be 1 or 3 or more. The respective roughened patterns 11 may be formed continuously or intermittently.

Each roughened pattern 11 is formed at a portion of the upper surface of the insulating layer 1b which is 500 μm or more from the end of the circuit pattern 1 c. In addition, each of the roughened patterns 11 has a width of 200 μm and a depth of 1/3 of the thickness of the insulating layer 1 b.

Next, a method for manufacturing the semiconductor device 100 will be described. First, the resin-insulated copper base plate 1 is manufactured. Here, only the formation of the characteristic portion of the resin-insulated copper base plate 1 will be described. In the manufacturing process of the resin-insulated copper-based base plate 1, after the circuit pattern 1c is formed on the upper surface of the insulating layer 1b, the insulating layer 1b is subjected to laser processing or machining, thereby forming the roughened pattern 11. The machining is, for example, grinding or cutting.

Next, the semiconductor element 2 and the upper surface of the resin-insulated copper base plate 1 are bonded by the solder 3. Next, the adhesive 9 is applied to the outer periphery of the resin-insulated copper base plate 1. In a state where the case 4 with the electrode terminal 6 inserted therein is fitted to the outer peripheral portion of the resin-insulated copper-based base plate 1, the temperature is raised to cure the adhesive 9, thereby completing the bonding. Next, after internal wiring is performed by the aluminum wire 7, an epoxy resin to be the sealing material 8 is filled. The epoxy resin is cured by raising the temperature of the semiconductor device 100, thereby completing the semiconductor device 100.

The size of the air bubbles 10 existing in the adhesive 9 is, for example, 0.1mm or more and 0.2mm or less. The adhesive 9 containing the bubbles 10 tries to move from the lower side of the case 4 toward the circuit pattern 1c, but by forming the roughened pattern 11, the surface area around the circuit pattern 1c at the upper surface of the insulating layer 1b becomes large. This lengthens the path from the lower side of the case 4 to the circuit pattern 1c, and therefore the adhesive 9 containing the bubbles 10 hardly reaches the circuit pattern 1 c.

As described above, the semiconductor device 100 according to embodiment 1 includes: a resin-insulated copper base plate 1 having a copper base plate 1a, an insulating layer 1b provided on an upper surface of the copper base plate 1a, and a circuit pattern 1c provided on an upper surface of the insulating layer 1 b; a semiconductor element 2 mounted on an upper surface of the resin-insulated copper base plate 1; a case 4 joined to an outer peripheral portion of the resin-insulated copper base plate 1 via an adhesive 9; a sealing material 8 for sealing the semiconductor element 2 and the upper surface of the resin-insulated copper base plate 1 in the case 4; and a roughened pattern 11 formed on the upper surface of the insulating layer 1b so as to surround the circuit pattern 1c in a plan view.

Therefore, since the surface area around the circuit pattern 1c on the upper surface of the insulating layer 1b is increased by the roughened pattern 11, the path from the lower side of the case 4 to the circuit pattern 1c is increased, and the adhesive 9 containing the bubbles 10 can be prevented from reaching the circuit pattern 1 c. That is, the bubbles 10 can be suppressed from reaching the circuit pattern 1 c. Thus, in the semiconductor device 100, insulation failure caused by the bubbles 10 reaching the circuit pattern 1c can be suppressed. As a result, long-term use of the semiconductor device 100 can be realized.

In addition, the roughened pattern 11 is formed at a portion of the upper surface of the insulating layer 1b which is more than or equal to 500 μm from the end of the circuit pattern 1 c. Therefore, the air bubbles 10 can be suppressed from flowing into the upper surface of the insulating layer 1b within 500 μm from the end of the circuit pattern 1 c. This ensures a required insulation breakdown voltage of 2500V or more of the semiconductor device 100.

In addition, the roughened pattern 11 has a width of 200 μm and a depth of 1/3 of the thickness of the insulating layer 1 b. Therefore, the air bubbles 10 existing in the adhesive 9 can be captured by the roughened pattern 11. In addition, when the roughened pattern 11 reaches the copper base plate 1a beyond the insulating layer 1b, there is a concern that the insulating properties of the semiconductor device 100 will be deteriorated, but since the depth of the roughened pattern 11 is 1/3 the thickness of the insulating layer 1b, such a problem will not occur.

In the method for manufacturing a semiconductor device according to embodiment 1, since the roughened pattern 11 is formed by performing laser processing or mechanical processing on the insulating layer 1b after the formation of the circuit pattern 1c, the roughened pattern 11 can be easily formed on the upper surface of the insulating layer 1 b.

< embodiment 2 >

Next, the semiconductor device 100 according to embodiment 2 will be described. Fig. 2 is a sectional view of a semiconductor device 100 according to embodiment 2. In embodiment 2, the same components as those described in embodiment 1 are denoted by the same reference numerals, and description thereof is omitted.

As shown in fig. 2, in embodiment 2, the semiconductor device 100 has a metal spacer 12 instead of the roughened pattern 11.

The metal spacer 12 is provided on the upper surface of the insulating layer 1b so as to continuously surround the circuit pattern 1c in a plan view. The metal spacer 12 is made of a metal capable of bonding to the insulating layer 1b, and is formed in a rectangular frame shape in a plan view. The metal that can be bonded to the insulating layer 1b is, for example, copper, nickel, aluminum, or the like, but if it is considered that the metal is formed together with the circuit pattern 1c as described later, copper is preferable.

Next, a method for manufacturing a semiconductor device according to embodiment 2 will be described. Here, only the steps different from embodiment 1 will be described. In the manufacturing process of the resin-insulated copper-based base plate 1, the metal spacer 12 is formed together with the circuit pattern 1c by performing etching treatment when the circuit pattern 1c is formed on the upper surface of the insulating layer 1 b. Therefore, the thickness of the metal spacer 12 is 0.5mm, which is the same as the thickness of the circuit pattern 1 c. The thicknesses of the circuit pattern 1c and the metal spacer 12 may be slightly different due to manufacturing errors and the like.

In addition, the metal spacer 12 is provided at a portion of the upper surface of the insulating layer 1b which is 500 μm or more from the end of the circuit pattern 1 c. In order to intercept the adhesive 9 in such a manner that the adhesive 9 does not reach the circuit pattern 1c, the metal spacer 12 has a width greater than or equal to 500 μm and less than or equal to 1.0 mm.

As described above, the semiconductor device 100 according to embodiment 2 includes: a resin-insulated copper base plate 1 having a copper base plate 1a, an insulating layer 1b provided on an upper surface of the copper base plate 1a, and a circuit pattern 1c provided on an upper surface of the insulating layer 1 b; a semiconductor element 2 mounted on an upper surface of the resin-insulated copper base plate 1; a case 4 joined to an outer peripheral portion of the resin-insulated copper base plate 1 via an adhesive 9; a sealing material 8 for sealing the semiconductor element 2 and the upper surface of the resin-insulated copper base plate 1 in the case 4; and a metal spacer 12 provided on the upper surface of the insulating layer 1b so as to surround the circuit pattern 1c in a plan view.

Therefore, the adhesive 9 can be blocked by the metal spacer 12, and therefore, the adhesive 9 containing the bubbles 10 can be prevented from reaching the circuit pattern 1 c. That is, the bubbles 10 can be suppressed from reaching the circuit pattern 1 c. Thus, in the semiconductor device 100, insulation failure caused by the bubbles 10 reaching the circuit pattern 1c can be suppressed. As a result, long-term use of the semiconductor device 100 can be realized.

In addition, the metal spacer 12 is provided at a portion of the upper surface of the insulating layer 1b which is 500 μm or more from the end of the circuit pattern 1 c. Therefore, the air bubbles 10 can be suppressed from flowing into the upper surface of the insulating layer 1b within 500 μm from the end of the circuit pattern 1 c. This ensures a required insulation breakdown voltage of 2500V or more of the semiconductor device 100.

In addition, the metal spacer 12 has a width of 500 μm or more and 1.0mm or less and a thickness the same as that of the circuit pattern 1 c. Therefore, the bubbles 10 existing in the adhesive 9 can be more effectively intercepted by the metal separator 12.

In the method for manufacturing a semiconductor device according to embodiment 2, since the metal spacer 12 is formed by etching at the time of forming the circuit pattern 1c, the metal spacer 12 can be formed together with the circuit pattern 1 c. This makes it possible to provide the metal spacer 12 on the upper surface of the insulating layer 1b without adding a new process.

< embodiment 3 >

Next, the semiconductor device 100 according to embodiment 3 will be described. Fig. 3 is a plan view of the resin-insulated copper-based base plate 1 and its surroundings included in the semiconductor device according to embodiment 3. In embodiment 3, the same components as those described in embodiments 1 and 2 are denoted by the same reference numerals, and description thereof is omitted.

In embodiment 2, the metal spacer 12 is provided on the upper surface of the insulating layer 1b so as to continuously surround the circuit pattern 1c in a plan view, but as shown in fig. 3, in embodiment 3, the metal spacer 12 is provided on the upper surface of the insulating layer 1b so as to intermittently surround the circuit pattern 1c in a plan view. Therefore, the metal separator 12 is provided with gaps 12a at predetermined intervals.

If the bubbles 10 are present in the epoxy resin existing between the circuit pattern 1c and the metal spacer 12 before the epoxy resin serving as the encapsulating material 8 is cured, the bubbles 10 can escape to the outer peripheral side of the metal spacer 12 through the gap 12a of the metal spacer 12. This makes it possible to separate the air bubbles 10 existing in the epoxy resin from the circuit pattern 1 c. Here, the gap 12a is formed to be larger than the size of the air bubbles 10 so that the air bubbles 10 existing in the epoxy resin can pass through.

As described above, in the semiconductor device 100 according to embodiment 3, the metal spacers 12 are provided intermittently. Therefore, the air bubbles 10 existing in the epoxy resin serving as the sealing material 8 can be suppressed from reaching the circuit pattern 1 c. Thus, in addition to the effects of embodiment 2, the semiconductor device 100 can suppress insulation failure caused by the bubbles 10 present in the epoxy resin reaching the circuit pattern 1 c.

Further, the respective embodiments can be freely combined, or can be appropriately modified or omitted.

Description of the reference numerals

1 resin-insulated copper base plate, 1a copper base plate, 1b insulating layer, 1c circuit pattern, 2 semiconductor element, 4 case, 8 packaging material, 9 adhesive, 11 roughened pattern, 12 metal spacer, 100 semiconductor device.