Semiconductor device with a plurality of transistors
阅读说明:本技术 半导体器件 (Semiconductor device with a plurality of transistors ) 是由 田中常之 于 2019-07-09 设计创作,主要内容包括:本发明公开了一种半导体器件,包括基体、缓冲构件、框架、盖和半导体元件。陶瓷框架被安装在铜基体上,且钼缓冲构件被置于陶瓷框架与铜基体之间。半导体元件被密封在由盖限定的框架内的空间中。框架包括:顶部;下段部,该下段部被设置在顶部的下方,并且设置有输入电极和输出电极;以及上段部。上段部形成在输入电极和输出电极的布置方向上,并且形成在顶部的下方以及下段部的上方。上段部包括上段连接部,该上段连接部在与输入电极和输出电极的布置方向相交的方向上形成在下段部的周边上。(A semiconductor device includes a base body, a buffer member, a frame, a cover, and a semiconductor element. The ceramic frame was mounted on the copper base, and the molybdenum cushioning member was interposed between the ceramic frame and the copper base. The semiconductor element is sealed in a space within the frame defined by the cover. The frame includes: a top portion; a lower section provided below the top and provided with an input electrode and an output electrode; and an upper section. The upper stage portion is formed in the arrangement direction of the input electrodes and the output electrodes, and is formed below the top portion and above the lower stage portion. The upper stage portion includes an upper stage connecting portion formed on a periphery of the lower stage portion in a direction intersecting with an arrangement direction of the input electrodes and the output electrodes.)
1. A semiconductor device, comprising:
a base formed of copper;
a cushioning member formed of molybdenum;
a frame mounted on the base with the cushioning member interposed therebetween, the frame being formed of alumina ceramic;
a cover covering the frame; and
a semiconductor element sealed in a space within the frame defined by the cover,
wherein the frame comprises:
a top portion including a sealing ring, the cap being secured to the sealing ring;
a lower stage portion provided below the top portion, the lower stage portion being provided with an input electrode that inputs a signal to the semiconductor element and an output electrode that outputs a signal from the semiconductor element; and
an upper stage portion formed in an arrangement direction of the input electrode and the output electrode and at a position below the top portion and above the lower stage portion, wherein the upper stage portion includes an upper stage connection portion formed on a periphery of the lower stage portion in a direction intersecting the arrangement direction of the input electrode and the output electrode.
2. A semiconductor device, the semiconductor device comprising:
a base formed of copper;
a cushioning member formed of molybdenum;
a frame mounted on the base with the cushioning member interposed therebetween, the frame being formed of alumina ceramic;
a cover covering the frame; and
a semiconductor element sealed in a space within the frame defined by the cover,
wherein the frame comprises:
a top portion including a sealing ring, the cap being secured to the sealing ring;
a lower stage part disposed below the top part, the lower stage part being provided with an input electrode inputting a signal to the semiconductor element and an output electrode outputting a signal from the semiconductor element, wherein the lower stage part includes a reinforcing metal pattern disposed at a position on the same plane as that of the output electrode where the input electrode and the output electrode are not disposed, so as to be insulated from the input electrode and the output electrode; and
an upper stage portion that is formed in an arrangement direction of the input electrode and the output electrode, and that is formed at a position that is below the top portion and above the lower stage portion.
3. The semiconductor device according to claim 2, wherein the lower stage portion includes a frame opening that surrounds a periphery of the semiconductor element, the frame opening is provided with the reinforcing metal pattern, and the reinforcing metal pattern is a ground wiring that is electrically connected to the base body through the buffer member.
Technical Field
The present disclosure relates to a semiconductor device.
Background
The semiconductor device is mounted in, for example, a communication apparatus. The semiconductor device includes a copper base and a ceramic frame mounted on the base, and its semiconductor element is sealed in a space formed by the frame. Since the copper base and the ceramic frame have different linear expansion coefficients, cracks may be generated in the frame due to the difference in the linear expansion coefficients. JPS59-161845 disclosed a structure that prevents cracks from being generated in a frame by interposing a buffer member (molybdenum plate) formed of molybdenum between a substrate (package substrate) and the frame (package).
Disclosure of Invention
The present disclosure provides a semiconductor device. The semiconductor device includes a base body, a buffer member, a frame, a cover, and a semiconductor element. The substrate is formed of copper. The buffer member is formed of molybdenum. The frame is mounted on the base, and the cushioning member is interposed between the frame and the base, and the frame is formed of alumina ceramic. The cover covers the frame. The semiconductor element is sealed in a space within the frame defined by the cover. The frame includes a top portion, a lower segment portion and an upper segment portion. The top portion includes a sealing ring to which the cap is secured. The lower stage portion is provided below the top portion, and the lower stage portion is provided with an input electrode that inputs a signal to the semiconductor element and an output electrode that outputs a signal from the semiconductor element. The upper stage portion is formed in the arrangement direction of the input electrode and the output electrode, and is formed at a position below the top portion and above the lower stage portion. The upper stage portion includes an upper stage connecting portion formed on a periphery of the lower stage portion in a direction intersecting with an arrangement direction of the input electrodes and the output electrodes.
The present disclosure also provides a semiconductor device. The semiconductor device includes a base body, a buffer member, a frame, a cover, and a semiconductor element. The substrate is formed of copper. The buffer member is formed of molybdenum. The frame is mounted on the base, and the cushioning member is interposed between the frame and the base, and the frame is formed of alumina ceramic. The cover covers the frame. The semiconductor element is sealed in a space within the frame defined by the cover. The frame includes a top portion, a lower segment portion and an upper segment portion. The top portion includes a sealing ring to which the cap is secured. The lower section is disposed below the top. The lower stage portion is provided with an input electrode for inputting a signal to the semiconductor element and an output electrode for outputting a signal from the semiconductor element. The lower section includes a reinforcing metal pattern provided on the same plane as the output electrode at a position where the input electrode and the output electrode are not provided, to be insulated from the input electrode and the output electrode. The upper stage portion is formed in the arrangement direction of the input electrode and the output electrode, and is formed at a position below the top portion and above the lower stage portion.
Drawings
The foregoing and other objects, aspects and advantages will be better understood from the following detailed description of embodiments of the disclosure with reference to the drawings, in which:
fig. 1A and 1B are views for illustrating a semiconductor device according to one embodiment of the present disclosure.
Fig. 2 is an external perspective view of the frame of the first example.
Fig. 3A is a plan view of a main portion of the semiconductor device of the first example, and fig. 3B is a sectional view taken along line B-B of fig. 3A.
Fig. 4A is a plan view of a main portion of a semiconductor device of a second example, and fig. 4B is a sectional view taken along a line B-B of fig. 4A.
Detailed Description
[ problem to be solved by the present disclosure ]
The framework described in JP S59-161845 includes: a top (upper portion of the frame) whose upper side is covered with a cover, and the cover is fixed to the top; and a lower section (lower portion of the frame) provided on the lower portion with respect to the top portion. In the frame, a step is formed between the top portion and the lower section portion, and an electrode plate wire-bonded to the semiconductor element is provided on an upper surface of the step. Since deformation is concentrated at the boundary between the top portion and the lower section due to the difference in thickness between the top portion and the lower section, cracks may be generated in the lower section.
[ Effect of the present disclosure ]
According to the present disclosure, cracks can be prevented from occurring in the lower section of the frame.
[ description of embodiments of the present disclosure ]
Embodiments of the present disclosure will be described. A semiconductor device according to one embodiment of the present disclosure includes a base, a buffer member, a frame, a cover, and a semiconductor element. The substrate is formed of copper. The buffer member is formed of molybdenum. The frame is mounted on the base, and the cushioning member is interposed between the frame and the base, and the frame is formed of alumina ceramic. The cover covers the frame. The semiconductor element is sealed in a space within the frame defined by the cover. The frame includes a top portion, a lower segment portion and an upper segment portion. The top portion includes a sealing ring to which the cap is secured. The lower stage section is disposed below the top section, and is provided with an input electrode that inputs a signal to the semiconductor element and an output electrode that outputs a signal from the semiconductor element. The upper stage portion is formed in the arrangement direction of the input electrode and the output electrode, and is formed at a position below the top portion and above the lower stage portion. The upper stage portion includes an upper stage connecting portion formed on a periphery of the lower stage portion in a direction intersecting an arrangement direction of the input electrodes and the output electrodes.
A semiconductor device according to another embodiment of the present disclosure includes a base, a buffer member, a frame, a cover, and a semiconductor element. The substrate is formed of copper. The buffer member is formed of molybdenum. The frame is mounted on the base, and the cushioning member is interposed between the frame and the base, and the frame is formed of alumina ceramic. The cover covers the frame. The semiconductor element is sealed in a space within the frame defined by the cover. The frame includes a top portion, a lower segment portion and an upper segment portion. The top portion includes a sealing ring to which the cap is secured. The lower section is disposed below the top. The lower stage portion is provided with an input electrode for inputting a signal to the semiconductor element and an output electrode for outputting a signal from the semiconductor element. The lower section includes a reinforcing metal pattern provided on the same plane as the output electrode at a position where the input electrode and the output electrode are not provided, to be insulated from the input electrode and the output electrode. The upper stage portion is formed in the arrangement direction of the input electrode and the output electrode, and is formed at a position below the top portion and above the lower stage portion.
In another embodiment described above, the lower section may include a frame opening around a perimeter of the semiconductor element. The frame opening may be provided with a reinforcing metal pattern, and the reinforcing metal pattern may be a Ground (GND) wiring electrically connected to the base through the buffer member.
[ details of embodiments of the present disclosure ]
Hereinafter, detailed examples of a semiconductor device according to the present disclosure will be described with reference to the accompanying drawings. Fig. 1A and 1B are views for illustrating a semiconductor device according to an embodiment of the present disclosure.
The
As shown in fig. 1A, the
The cushioning
The
The
Fig. 2 is an external perspective view of a frame of the first example, fig. 3A is a plan view of a main portion of a semiconductor device of the first example, and fig. 3B is a sectional view taken along line B-B of fig. 3A. Fig. 3A shows the mount table 13 in order to easily understand the structure of the
The
The stepped
In order to improve the airtightness inside the
The
The
However, as described above, since the upper-
In the first example described above, an example has been described in which the upper-
Fig. 4A is a plan view of a main portion of a semiconductor device of a second example, and fig. 4B is a sectional view taken along a line B-B of fig. 4A.
As shown in fig. 4A and 4B, the
However, the stepped
Because the reinforcing
Further, as shown in fig. 4B, the
Alternatively, the reinforcing
It is to be understood that the embodiments and examples disclosed herein are illustrative and not restrictive in every respect. The scope of the invention is indicated by the scope of the claims rather than the foregoing meaning. All changes which come within the meaning and range of equivalency of the claims are to be embraced within their scope.