阅读说明：本技术 一种扇出型封装晶圆 (Fan-out type packaging wafer ) 是由 张乔栋 朱红伟 袁泉 于 2021-07-31 设计创作，主要内容包括：本发明公开了一种扇出型封装晶圆,包括有晶圆片与防翘组件,所述晶圆片设置于防翘组件内,所述晶圆片由衬底与切割区道组合而成,所述切割区道设置在所述晶圆片两侧,所述晶圆片与所述切割区道形成一体化连接,所述晶圆片表面活动连接有压环。本发明中,当芯片模块底端的触脚插入TSV孔时,触脚下端面与焊垫连接时,还可以与金属层连接,提高触脚的连接面积,使其信息传输更为稳定,当通过焊锡层将触脚焊结在TSV孔内时,使得触脚与焊垫、金属层稳定连接,晶圆片表面的压盘,可以将晶圆片固定在横杆的表面,并同时压住晶圆片的外侧,防止晶圆片出现翘曲、晶圆弯曲的情况发生,并在晶圆贴模块的过程中,可以防止晶圆片位移,影响光刻步骤的对准作业。(The invention discloses a fan-out type packaging wafer which comprises a wafer and an anti-warping assembly, wherein the wafer is arranged in the anti-warping assembly and is formed by combining a substrate and cutting area channels, the cutting area channels are arranged on two sides of the wafer, the wafer and the cutting area channels are integrally connected, and a pressure ring is movably connected to the surface of the wafer. In the invention, when the contact pin at the bottom end of the chip module is inserted into the TSV hole and the lower end face of the contact pin is connected with the welding pad, the contact pin can be further connected with the metal layer, the connection area of the contact pin is increased, the information transmission of the contact pin is more stable, when the contact pin is welded in the TSV hole through the soldering tin layer, the contact pin is stably connected with the welding pad and the metal layer, the wafer can be fixed on the surface of the cross rod by the pressure plate on the surface of the wafer, the outer side of the wafer is pressed at the same time, the wafer is prevented from warping and bending, and in the process of pasting the module on the wafer, the wafer can be prevented from displacing and affecting the alignment operation of the photoetching step.)

1. A fan-out type packaging wafer comprises a wafer (1) and an anti-warping component (2), and is characterized in that: wafer (1) sets up in proof warp subassembly (2), wafer (1) is formed by substrate (101) and cutting area way (102) combination, cutting area way (102) set up wafer (1) both sides, wafer (1) with cutting area way (102) form the integration and connect, wafer (1) surface swing joint has clamping ring (205).

2. The fan-out package wafer of claim 1, wherein: the wiring layer (103) is arranged on the lower end face of the substrate (101), TSV holes (104) are symmetrically formed in two sides of the substrate (101), welding pads (105) arranged in the wiring layer (103) are connected to the lower end face of the TSV holes (104), a metal layer (106) is arranged on the surface of an inner cavity of each TSV hole (104), a chip module (107) is arranged on the upper end face of the substrate (101), contact pins (108) are symmetrically arranged on two sides of the lower end face of the chip module (107), the contact pins (108) are movably connected with the interior of each TSV hole (104), a soldering tin layer (109) is arranged between the TSV holes (104) and the surface of the metal layer (106), a protection layer (110) is arranged on the upper end face of the substrate (101), and an insulation layer (111) is arranged on the lower end face of the wiring layer (103).

3. The fan-out package wafer of claim 2, wherein: the metal layer (106) is connected with the upper end face of the welding pad (105), and the TSV hole (104) is overlapped with the central line of the welding pad (105).

4. The fan-out package wafer of claim 2, wherein: the contact pins (108) are connected with the welding pads (105), and the protective layer (110) is arranged on the cutting zone (102) and the upper end face of the chip module (107) at the same time.

5. The fan-out package wafer of claim 2, wherein: the insulating layer (111) is arranged on the lower end face of the cutting zone (102).

6. The fan-out package wafer of claim 2, wherein: the wiring layer (103) has the same area as the substrate (101), and the wiring layer (103) overlaps the center line of the substrate (101).

7. The fan-out package wafer of claim 1, wherein: proof warp subassembly (2) are formed by a plurality of horizontal poles (201), a plurality of connecting rod (202) combination, and are a plurality of horizontal pole (201) both ends symmetry is seted up flutedly (203), recess (203) with connecting rod (202) surface activity cup joints, recess (203) bilateral symmetry is provided with sets up screw hole (204) inside horizontal pole (201).

8. The fan-out package wafer of claim 1, wherein: the clamping ring (205) is characterized in that a plurality of connecting plates (206) are arranged on the periphery of two sides of the clamping ring (205), and bolts (207) which are in threaded connection with the threaded holes (204) are arranged inside the connecting plates (206).

9. The fan-out package wafer of claim 1, wherein: the wafer (1) is overlapped with the center line of the pressure ring (205), and the wafer (1) is arranged on the upper end face of the cross rod (201).

Technical Field

The invention relates to the technical field of packaging wafers, in particular to a fan-out type packaging wafer.

Background

The wafer is a silicon wafer used for manufacturing a silicon semiconductor integrated circuit, the raw material of the wafer is silicon, high-purity polycrystalline silicon is dissolved and then doped into a silicon crystal seed crystal, then the silicon crystal seed crystal is slowly pulled out to form cylindrical monocrystalline silicon, a silicon crystal bar is ground, polished and sliced to form a silicon wafer, namely, the wafer and a semiconductor wafer bump, the fan-out type packaging technology is a hot topic in the packaging market, in the fan-out type technology, a bare chip is directly packaged on the wafer, the fan-out type technology is cheaper than a 2.5D/3D packaging device because an intermediate layer is not needed, the fan-out type technology can be mainly divided into three types, the chip is firstly installed/faced downwards, the chip is firstly installed/faced upwards and the chip is later installed, in the chip-first-installed/faced downwards and chip-first-installed/faced upwards process flows, a wafer factory firstly processes the chip on the wafer, and then the wafer is moved to a packaging factory for chip cutting. Finally, through a chip mounting system, the chip is placed on a temporary carrier plate, and the epoxy molding compound is plastically packaged on the chip and the carrier plate to form a so-called reconstituted wafer;

the device is in a fan-out wafer level packaging process flow, which comprises the steps of preparing and cutting a wafer (placing the wafer into a scribing adhesive tape, cutting the wafer into units to prepare a metal carrier plate, cutting the wafer into units to prepare the metal carrier plate, cleaning the carrier plate and removing all pollutants), laminating adhesion (activating an adhesive film by pressure), wafer re-assembly (picking up chips from the wafer and placing the chips on the metal carrier plate), molding (sealing the carrier plate by molding compound), removing the carrier plate (removing the molded re-assembled chips from the carrier plate), arranging and re-wiring (manufacturing an I/O interface on a redistribution layer by a metallization process), wafer bumps (forming bumps on the I/O external interface), and cutting the wafer into units (cutting the molded plastic package body).

All existing fan-out technologies still face challenges, the main challenges of fan-out wafer packaging are warpage and wafer bending, and in addition, chip placement also affects the flatness of the wafer and chip stress, so chip offset brings challenges to photolithography steps and alignment, and meanwhile, when a chip is soldered, contact pins are prone to being out of place, which causes unstable chip connection.

To this end, we propose a fan-out package wafer to solve the above problems.

Disclosure of Invention

The invention aims to provide a fan-out type packaging wafer, which is used for solving the problems that the existing fan-out type wafer packaging in the background technology causes warping and wafer bending, the flatness of the wafer and the stress of a chip are influenced by chip placement, so that the photoetching step and alignment are challenged by chip offset, and meanwhile, when the chip is welded, contact pins are easy to be out of place, so that the connection of the chip is unstable.

In order to achieve the purpose, the invention provides the following technical scheme:

the utility model provides a fan-out type encapsulation wafer, is including wafer and proof warp subassembly, the wafer sets up in preventing warping up the subassembly, the wafer is formed by substrate and the combination of cutting zone way, the cutting zone way sets up in the wafer both sides, the wafer with the cutting zone way forms the integration and is connected, wafer surface swing joint has the clamping ring.

In a further embodiment, a wiring layer is arranged on the lower end face of the substrate, TSV holes are symmetrically formed in two sides of the substrate, the lower end face of each TSV hole is connected with a welding pad arranged in the wiring layer, a metal layer is arranged on the inner cavity surface of each TSV hole, a chip module is arranged on the upper end face of the substrate, contact pins are symmetrically arranged on two sides of the lower end face of the chip module and movably connected with the inside of each TSV hole, a soldering tin layer is arranged between each TSV hole and the corresponding metal layer surface, a protective layer is arranged on the upper end face of the substrate, an insulating layer is arranged on the lower end face of the wiring layer, so that each contact pin can be connected with the corresponding metal layer surface, the metal layer is connected with the corresponding welding pad, and when the lower end face of each contact pin is not contacted with the corresponding welding pad, the contact pins are connected with the corresponding welding pad through the metal layer.

In a further embodiment, the metal layer is connected to the upper end surface of the pad, and the TSV hole overlaps the center line of the pad, so that the contact pin contacted by the metal layer can be connected to the pad.

In a further embodiment, the contact pins are connected with the welding pads, and the protective layer is arranged on the cutting zone and the upper end surface of the chip module at the same time, so that the protective layer can wrap the upper end surface of the chip to protect the chip.

In a further embodiment, the insulating layer is disposed on the lower end surface of the dicing street, so that the wiring layer can be wrapped by the insulating layer to be protected.

In a further embodiment, the area of the wiring layer is the same as that of the substrate, and the wiring layer is overlapped with the central line of the substrate, so that a welding pad arranged in the wiring layer can be connected with the TSV hole.

In a further embodiment, the proof warp subassembly is formed by a plurality of horizontal poles, a plurality of connecting rod combination, and is a plurality of the recess is seted up to horizontal pole both ends symmetry, the recess with the connecting rod surface activity cup joints, recess bilateral symmetry is provided with sets up the inside screw hole of horizontal pole for can install between horizontal pole and the connecting rod.

In a further embodiment, a plurality of connecting plates are arranged on the periphery of two sides of the compression ring, bolts in threaded connection with the threaded holes are arranged in the connecting plates, and the compression ring can be fixed on the surface of the cross rod through the bolts.

In a further embodiment, the wafer is overlapped with the central line of the pressing ring, the wafer is arranged on the upper end face of the cross rod, and the pressing ring can fix the corners of the wafer to prevent the edges from being warped.

Compared with the prior art, the invention has the beneficial effects that:

in the invention, when the contact pin at the bottom end of the chip module is inserted into the TSV hole and the lower end face of the contact pin is connected with the welding pad, the contact pin can be further connected with the metal layer, the connection area of the contact pin is increased, the information transmission of the contact pin is more stable, when the contact pin is welded in the TSV hole through the soldering tin layer, the contact pin is stably connected with the welding pad and the metal layer, the wafer can be fixed on the surface of the cross rod by the pressure plate on the surface of the wafer, the outer side of the wafer is pressed at the same time, the wafer is prevented from warping and bending, and in the process of pasting the module on the wafer, the wafer can be prevented from displacing and affecting the alignment operation of the photoetching step.

Drawings

FIG. 1 is a schematic diagram of a fan-out package wafer;

FIG. 2 is a schematic view of a cross section of a wafer according to the present invention;

FIG. 3 is an enlarged schematic view of the structure at A in FIG. 2;

FIG. 4 is a schematic view of the structure of the wafer and the cross bar of the present invention;

FIG. 5 is a schematic perspective view of the telescopic outer plate according to the present invention;

fig. 6 is a schematic structural view of the pressure ring of the present invention.

In the figure: 1. a wafer; 101. a substrate; 102. cutting a zone; 103. a wiring layer; 104. TSV holes; 105. a pad; 106. a metal layer; 107. a chip module; 108. a contact pin; 109. a solder layer; 110. A protective layer; 111. an insulating layer; 2. a warpage prevention assembly; 201. a cross bar; 202. a connecting rod; 203. a groove; 204. a threaded hole; 205. pressing a ring; 206. a connecting plate; 207. and (4) bolts.

Detailed Description

In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like, indicate orientations and positional relationships based on those shown in the drawings, and are used only for convenience in describing the present invention and for simplicity in description, and do not indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and thus, are not to be construed as limiting the present invention. Furthermore, the terms "first", "second", etc. are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first," "second," etc. may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless otherwise specified.

In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be connected internally or indirectly. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art through specific situations.

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Example 1

Referring to fig. 1-6, in an embodiment of the present invention, a fan-out type package wafer includes a wafer 1 and a warpage preventing component 2, the wafer 1 is disposed in the warpage preventing component 2, the wafer 1 is formed by combining a substrate 101 and cutting area channels 102, the cutting area channels 102 are disposed on two sides of the wafer 1, the wafer 1 and the cutting area channels 102 form an integrated connection, and a press ring 205 is movably connected to a surface of the wafer 1; the lower end face of a substrate 101 is provided with a wiring layer 103, two sides of the substrate 101 are symmetrically provided with TSV holes 104, the lower end face of the TSV hole 104 is connected with a bonding pad 105 arranged in the wiring layer 103, the inner cavity surface of the TSV hole 104 is provided with a metal layer 106, the upper end face of the substrate 101 is provided with a chip module 107, two sides of the lower end face of the chip module 107 are symmetrically provided with contact pins 108, the contact pins 108 are movably connected with the interior of the TSV hole 104, a soldering tin layer 109 is arranged between the TSV hole 104 and the surface of the metal layer 106, the upper end face of the substrate 101 is provided with a protective layer 110, the lower end face of the wiring layer 103 is provided with an insulating layer 111, the metal layer 106 is connected with the upper end face of the bonding pad 105, the TSV hole 104 is overlapped with the central line of the bonding pad 105, the contact pins 108 are connected with the bonding pad 105, the protective layer 110 is simultaneously arranged on the upper end faces of a cutting zone 102 and the chip module 107, the insulating layer 111 is arranged on the lower end face of the cutting zone 102, and the wiring layer 103 has the same area as the substrate 101, the wiring layer 103 is overlapped with the central line of the substrate 101, and the protective layer 110 and the insulating layer 111 at the upper end and the lower end of the wafer 1 are made of plastic packaging materials, so that a chip can be packaged, the wiring layer 103 is isolated and protected, and the situation that the internal wiring is exposed and even broken due to friction of the wiring layer 103 is prevented.

Example 2

Referring to fig. 4 to 6, the difference from embodiment 1 is: the warp-proof component 2 is formed by combining a plurality of cross rods 201 and a plurality of connecting rods 202, grooves 203 are symmetrically formed in two ends of the cross rods 201, the grooves 203 are movably sleeved with the surfaces of the connecting rods 202, threaded holes 204 formed in the cross rods 201 are symmetrically formed in two sides of the grooves 203, a plurality of connecting plates 206 are arranged on the peripheries of two sides of a pressing ring 205, bolts 207 in threaded connection with the threaded holes 204 are arranged in the connecting plates 206, the wafer 1 is overlapped with the center line of the pressing ring 205, the wafer 1 is arranged on the upper end face of the cross rods 201, the size of the pressing ring 205 is moderate, when the edge of the wafer 1 is pressed, the clamping ring 205 cannot contact with a module mounting area of the wafer 1, the wafer 1 can be processed by the pressing ring 205, abrasion cannot occur on a worktable, the insulating layer 111 of the wafer 1 can be prevented by the cross rods 201 from being abraded, and warping and the wafer 1 can be prevented from being warped, And (4) bending.

The working principle of the invention is as follows: firstly, two connecting rods 202 are sleeved in the grooves 203 and connected with two cross rods 201 for installation, then a wafer 1 is placed on the surface of the cross rod 201 and placed in the middle, a pressing ring 205 is sleeved on the outer side of the surface of the wafer 1, a bolt 207 is manually penetrated through the connecting plate 206 and connected with a threaded hole 204 formed in the surface of the cross rod 201 for installation, the pressing ring 205 is fixed on the surface of the cross rod 201, meanwhile, the pressing ring 205 fixes the wafer 1 on the surface of the cross rod 201, and then chip bonding operation is carried out;

when the chip module 107 is attached, the solder ball is heated to form a solder liquid, the solder liquid enters the TSV hole 104, the contact pin 108 at the bottom end of the chip module 107 passes through the TSV hole 104, the lower end surface of the contact pin 108 is connected with the pad 105, the solder liquid solidifies into a solder layer 109, the contact pin 108 is fixed in the TSV hole 104 and is stably connected with the pad 105, the upper end surface of the substrate 101 is coated with the protective layer 110, the protective layer 110 simultaneously wraps the chip module 107 and the upper end surface of the cutting zone 102, the bottom end of the wiring layer 103 is coated with the insulating layer 111, the insulating layer 111 simultaneously wraps the wiring layer 103 and the lower end surface of the cutting zone 102, and the cutting zone 102 is cut by a cutting device to form the wafer 1 into a wafer module, so that the working principle of the invention is completed.

It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.

Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description of the embodiments is for clarity only, and those skilled in the art should make the description as a whole, and the embodiments may be combined as appropriate to form other embodiments understood by those skilled in the art.