阅读说明：本技术 功率半导体模块和用于制造功率半导体模块的方法 (Power semiconductor module and method for producing a power semiconductor module ) 是由 M·路德维希 于 2021-05-13 设计创作，主要内容包括：一种功率半导体模块,包括：至少一个半导体衬底(10),至少一个半导体衬底(10)包括电介质绝缘层(11)和附接到电介质绝缘层(11)的第一金属化层(111)；至少一个半导体主体(20),至少一个半导体主体(20)布置在第一金属化层(111)上；至少一个端部停止元件(48),其中,每个端部停止元件(48)布置在半导体衬底(10)上或至少一个半导体主体(20)中的一个半导体主体(20)上,并且在垂直于半导体衬底(10)的顶表面的垂直方向(y)上从半导体衬底(10)或相应半导体主体(20)延伸；以及至少部分地包围半导体衬底(10)的外壳,外壳包括侧壁(42)和盖(44)。外壳还包括至少一个压接销(46),至少一个压接销中的每一个从外壳的盖(44)朝向至少一个端部停止元件(48)中的一个端部停止元件(48)延伸,并且在相应端部停止元件(48)上施加压力。(A power semiconductor module comprising: at least one semiconductor substrate (10), the at least one semiconductor substrate (10) comprising a dielectric insulation layer (11) and a first metallization layer (111) attached to the dielectric insulation layer (11); at least one semiconductor body (20), the at least one semiconductor body (20) being arranged on the first metallization layer (111); at least one end stop element (48), wherein each end stop element (48) is arranged on the semiconductor substrate (10) or on one semiconductor body (20) of the at least one semiconductor body (20) and extends from the semiconductor substrate (10) or the respective semiconductor body (20) in a vertical direction (y) perpendicular to a top surface of the semiconductor substrate (10); and a housing at least partially enclosing the semiconductor substrate (10), the housing comprising a sidewall (42) and a lid (44). The housing further includes at least one crimp pin (46), each of the at least one crimp pin extending from a cover (44) of the housing toward one (48) of the at least one end stop elements (48) and exerting pressure on the respective end stop element (48).)

1. A power semiconductor module device comprising:

at least one semiconductor substrate (10), the at least one semiconductor substrate (10) comprising a dielectric insulation layer (11) and a first metallization layer (111) attached to the dielectric insulation layer (11);

at least one semiconductor body (20), the at least one semiconductor body (20) being arranged on the first metallization layer (111);

at least one end stop element (48), wherein each end stop element (48) is arranged on the semiconductor substrate (10) or on one semiconductor body (20) of the at least one semiconductor body (20) and extends from the semiconductor substrate (10) or the respective semiconductor body (20) in a vertical direction (y) perpendicular to a top surface of the semiconductor substrate (10); and

a housing at least partially enclosing the semiconductor substrate (10), the housing comprising a sidewall (42) and a lid (44), wherein

The housing further includes at least one crimp pin (46), each of the at least one crimp pin extending from the cover (44) of the housing toward one of the at least one end stop elements (48) and exerting pressure on the respective end stop element (48).

2. Power semiconductor module arrangement according to claim 1, wherein the at least one end stop element (48) is at least partially elastic, such that the end stop element (48) is compressed in order to limit the pressure exerted on the semiconductor substrate (10) or on the respective semiconductor body (20) when the pressure exerted by the respective crimping pin (46) on the end stop element (48) exceeds a predefined threshold.

3. The power semiconductor module arrangement according to claim 1 or 2, further comprising a casting compound (5), the casting compound (5) covering the semiconductor substrate (10) and partially filling the housing, wherein:

the casting compound (5) has a thickness (h5) in the vertical direction (y), and

the end stop element (48) has a height (h48) in the vertical direction (y) that is greater than the thickness (h5) of the casting compound (5) such that a top surface of the end stop element (48) facing away from the semiconductor substrate (10) or the semiconductor body (20) is not covered by the casting compound (5).

4. The power semiconductor module arrangement according to claim 3, wherein the at least one end stop element (48) comprises a solid body surrounded by the casting compound (5).

5. The power semiconductor module arrangement according to claim 3, wherein the at least one end stop element (48) comprises a frame surrounding a hollow space or cavity, wherein the casting compound (5) surrounds the frame and at least partially fills the hollow space or cavity.

6. Power semiconductor module arrangement according to any of the preceding claims, wherein the end stop elements (48) are soldered or sintered on the semiconductor substrate (10) or the respective semiconductor body (20).

7. The power semiconductor module arrangement according to any of the preceding claims, wherein:

at least one of the end stop elements (48) comprises an electrically conductive material;

the crimp pin (46) directly abutting the at least one end stop element (48) comprises an electrically conductive material; and is

The at least one end stop element (48) and the corresponding crimp pin (46) form an electrical connection configured to electrically couple two semiconductor bodies (20) or to electrically couple the semiconductor substrate (10) or semiconductor body (20) to an exterior of the housing.

8. The power semiconductor module arrangement according to any one of the preceding claims, wherein the at least one end stop element (48) comprises metal.

9. Power semiconductor module arrangement according to any of the preceding claims, wherein the crimping pin (46) is integrally formed with the cover (44) of the housing.

10. Power semiconductor module arrangement according to any of the preceding claims, wherein the crimping pin (46) does not directly abut the casting compound (5).

11. A method for manufacturing a power semiconductor module device, the method comprising:

-arranging at least one semiconductor body (20) on a semiconductor substrate (10), the semiconductor substrate (10) comprising a dielectric insulation layer (11) and a first metallization layer (111) attached to the dielectric insulation layer (11);

-arranging at least one end stop element (48) on the semiconductor substrate (10) or on one of the at least one semiconductor body (20) such that each of the at least one end stop elements (48) extends from the semiconductor substrate (10) or the respective semiconductor body (20) in a vertical direction (y) perpendicular to a top surface of the semiconductor substrate (10);

-arranging the semiconductor substrate (10) in a housing with a lid (44) of the housing open;

forming a layer of casting compound (5) such that the layer of casting compound (5) covers the semiconductor substrate (10) and partially fills the enclosure, wherein

The casting compound (5) has a thickness (h5) in the vertical direction (y), and

the end stop element (48) having a height (h48) in the vertical direction (y) that is greater than the thickness (h5) of the casting compound (5) such that a top surface of the end stop element (48) facing away from the semiconductor substrate (10) or the semiconductor body (20) is not covered by the casting compound (5),

after forming the layer of casting compound (5), arranging a cover (44) on the side wall (42), thereby closing the housing, wherein:

the housing comprises at least one crimping pin (46), each of which extends from the cover (44) of the housing towards one (48) of the at least one end stop elements (48), thereby exerting a pressure on the respective end stop element (48) when the cover (44) is arranged in a final mounting position of the cover (44).

12. The method of claim 11, wherein forming the layer of casting compound (5) comprises:

-forming a preformed layer of a liquid or gel-like casting compound (5) on said semiconductor substrate (10); and

a heating step is performed, thereby substantially removing liquid from the pre-form layer and hardening the pre-form layer.

13. The method of claim 12, wherein the heating step is performed after forming the pre-form layer and before disposing the cover (44) on the sidewall (42).

14. The method of claim 12, wherein the heating step is performed after forming the pre-form layer and after disposing the cover (44) on the sidewall (42).

Technical Field

The present disclosure relates to a power semiconductor module and a method for manufacturing such a power semiconductor module.

Background

Power semiconductor modules often include a semiconductor substrate disposed in a housing. A semiconductor arrangement comprising a plurality of controllable semiconductor elements (e.g. two IGBTs in a half-bridge configuration) may be arranged on the substrate. The substrate generally includes a substrate layer (e.g., a ceramic layer), a first metallization layer deposited on a first side of the substrate layer, and a second metallization layer deposited on a second side of the substrate layer. For example, the controllable semiconductor element is mounted on a first metallization layer. The second metallization layer may be attached to a ground surface of the heat sink or the housing. The controllable semiconductor devices are typically mounted on the semiconductor substrate by soldering or sintering techniques.

The cover of the housing is often used to exert a force on the substrate such that the substrate presses against the heat sink or the ground surface of the housing, respectively. In this way, a thermal resistance between the substrate and the heat sink or ground surface can be achieved. However, assembling such semiconductor module devices is often cumbersome and there is a risk that the stability of the housing is reduced during the assembly process, which may reduce the overall lifetime of the semiconductor module device.

There is a need for a semiconductor module arrangement that provides good thermal resistance between the substrate and the ground surface of the heat sink or housing, is easy to assemble, and has an increased lifetime.

Disclosure of Invention

A power semiconductor module device comprising: at least one semiconductor substrate comprising a dielectric insulating layer and a first metallization layer attached to the dielectric insulating layer; at least one semiconductor body disposed on the first metallization layer; at least one end stop element, wherein each end stop element is arranged on the semiconductor substrate or one of the at least one semiconductor body and extends from the semiconductor substrate or the respective semiconductor body in a vertical direction perpendicular to a top surface of the semiconductor substrate; and a housing at least partially enclosing the semiconductor substrate, the housing including a sidewall and a lid. The housing further includes at least one crimp pin, each of the at least one crimp pin extending from the cover of the housing toward one of the at least one end stop element and exerting pressure on the respective end stop element.

A method for manufacturing a power semiconductor module apparatus, comprising: disposing at least one semiconductor body on a semiconductor substrate, the semiconductor substrate comprising a dielectric insulating layer and a first metallization layer attached to the dielectric insulating layer; disposing at least one end stop element on the semiconductor substrate or on one of the at least one semiconductor body such that each of the at least one end stop elements extends from the semiconductor substrate or the respective semiconductor body in a vertical direction perpendicular to a top surface of the semiconductor substrate; disposing the semiconductor substrate in the case with a lid of the case opened; the casting compound layer is formed such that the casting compound layer covers the semiconductor substrate and partially fills the housing. The casting compound has a thickness in the vertical direction and the end stop elements have a height in the vertical direction that is greater than the thickness of the casting compound such that a top surface of the end stop elements facing away from the semiconductor substrate or semiconductor body is not covered by the casting compound. After the casting compound layer is formed, a cover is disposed on the side wall, thereby closing the housing. The housing comprises at least one crimping pin, each of the at least one crimping pin extending from the cover of the housing towards one of the at least one end stop element, whereby a pressure is exerted on the respective end stop element when the cover is arranged in a final mounting position of the cover.

The invention can be better understood with reference to the following drawings and description. The components in the figures are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the invention. Moreover, in the figures, like reference numerals designate corresponding parts throughout the different views.

Drawings

Fig. 1 is a cross-sectional view of an example of a power semiconductor module arrangement.

Fig. 2 is a cross-sectional view of another example of a power semiconductor module arrangement.

Fig. 3 is a cross-sectional view of another example of a power semiconductor module arrangement.

Fig. 4 is a cross-sectional view of another example of a power semiconductor module arrangement.

Fig. 5 is a cross-sectional view of another example of a power semiconductor module arrangement.

Fig. 6, which includes fig. 6A and 6B, shows two different views of an end stop element according to an example.

Fig. 7 is a three-dimensional view of an end stop element according to another example.

Detailed Description

In the following detailed description, reference is made to the accompanying drawings. The drawings show specific examples in which the invention may be practiced. It should be understood that the features and principles described with respect to the various examples may be combined with each other, unless specifically noted otherwise. In the description and claims, the designation of certain elements as "first element", "second element", "third element", etc., should not be construed as exemplary. Rather, such designations are used only to address different "elements". That is, for example, the presence of "third element" does not require the presence of "first element" and "second element". The wire or electrical connection as described herein may be a single conductive element or comprise at least two separate conductive elements connected in series and/or parallel. The wires and electrical connections may comprise metallic and/or semiconducting materials and may be permanently conductive (i.e., non-switchable). The semiconductor bodies described herein may be made of (doped) semiconductor material and may be or be comprised in a semiconductor chip. The semiconductor body has electrical connection pads and comprises at least one semiconductor element with electrodes.

Referring to fig. 1, a cross-sectional view of an exemplary power semiconductor module is shown. The power semiconductor module includes a housing and a semiconductor substrate 10. The semiconductor substrate 10 comprises a dielectric insulation layer 11, a (structured) first metallization layer 111 attached to the dielectric insulation layer 11 and a (structured) second metallization layer 112 attached to the dielectric insulation layer 11. The dielectric insulating layer 11 is disposed between the first metallization layer 111 and the second metallization layer 112. However, it is also possible that the semiconductor substrate 10 only comprises the first metallization layer 111, while the second metallization layer 112 is omitted.

Each of the first and second metallization layers 111, 112 may consist of or comprise one of the following materials: copper; a copper alloy; aluminum; an aluminum alloy; any other metal or alloy that remains in a solid state during operation of the power semiconductor module arrangement. The semiconductor substrate 10 may be a ceramic substrate, i.e., a substrate in which the dielectric insulating layer 11 is a ceramic (e.g., a thin ceramic layer). The ceramic may consist of or comprise one of the following materials: alumina; aluminum nitride; zirconium oxide; silicon nitride; boron nitride; or any other dielectric ceramic. For example, the dielectric insulating layer 11 may be composed of or include one of the following materials: al (Al)₂O₃AlN, SiC, BeO or Si₃N₄. For example, the substrate 10 may be, for example, a Direct Copper Bonded (DCB) substrate, a Direct Aluminum Bonded (DAB) substrate, or an Active Metal Brazing (AMB) substrate. Further, the substrate 10 may be an Insulating Metal Substrate (IMS). For example, an insulated metal substrate typically comprises a dielectric insulation layer 11, the dielectric insulation layer 11 comprising a (filled) material (e.g. epoxy or polyimide). For example, the material of the dielectric insulating layer 11 may be filled with ceramic particles. Such particles may comprise, for example, Si₂O、Al₂O₃AlN or BN, and may have a diameter between about 1 μm and about 50 μm. The substrate 10 may also be a conventional Printed Circuit Board (PCB) with a non-ceramic dielectric insulating layer 11. For example, the non-ceramic dielectric insulating layer 11 may be composed of or include a cured resin.

The semiconductor substrate 10 is arranged in a housing. In the example shown in fig. 1, a semiconductor substrate 10 is arranged on a ground surface 12 of the housing. The housing also includes a sidewall 42 and a cover 44. However, in other examples, the ground surface 12 of the housing may be omitted. In such a case, the semiconductor substrate 10 itself may form a ground surface of the housing. In such a case, for example, the semiconductor substrate 10 may be disposed on a heat sink. In the example in fig. 1, only one semiconductor substrate 10 is arranged on the ground surface 12. In some power semiconductor module devices, more than one semiconductor substrate 10 may be arranged in a single housing. For example, the ground surface 12, the side walls 42, and the cover 44 may comprise a metal or metal alloy. However, for example, it is also possible that the ground surface 12, the side walls 42 and the cover 44 comprise an electrically insulating material (e.g., a plastic or ceramic material). For example, the housing may also include a liquid crystal polymer.

The semiconductor substrate 10 may be connected to a ground surface 12 through a connection layer (not specifically shown in fig. 1). Such a connection layer may be, for example, a solder layer, a binder material layer, or a sintered metal powder (e.g., sintered silver powder) layer. Any other kind of conductive or non-conductive connection layer is also possible.

One or more semiconductor bodies 20 may be arranged on the semiconductor substrate 10. Each of the semiconductor bodies 20 arranged on the semiconductor substrate 10 may comprise a diode, an IGBT (insulated gate bipolar transistor), a MOSFET (metal oxide semiconductor field effect transistor), a JFET (junction field effect transistor), a HEMT (high electron mobility transistor) or any other suitable controllable semiconductor element.

One or more semiconductor bodies 20 may form a semiconductor device on the semiconductor substrate 10. In fig. 1, only two semiconductor bodies 20 are shown by way of example. The second metallization layer 112 of the semiconductor substrate 10 in fig. 1 is a continuous layer. The first metallization layer 111 of the example in fig. 1 is also a continuous layer. However, the first metallization layer 111, the second metallization layer 112, or both may also be structured layers. By "structured layer" is meant, for example, that the respective metallization layer 111, 112 is not a continuous layer, but comprises recesses between different sections of the layer. Different semiconductor bodies 20 may be mounted to the same section or to different sections of the first metallization layer 111. Different segments of the first metallization layer 111 may have no electrical connections or may be electrically connected to one or more other segments using, for example, bonding wires. For example, the electrical connection may also include a connection plate or conductor rail, to name a few. The one or more semiconductor bodies 20 may be electrically and mechanically connected to the semiconductor substrate 10 by a conductive connection layer 22. Such a conductive connection layer 22 may be, for example, a solder layer, a conductive adhesive layer, or a sintered metal powder (e.g., sintered silver powder) layer.

The power semiconductor module further comprises a terminal element 30. The terminal element 30 is electrically connected to the semiconductor substrate 10, for example, to the first metallization layer 111 of the semiconductor substrate 10, and forms a contact element providing an electrical connection between the inside and the outside of the housing. The first end of the terminal element 30 may be electrically and mechanically connected to the first metallization layer 111 by means of an electrically conductive connection layer (not specifically shown). Such a conductive connection layer may be, for example, a solder layer, a conductive adhesive layer, or a sintered metal powder (e.g., sintered silver powder) layer. The second end of the terminal element 30 protrudes outside the housing to allow electrical contact to the contact element from the outside. The cover 44 of the housing may comprise an opening through which the terminal element 30 may protrude such that a first side of the terminal element 30 is inside the housing and a second side of the terminal element 30 is outside the housing. When the housing is arranged to surround the semiconductor substrate 10, the terminal element 30 may vertically protrude out of the housing. According to another example, the terminal element 30 may also protrude horizontally through the side wall 42 of the housing.

The power semiconductor module may also comprise a casting compound 5, as shown in the example of fig. 2. For example, the casting compound 5 may consist of or comprise a silicone gel, or may be a rigid molding compound. The casting compound 5 may partially fill the interior of the housing, thereby covering the semiconductor substrate 10 and the semiconductor body 20 as well as any other components and electrical connections 24 arranged on the semiconductor substrate 10. Electrical connections 24 (e.g., bonding wires or bonding ribbons) may electrically couple the semiconductor body 20 to the first metallization layer 111, to other semiconductor bodies 20, or to any other component that may be disposed inside the housing. The terminal element 30 may be partially embedded in the casting compound 5. However, at least the second end of the terminal element 30 may not be covered by the casting compound 5 and may protrude from the casting compound 5. The casting compound 5 is configured to protect components and electrical connections inside the power semiconductor module arrangement, in particular inside the housing, from certain environmental conditions, mechanical damage and insulation faults.

The side wall 42 of the housing may be mechanically connected to the semiconductor substrate 10, typically by means of a joint (not specifically shown in the drawings). For example, the joint may be a solder joint, a cold solder joint, or an adhesive joint. Any other suitable joint may also mechanically connect the side wall 42 of the enclosure to the semiconductor substrate, the joint also providing a suitable seal so that no or at least less gas may enter the enclosure. The side wall 42 and ground surface 12 may also be provided as a single piece (not specifically shown). This means that there is no joint between the side wall 42 of the housing and the ground surface 12.

The semiconductor module arrangement further comprises end stop elements 48. For example, the end stop element 48 is disposed on the semiconductor substrate 10. In the figures, the end stop elements are shown arranged at a distance from the different semiconductor bodies 20. However, this is merely an example. In other examples, the end stop element 48 may be disposed adjacent at least one of the semiconductor bodies 20. In this context, nearby means distances shorter than, for example, 5mm, 3mm or 2 mm. According to another example, the end stop element 48 is arranged on the semiconductor body 20 instead of on the semiconductor substrate 10. If the end stop elements 48 are arranged on the semiconductor bodies 20, the respective semiconductor body 20 is arranged between the end stop element 48 and the semiconductor substrate 10.

When the semiconductor module device is completely assembled, the semiconductor substrate 10 is pressed against the ground surface 12 of the housing so as to reduce the thermal resistance between the semiconductor substrate 10 and the ground surface 12. Even further, it is possible to hold the semiconductor substrate 10 in a desired position and prevent the semiconductor substrate 10 from moving inside the housing. The crimp pin 46 is coupled to the cover 44 of the housing or is integrally formed with the cover 44 of the housing. The crimp pin 46 may be coupled to the housing in any suitable manner. For example, the crimp pin 46 may be coupled to the housing by an adhesive bond or a screw or bolt connection. When the cover 44 is disposed on the side wall 42 to close the housing, the crimp pin 46 contacts the end stop element 48 and exerts pressure on the end stop element 48. Whereas the semiconductor module arrangement shown in fig. 1 and 2 shows the cover 44 still partially open, fig. 3 shows an example of the semiconductor module arrangement in the final mounting position (cover fully closed). The thick arrows in the drawings show the direction of movement of the cover 44 and the crimp pin 46 when closing the housing, and the direction of the pressure applied to the end stop element 48 once the housing is fully closed.

The semiconductor module device shown in fig. 1 does not include the casting compound 5. However, the casting compound is shown in the examples of fig. 2 to 5. When the semiconductor module arrangement comprises a casting compound 5, the end stop elements 48 are mostly molded in the casting compound 5. However, a second end of the end stop element 48 facing away from the semiconductor substrate 10 or the semiconductor body 20 (the end stop element 48 is mounted on the semiconductor substrate 10 or the semiconductor body 20) protrudes from the casting compound 5. Thus, the top surface of the end stop element 48 facing away from the semiconductor substrate 10 or the semiconductor body 20 (the end stop element 48 is mounted on the semiconductor substrate 10 or the semiconductor body 20) is not covered by the casting compound 5. In this way, the top surface can be easily contacted by the crimp pin 46 even if the casting compound 5 has been formed. Then, the crimping pins 46 contact the top surface of the end stop element 48 (instead of the casting compound 5) and exert pressure on the top surface, thereby pressing the end stop element 48 against the semiconductor substrate 10 (or the semiconductor body 20) and subsequently pressing the semiconductor substrate 10 against the ground surface 12 of the housing. This allows the casting compound 5 to be formed even before the housing is fully enclosed, i.e. before the cover 44 is arranged on the side wall 42.

The casting compound 5 may be formed when the sidewalls 42 have been arranged around the semiconductor substrate 10. The casting compound 5 is generally formed by forming a liquid or gel-like preform. The side walls 42 prevent the material of the preformed layer from inadvertently diffusing. This may be followed by a heating step during which the liquid present in the pre-manufactured layer is at least partially evaporated. In this way, the pre-cast layer is hardened to form the resulting casting compound 5. Such a heating step may be performed before the cover 44 is disposed on the side wall 42, or alternatively, the heating step may be performed after the cover 44 is mounted on the side wall 42. When the heating step is performed prior to mounting the cover 44 on the sidewall 42, the cover 44 need not be exposed to the heat applied during the heating step. This may increase the overall life of the cap 44, and thus the overall life of the entire semiconductor module arrangement, since the material of the cap 44 is not brittle or fragile due to exposure to heat.

For example, the end stop element 48 may comprise a solid body. That is, end stop element 48 may comprise a main body formed entirely of a solid block of suitable material. According to an example, the end stop element 48 may comprise a pin or a cuboid having an angled or rounded cross-section. The casting compound 5 may then surround the end stop element 48. However, since the end stop element 48 does not have any cavity or hole, the casting compound 5 cannot intrude into the end stop element 48. However, according to another example, the end stop element 48 may comprise at least one cavity or hole, such that the casting compound 5 may at least partially fill the cavity or hole. This will be described in further detail below with reference to fig. 6 and 7.

In the example shown in fig. 1 and 2, the side wall 42 of the housing is coupled to the semiconductor substrate 10, and the semiconductor substrate 10 is disposed on the ground surface 12 of the housing. In these examples, the cover 44 includes a top portion that covers the opening formed by the side walls 42 and side portions that extend perpendicular to the top portion and parallel to the side walls 42 of the housing when the cover 44 is disposed on the semiconductor substrate. The side portions of the cover 44 extend from the top portion toward the ground surface 12. The side portions may even contact the ground surface 12 when the semiconductor module device is fully assembled. For example, the side portions may be permanently coupled to the ground surface 12 to secure the cover 44 in place and prevent the cover 44 from moving or even falling out. For example, the cover 44 may be welded or glued to the ground surface 12.

However, this is merely an example. As exemplarily shown in fig. 3, it is also possible that the cover 44 is only permanently attached to the side wall 42 of the housing. The cover 44 may be glued to the side wall 42 or may be attached to the side wall by any suitable mechanical fastening mechanism. In the example shown in fig. 3, the cover 44 comprises a protrusion which engages with a corresponding counterpart provided in the side wall 42.

The example shown in fig. 5 is somewhat similar to the examples shown in fig. 1 and 2. However, in the example of fig. 5, the side portion of the cover 44 includes a protrusion having a threaded hole 54. The ground surface 12 may also include a threaded hole 54. In this example, the cover 44 may be attached to the ground surface 12 by screws or bolts 52 inserted into threaded holes 54. However, any other way of permanently mounting the cover 44 to the side wall 42 is also possible.

In the example shown in fig. 1, 2 and 3, the semiconductor module arrangement comprises only one end stop element 48 and one corresponding crimping pin 46 attached to the cover 44. However, this is merely an example. As shown in fig. 4 and 5, the semiconductor module arrangement may also comprise more than one end stop element 48 and more than one corresponding crimping pin 46. In the example shown in fig. 4 and 5, the semiconductor module arrangement comprises three end stop elements 48 and three crimping pins 46. However, any number n (where. n ≧ 1) of end stop elements 48 and crimp pins 46 are generally possible. When more than one end stop element 48 and more than one corresponding crimp pin 46 are provided, the pressure exerted on the semiconductor substrate 10 may be more evenly distributed over the semiconductor substrate 10. However, a greater number of end stop elements 48 and crimp pins 46 increases space requirements.

The end stop member 48 may be formed of a rigid material. However, there is a risk that the pressure exerted on the semiconductor substrate 10 or the semiconductor body 20 (on which the end stop element 48 is mounted on the semiconductor substrate 10 or the semiconductor body 20) becomes excessively high. This may damage the semiconductor body 20 and/or the semiconductor substrate 10. Thus, the end stop elements 48 may be at least partially elastic, such that when the pressure applied to the end stop elements 48 by the respective crimping pins 46 exceeds a predefined threshold, the end stop elements 48 are compressed in order to limit the pressure exerted on the semiconductor substrate 10 or on the semiconductor body 20. That is, as the crimp pin 46 exerts pressure on the end stop element 48, the end stop element 48 retains its original form as long as the pressure is below a certain threshold. Once the pressure exceeds the threshold, the end stop element 48 is compressed to some extent and changes from its original form to a compressed form.

According to one example, the end stop element 48 comprises a material that is stable up to a certain point but compresses when the pressure exceeds a certain threshold. The threshold value depends on the type of material used to form the end stop element 48. Once the pressure is released, some materials remain in a compressed form, others return to their original form after the pressure is released. According to another example, the compression of the end stop element 48 may be caused by the structural shape of the end stop element 48. That is, the material of end stop member 48 may be incompressible by itself. However, the end stop element 48 may bend or distort to some extent under pressure.

One example of such an end stop element 48 is schematically illustrated in fig. 6, where fig. 6A and 6B show views of the end stop element 48 from different sides. The end stop element 48 shown in fig. 6 comprises a frame surrounding a cavity or hollow space. The frame in the example shown in fig. 6 has a generally trapezoidal shape. That is, when the semiconductor module is completely assembled, the top surface of the end stop element 48 that is in contact with the crimping pin 46 has a length l2 in the first horizontal direction x, the length l2 being shorter than the length l1 of the lower surface. The lower surface of the end stop element 48 is the surface attached to the semiconductor substrate 10 or the semiconductor body 20. As shown in fig. 6A, the lower surface may not be a continuous surface, but may include a depression such that the lower surface is formed of two separate portions. Each of the two separate portions of the lower surface may be coupled to a different one of two side sections of the end stop element 48 that couple the top surface to the portions of the lower surface. In the side view shown in fig. 6A, the cavity or hollow space is visible. The side view shown in fig. 6B shows a side view of one of the side sections. The side section may have a width w in a second horizontal direction z perpendicular to the first horizontal direction x. For example, the width w of the side section may be between 1mm and 5 mm. According to one example, the width w of the side section is 1.5 mm. For example, the end stop element 48 may have a height h48 of between 2.5mm and 6 mm. For example, the length l2 of the top surface may be between 0.8mm and 2mm, and the length l1 of the lower surface may be between 1.5mm and 4mm, for example. However, these dimensions are merely examples. The size of the end stop element 48 generally depends on the size of the semiconductor module arrangement. For example, the height h48 of the end stop element 48 may be higher than the height h5 of the casting compound 5 formed in the housing such that the top surface of the end stop element 48 is not covered by the casting compound 5.

The structural shape of the end stop element 48 shown in fig. 6 allows the end stop element 48 to bend or twist when the pressure exerted on the top surface exceeds a certain threshold. However, bending may occur mainly in those sections of the end stop element 48 which are arranged above the casting compound 5 and which are not covered by the casting compound 5. Since the casting compound 5 is hardened during the process of assembling the semiconductor module arrangement, the casting compound 5 itself is not deformed at all or is deformed only to a very limited extent. Damage to the casting compound 5 should be avoided in order to ensure that the semiconductor substrate 10 and the components mounted on the semiconductor substrate 10 are still adequately protected by the casting compound 5.

Referring now to fig. 7, another example of an end stop element 48 is schematically illustrated. In the example shown in fig. 7, the length l2 of the top surface is greater than the length l1 of the lower surface. The frame of the end stop element 48 forms a lower portion surrounding the cavity or hollow space, and an upper portion that bends so as to rest on the lower portion. The top surface is connected to the lower part on one side only, while the second side stays free air. In this way, the top surface is maintained in a spring pattern so that the top surface may bend towards the semiconductor substrate 10 when the pressure exerted on the top surface exceeds a certain threshold. However, the specific form shown in fig. 7 is just another example. Any other form of end stop element 48 exhibiting the above-described characteristics is generally possible.

The at least one end stop element 48 may comprise an electrically insulating material. However, according to another example, it is also possible that the at least one end stop element 48 comprises an electrically conductive material. The at least one crimp pin 46 may also comprise an electrically conductive material. In this way, the at least one end stop element 48 and the corresponding crimp pin 46 may form a contact element providing an electrical connection between the interior and the exterior of the housing. The crimp pin 46 may be electrically coupled to the exterior of the housing in any suitable manner, for example, to allow contact between the crimp pin 46 and the end stop element 48 from the exterior of the housing. Alternatively or additionally, it is also possible to form an internal electrical connection by means of the end stop element 48 and the crimping pin 46. For example, the crimp pin 46 and the end stop element 48 may replace at least some of the terminal elements 30. It is also possible that only some but not all of the end stop elements 48 and the crimp pins 46 are used as terminal elements, while the other crimp pins 46 and the end stop elements 48 are electrically insulated and not used as terminal elements.

As schematically shown in dashed lines in fig. 6B, the side sections of the end stop element 48 may comprise recesses 480, such that each side section comprises two separate contact surfaces 481, 482. Each of the contact surfaces 481, 482 may be mechanically and electrically coupled to the semiconductor substrate 10 or the semiconductor body 20. Thus, one end stop element 48 may comprise four contact surfaces, only two of which are visible in the side view in fig. 6B, whereby the second side section and the third and fourth contact surfaces are hidden by the first side section, which is visible in fig. 6B.