阅读说明：本技术 一种反折弯内绝缘产品的封装结构 (Packaging structure of reverse-bending internal insulation product ) 是由 梅宇峰 黄达鹏 于 2020-12-30 设计创作，主要内容包括：本发明公开的属于半导体TO系列封装技术领域,具体为一种反折弯内绝缘产品的封装结构,其技术方案是：包括散热片、环氧料胶体、芯片、氧化铝基板、框架引脚,所述散热片上方设有焊带三,所述焊带三上方设有所述氧化铝基板,所述氧化铝基板上方设有焊带二,所述焊带二上设有所述框架引脚,所述框架引脚上方设有焊带一,本发明的有益效果是：氧化铝基板的设置,到将芯片和散热片绝缘,这样可以达到芯片和散热片完全绝缘,有效的使芯片的热量通过散热片散出,又能达到芯片的绝缘,第一应力释放、第二应力释放和第三应力释放的设置,使芯片在框架引脚上组装烧结可以达到完整的融化,减少芯片背面的空洞率。(The invention discloses a packaging structure of a reverse bending inner insulation product, belonging TO the technical field of semiconductor TO series packaging, and the technical scheme is as follows: the LED packaging structure comprises a radiating fin, an epoxy glue, a chip, an alumina substrate and frame pins, wherein a third welding strip is arranged above the radiating fin, the alumina substrate is arranged above the third welding strip, a second welding strip is arranged above the alumina substrate, the frame pins are arranged on the second welding strip, and the first welding strip is arranged above the frame pins, and the LED packaging structure has the beneficial effects that: the arrangement of the alumina substrate can insulate the chip and the radiating fins, so that the complete insulation of the chip and the radiating fins can be achieved, the heat of the chip can be effectively dissipated through the radiating fins, the insulation of the chip can be achieved, and the arrangement of the first stress release, the second stress release and the third stress release can enable the chip to be assembled and sintered on the frame pins to completely melt, so that the void rate of the back of the chip is reduced.)

1. The utility model provides a packaging structure of reverse bend internal insulation product, includes fin (1), epoxy colloid (3), chip (4), aluminium oxide base board (5), frame pin (6), its characterized in that: the LED packaging structure is characterized in that a third welding strip (10) is arranged above the radiating fin (1), the aluminum oxide substrate (5) is arranged above the third welding strip (10), a second welding strip (9) is arranged above the aluminum oxide substrate (5), the frame pins (6) are arranged on the second welding strip (9), a first welding strip (8) is arranged above the frame pins (6), the chip (4) is arranged above the first welding strip (8), a first bending part (61) and a first bending part (62) are arranged on the frame pins (6), and the chip (4) and the aluminum oxide substrate (5) are encapsulated by the epoxy material colloid (3).

2. The structure of claim 1, wherein the inner insulation product is formed by bending: the chip (4) and the frame leads (6) form a pole electrode (7).

3. The structure of claim 1, wherein the inner insulation product is formed by bending: the radiating fin (1) and the alumina substrate (5) are fixed and connected through the third welding strip (10).

4. The structure of claim 1, wherein the inner insulation product is formed by bending: the alumina substrate (5) and the frame pins (6) are fixed and connected through the second welding strip (9).

5. The structure of claim 1, wherein the inner insulation product is formed by bending: the frame pins (6) and the chip (4) are fixed and connected through a first welding strip (8).

6. The structure of claim 1, wherein the inner insulation product is formed by bending: the radiating fins (1) are equidistantly provided with first stress release grooves (11).

7. The structure of claim 1, wherein the inner insulation product is formed by bending: and a third stress release groove (13) is formed in the bottom of the frame pin (6), and the third stress release groove (13) is semicircular.

8. The structure of claim 1, wherein the inner insulation product is formed by bending: second stress release grooves (12) are formed in the tops of the frame pins (6) at equal intervals, and the second stress release grooves (12) are rectangular.

Technical Field

The invention relates TO the technical field of semiconductor TO series packaging, in particular TO a packaging structure of a reverse-bending internal insulation product.

Background

The semiconductor packaging refers to a process of processing a wafer passing a test according to a product model and a function requirement to obtain an independent chip; the packaging process comprises the following steps: the wafer from the previous process of the wafer is cut into small chips after scribing process, then the cut chips are pasted on the corresponding small island of the substrate (lead frame) frame by glue, and then the bonding pads of the chips are connected to the corresponding pins of the substrate by utilizing superfine metal (gold tin copper aluminum) wires or conductive resin to form the required circuit; then packaging and protecting the independent wafer by using a plastic shell, carrying out a series of operations after plastic packaging, carrying out finished product testing after packaging, generally carrying out the processes of inspection, testing, packaging and the like, and finally warehousing and shipping; the semiconductor production flow comprises wafer manufacturing, wafer testing, chip packaging and testing after packaging; after plastic packaging, a series of operations such as post-curing, rib cutting and forming, electroplating, printing and the like are carried out; the typical packaging process flow is as follows: dicing, mounting, bonding, plastic packaging, deburring, electroplating, printing, cutting ribs, molding, appearance inspection, finished product testing, packaging and shipment.

The existing TO series packaging structure of a semiconductor has the following defects: in order to ensure that the chip has good insulation, the chip is tightly wrapped, so that the heat dissipation effect of the chip is poor; in order to provide a good heat dissipation effect to the chip, the insulation of the chip is deteriorated.

Therefore, it is necessary to invent a package structure of reverse-bending internal insulation product.

Disclosure of Invention

Therefore, the invention provides a packaging structure of a reverse-bending internal insulation product, wherein a first welding strip, a second welding strip and a third welding strip of high-temperature welding flux are used for welding a radiating fin, an alumina substrate, frame pins and a chip together, and an epoxy material colloid is arranged for encapsulating the chip and the alumina substrate, so that the chip is insulated and can be well radiated, and the defects of the traditional TO series packaging structure of a semiconductor are overcome.

In order to achieve the above purpose, the invention provides the following technical scheme:

a packaging structure of a reverse-bending internal insulation product comprises a radiating fin, an epoxy material colloid, a chip, an aluminum oxide substrate and frame pins, wherein a third welding strip is arranged above the radiating fin, the aluminum oxide substrate is arranged above the third welding strip, a second welding strip is arranged above the aluminum oxide substrate, the frame pins are arranged on the second welding strip, a first welding strip is arranged above the frame pins, the chip is arranged above the first welding strip, a first bending part and a first bending part are arranged on the frame pins, and the chip and the aluminum oxide substrate are encapsulated by the epoxy material colloid.

Preferably, the chip and the frame leads constitute the pole electrodes.

Preferably, the heat sink and the alumina substrate are fixed and connected by the solder strip III.

Preferably, the alumina substrate and the frame pins are fixed and connected through the second solder strip.

Preferably, the frame pin and the chip are fixed and connected through a first solder strip.

Preferably, the heat radiating fins are equidistantly provided with first stress releasing grooves.

Preferably, the bottom of the frame pin is provided with a third stress release groove, and the third stress release groove is semicircular.

Preferably, the top of the frame pin is provided with second stress release grooves at equal intervals, and the second stress release grooves are rectangular.

The invention has the beneficial effects that:

1. the arrangement of the alumina substrate can insulate the chip and the radiating fin, so that the complete insulation of the chip and the radiating fin can be achieved, the heat of the chip can be effectively dissipated through the radiating fin, and the insulation of the chip can be achieved;

2. the first stress release, the second stress release and the third stress release are arranged, so that the chip can be completely melted after being assembled and sintered on the frame pins, and the void ratio of the back of the chip is reduced.

Drawings

FIG. 1 is a schematic structural view provided by the present invention;

FIG. 2 is an enlarged view of a portion of FIG. 1 provided in accordance with the present invention;

fig. 3 is an enlarged view of a portion a of fig. 2 according to the present invention.

In the figure: the structure comprises a radiating fin 1, an epoxy glue 3, a chip 4, an alumina substrate 5, a frame pin 6, a pole electrode 7, a first solder strip 8, a second solder strip 9, a third solder strip 10, a first stress release 11, a second stress release 12, a third stress release 13, a first bend 61 and a first bend 62.

Detailed Description

The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it will be understood that they are described herein for the purpose of illustration and explanation and not limitation.

Referring to fig. 1-3 of the specification, the package structure of the reverse-bending internal insulation product of the embodiment includes a heat sink 1, an epoxy glue 3, a chip 4, an aluminum oxide substrate 5, and frame pins 6, a solder strip three 10 is disposed above the heat sink 1, the aluminum oxide substrate 5 is disposed above the solder strip three 10, a solder strip two 9 is disposed above the aluminum oxide substrate 5, the frame pins 6 are disposed on the solder strip two 9, a solder strip one 8 is disposed above the frame pins 6, the chip 4 is disposed above the solder strip one 8, first bends 61 and first bends 62 are disposed on the frame pins 6, and the epoxy glue 3 encapsulates the chip 4 and the aluminum oxide substrate 5; the second stress relief 12 and the third stress relief 13 are used for enabling the chip 4 to be assembled and sintered on the frame pins 6 to be completely melted, and the void ratio of the back surface of the chip 4 is reduced.

Further, the chip 4 and the frame leads 6 constitute the pole electrodes 7.

Further, the heat sink 1 and the alumina substrate 5 are fixed and connected by the solder strip three 10.

Further, the alumina substrate 5 and the frame pins 6 are fixed and connected through the second solder strip 9; the alumina substrate 5 mainly serves to insulate the chip 4 from the heat sink 1, so that the chip 4 and the heat sink 1 can be completely insulated, and the heat of the chip 4 can be effectively dissipated through the heat sink 1.

Further, the frame lead 6 and the chip 4 are fixed and connected by a solder strip-8.

Further, the heat sink 1 is provided with first stress relief grooves 11 at equal distances.

Further, a third stress relief groove 13 is formed in the bottom of the frame pin 6, and the third stress relief groove 13 is semicircular.

Furthermore, second stress relief grooves 12 are formed in the top of the frame pin 6 at equal intervals, and the second stress relief grooves 12 are rectangular.

The implementation scenario is specifically as follows: when the invention is used, first stress reliefs 11 are arranged on the radiating fin 1 at equal distances, semicircular third stress reliefs 13 are arranged at equal distances at the bottom of the frame pin 6, the top of the frame pin 6 is provided with a rectangular second stress relief 12, the right end of the frame pin 6 is bent twice to form a first bending part 61 and a first bending part 62, the heat sink 1 and the alumina substrate 5 are welded together by high-temperature solder, forming a solder strip III 10 between the heat sink 1 and the alumina substrate 5, soldering the alumina substrate 5 and the frame leads 6 together using a high temperature solder, forming a second solder strip 9 between the alumina substrate 5 and the frame pins 6, soldering the chip 4 on the frame pins 6 by using high-temperature solder, a solder strip 8 is formed between the chip 4 and the frame leads 6, and finally the chip 4 and the alumina substrate 5 are encapsulated by using epoxy glue.

The above description is only a preferred embodiment of the present invention, and any person skilled in the art may modify the present invention or modify it into an equivalent technical solution by using the technical solution described above. Therefore, any simple modifications or equivalent substitutions made in accordance with the technical solution of the present invention are within the scope of the claims of the present invention.