阅读说明：本技术 一种多芯片混合封装抗发热、磁场的方法 (Method for resisting heating and magnetic field by multi-chip hybrid packaging ) 是由 李威 韩金龙 于 2020-06-09 设计创作，主要内容包括：本发明公开了一种多芯片混合封装抗发热、磁场的方法,涉及一种芯片领域,包括如下步骤：步骤一：将多个芯片贴放在载板或管壳上；步骤二：将第一胶水涂抹在载板或管壳中；步骤三：将载板或管壳放在烤箱中烘烤；步骤四：将载板或管壳放置到离子清洗机中清洗；步骤五：将步骤四中得到载板或管壳上的芯片放置到键合机的加热平台上,先将芯片和芯片之间采用自动植球,然后使用金属线进行各芯片和芯片之间的键合,最后使用金属线将芯片和载板或管壳进行电性连接；步骤六：在步骤五中得到的载板或管壳中的芯片与芯片之间使用有机环氧树脂筑起围坝；步骤七：在围坝和芯片之间填充第二胶水；步骤八：将步骤七中得到的产品放入烤箱中烘烤。(The invention discloses a method for resisting heating and magnetic fields by multi-chip hybrid packaging, which relates to the field of chips and comprises the following steps: the method comprises the following steps: attaching a plurality of chips on a carrier plate or a tube shell; step two: smearing the first glue in the carrier plate or the tube shell; step three: placing the carrier plate or the tube shell in an oven for baking; step four: placing the carrier plate or the tube shell into an ion cleaning machine for cleaning; step five: placing the chip on the carrier plate or the tube shell obtained in the fourth step on a heating platform of a bonding machine, automatically planting balls between the chip and the chip, then bonding each chip and the chip by using metal wires, and finally electrically connecting the chip and the carrier plate or the tube shell by using the metal wires; step six: building a dam by using organic epoxy resin between the chips in the carrier plate or the tube shell obtained in the step five; step seven: filling second glue between the box dam and the chip; step eight: and putting the product obtained in the seventh step into an oven for baking.)

1. A method for resisting heating and magnetic fields of a multi-chip hybrid package comprises the following steps:

the method comprises the following steps: confirming the attaching form of the chips (2) and attaching a plurality of chips (2) on a carrier plate or a tube shell (6) to obtain the carrier plate or the tube shell attached with the chips;

step two: coating the first glue (1) in the chip-attached carrier plate or the tube shell obtained in the step one to ensure that the chip (2) is attached on the carrier plate or the tube shell (6) to obtain the chip-attached carrier plate or the tube shell;

step three: placing the support plate or the tube shell which is well pasted with the glue and obtained in the step two in an oven for baking to obtain a support plate or a tube shell with solidified first glue;

step four: placing the carrier plate or the tube shell solidified by the first glue obtained in the third step into an ion cleaning machine to clean and remove foreign matters or pollute the carrier plate or the tube shell to obtain a clean carrier plate or tube shell;

step five: placing the chip (2) on the clean carrier plate or the tube shell obtained in the fourth step on a heating platform of a bonding machine, automatically planting balls between the chip and the chip, then bonding each chip and the chip by using a metal wire (4), and finally electrically connecting the chip and the carrier plate or the tube shell (6) by using the metal wire (4) to obtain an electrically connected carrier plate or tube shell;

step six: building a box dam (3) by using organic epoxy resin between the chip (2) and the carrier plate or the tube shell which is electrically connected and obtained in the step five, so as to obtain the carrier plate or the tube shell containing the box dam;

step seven: filling second glue (5) between the box dam (3) on the carrier plate or the tube shell containing the box dam obtained in the step six and the chip (2) to obtain a packaged product;

step eight: and putting the packaged product obtained in the seventh step into an oven for baking.

2. The method of claim 1, wherein the method comprises: the baking temperature in the third step is 245-255 ℃.

3. The method of claim 1, wherein the method comprises: the baking time in the third step is 60min +/-10 min.

4. The method of claim 1, wherein the method comprises: the baking temperature in the step eight is 150-155 ℃.

5. The method of claim 1, wherein the method comprises: and the baking time in the step eight is 30min +/-10 min.

Technical Field

The invention relates to the field of chips, in particular to a method for resisting heating and magnetic fields by multi-chip hybrid packaging.

Background

1) The single chip packaging function is single, the integration density is low, and if multiple functions are needed, a plurality of different packaging modules need to be adopted, so that a large area is occupied, and the size and the packaging weight are increased; 2) in order to solve the problem of insufficient integration and function of a single chip, a plurality of chips with high integration, high performance and high reliability are packaged together to achieve higher and richer functions, reduce the size and weight of a final package and a system, reduce faults, improve reliability, increase speed by using shorter and lighter-loaded signal lines and enable the system to have good thermal performance; 3) with the packaging of multiple chips in one place, the chips can be affected by heat and magnetic field.

Disclosure of Invention

The invention aims to provide a method for manufacturing a multi-chip hybrid package which has high integration level, high performance and high reliability and is free from the influence of heat and a magnetic field and is resistant to heat and the magnetic field.

The technical scheme adopted by the invention for solving the technical problems is as follows: a method for resisting heating and magnetic fields of a multi-chip hybrid package comprises the following steps:

the method comprises the following steps: confirming the attaching form of the chips and attaching a plurality of chips on a carrier plate or a tube shell to obtain the carrier plate or the tube shell attached with the chips;

step two: coating the first glue on the chip-attached carrier plate or the tube shell obtained in the step one to ensure that the chip is attached on the carrier plate or the tube shell to obtain the chip-attached carrier plate or the tube shell;

step three: placing the support plate or the tube shell which is well pasted with the glue and obtained in the step two in an oven for baking to obtain a support plate or a tube shell with solidified first glue;

step four: placing the carrier plate or the tube shell solidified by the first glue obtained in the third step into an ion cleaning machine to clean and remove foreign matters or pollute the carrier plate or the tube shell to obtain a clean carrier plate or tube shell, so that better bonding in the fifth step is facilitated;

step five: placing the chip on the clean carrier plate or the clean tube shell obtained in the fourth step on a heating platform of a bonding machine, automatically planting balls between the chip and the chip, then bonding each chip and the chip by using a metal wire, and finally electrically connecting the chip and the carrier plate or the tube shell by using the metal wire to obtain the electrically connected carrier plate or tube shell;

step six: building a dam by using organic epoxy resin between the chips in the electrically connected carrier plate or tube shell obtained in the step five to obtain the carrier plate or tube shell containing the dam, wherein the dam can play a role in separation and isolation, so that different chips are divided into different position areas, the overlong waiting period for development and development caused by overlong time and overhigh cost caused by modeling can be avoided, and the dam can absorb or block heat and magnetic field radiation among devices, so that the influence on the functionality among different chips caused by the transfer of heat and a magnetic field is avoided;

step seven: and filling second glue between the support plate containing the box dam or the box dam on the tube shell obtained in the step six and the chip to obtain a packaged product, wherein the filled second glue can absorb or block heat and magnetic field radiation between devices, so that the influence on the functionality between different chips caused by the transmission of heat and a magnetic field is avoided, meanwhile, the second glue has a soft and elastic function, so that the product is protected against shock in the support plate or the tube shell, and the second glue is adopted for sealing and protecting the interior of the support plate or the tube shell, so that the interference generated by the change of the external environment can be reduced.

Step eight: and putting the packaged product obtained in the seventh step into an oven for baking.

Further, the method comprises the following steps: the baking temperature in the third step is 245-255 ℃.

Further, the method comprises the following steps: the baking time in the third step is 60min +/-10 min.

Further, the method comprises the following steps: the baking temperature in the step eight is 150-155 ℃.

Further, the method comprises the following steps: and the baking time in the step eight is 30min +/-10 min.

The invention has the beneficial effects that: the invention can manufacture multi-chip mixed package with high integration level, high performance, high reliability and no influence of heat and magnetic field, the enclosure dam can play a role of separation and isolation, so that different chips are divided into different position areas, the overlong waiting period for development caused by overlong time and overhigh cost caused by modeling can be avoided, and the enclosure dam can absorb or obstruct heat and magnetic field radiation among devices, thereby avoiding the influence on the functionality among different chips caused by the transfer of heat and magnetic field; because the second glue has the soft elastic function, the anti-seismic protection effect on the product can be achieved for the interior of the carrier plate or the tube shell, the second glue is sealed and protected for the interior of the carrier plate or the tube shell, and interference caused by changes of the external environment can be reduced.

Drawings

FIG. 1 is a schematic structural diagram of a product manufactured by a multi-chip hybrid package anti-heating and magnetic field method;

labeled as: 1. first glue; 2. a chip; 3. a box dam; 4. a metal wire; 5. second glue; 6. a carrier plate or a package.

Detailed Description

The invention is further described with reference to the following figures and detailed description.

As shown in fig. 1, a method for resisting heat and magnetic field of a multi-chip hybrid package includes the following steps:

the method comprises the following steps: confirming the attaching form of the chips 2 and attaching a plurality of chips 2 on a carrier plate or a tube shell 6 to obtain the carrier plate or the tube shell with the attached chips, wherein the attaching form of the chips 2 can be horizontally juxtaposed attaching, vertically superposed attaching or horizontally and vertically mixed attaching, and in the embodiment, the horizontally and vertically mixed attaching form is selected;

step two: coating the first glue 1 in the carrier plate or the tube shell with the chip obtained in the step one to ensure that the chip 2 is attached on the carrier plate or the tube shell 6 to obtain the carrier plate or the tube shell with the chip;

step three: placing the support plate or the tube shell which is well pasted with the glue and obtained in the step two in an oven for baking to obtain a support plate or a tube shell with solidified first glue;

step four: placing the carrier plate or the tube shell solidified by the first glue obtained in the third step into an ion cleaning machine to clean and remove foreign matters or pollute the carrier plate or the tube shell to obtain a clean carrier plate or tube shell, so that better bonding in the fifth step is facilitated;

step five: placing the chip 2 on the clean carrier plate or the tube shell obtained in the fourth step on a heating platform of a bonding machine, automatically planting balls between the chip and the chip, then bonding each chip and the chip by using a metal wire 4, and finally electrically connecting the chip and the carrier plate or the tube shell 6 by using the metal wire 4 to obtain the electrically connected carrier plate or tube shell, wherein the metal wire 4 can be a copper wire or a silver wire, and the copper wire is selected in the embodiment.

Step six: building a dam 3 between the chips 2 and the chips 2 in the electrically connected carrier plate or tube shell obtained in the fifth step by using organic epoxy resin to obtain the carrier plate or tube shell containing the dam, wherein the dam 3 can play a role in separation and isolation, so that different chips 2 are divided into different position areas, the overlong waiting period for development and development caused by overlong time and overhigh cost caused by modeling can be avoided, and the dam 3 can absorb or obstruct heat and magnetic field radiation among devices, so that the influence on the functionality among different chips 2 caused by the transmission of heat and magnetic fields is avoided;

step seven: and filling second glue 5 between the dam 3 and the chip 2 on the carrier plate or the tube shell containing the dam obtained in the sixth step to obtain a packaged product, wherein the filled second glue 5 can absorb or block heat and magnetic field radiation among devices, so that the influence on the functionality among different chips 2 caused by the transmission of heat and magnetic fields is avoided, meanwhile, the second glue 5 has a soft and elastic function, so that the shock-proof protection effect on the product can be realized on the inside, and the second glue 5 is adopted for sealing protection inside the carrier plate or the tube shell 6, so that the interference caused by the change of the external environment can be reduced.

Step eight: and putting the packaged product obtained in the seventh step into an oven for baking.

On the basis, the baking temperature in the third step is 245-.

On the basis, the baking time in the third step is 60min +/-10 min, the baking time in the third step can be 50min, 60min or 70min, and 60min is selected in the embodiment.

On the basis, the baking temperature in the step eight is 150-155 °, the baking temperature in the step eight may be 150 °, 152 ° or 155 °, and 152 ° is selected in this embodiment.

On the basis, the baking time in the step eight is 30min ± 10min, the baking time in the step eight can be 20min, 30min or 40min, and in the embodiment, 30min is selected.

The above-mentioned embodiments are intended to illustrate the objects, technical solutions and advantages of the present invention in further detail, and it should be understood that the above-mentioned embodiments are only exemplary embodiments of the present invention, and are not intended to limit the present invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the protection scope of the present invention.