阅读说明：本技术 一种复合膜层台面保护结构及其膜层生产工艺 (Composite film layer table-board protection structure and film layer production process thereof ) 是由 耿开远 于 2020-06-23 设计创作，主要内容包括：本发明公开一种复合膜层台面保护结构及其膜层生产工艺,属于半导体器件技术领域,包括半导体器件台面,半导体器件台面上设有沟槽,其特征在于：所述的沟槽的外部依次设有sipos层I、掺磷二氧化硅层、掺氯二氧化硅层和sipos层II,所述沟槽的下方设有PN结,能够实现可控硅PN结的保护。在中间沉积一层吸杂能力强的掺磷二氧化硅层和固定杂质能力强的掺氯二氧化硅,使得在其工作点附近掺磷二氧化硅层和掺氯二氧化硅起到有效降低漏电流的作用,既保证高耐压和高温度特性,又兼顾了漏电流问题。使用此方法的漏电流可以降低到常规方法的约一半左右。解决了现有技术中出现的问题。(The invention discloses a composite film layer table-board protection structure and a film layer production process thereof, belonging to the technical field of semiconductor devices, comprising a semiconductor device table-board, wherein a groove is arranged on the semiconductor device table-board, and the composite film layer table-board protection structure is characterized in that: the silicon controlled rectifier structure is characterized in that a sipos layer I, a phosphorus-doped silicon dioxide layer, a chlorine-doped silicon dioxide layer and a sipos layer II are sequentially arranged outside the groove, and a PN junction is arranged below the groove, so that the protection of the PN junction of the silicon controlled rectifier can be realized. A phosphorus-doped silicon dioxide layer with strong impurity absorbing capacity and chlorine-doped silicon dioxide with strong impurity fixing capacity are deposited in the middle, so that the phosphorus-doped silicon dioxide layer and the chlorine-doped silicon dioxide near the working point of the silicon dioxide layer play a role in effectively reducing leakage current, the characteristics of high voltage resistance and high temperature are ensured, and the problem of leakage current is also considered. The leakage current using this method can be reduced to about half of that of the conventional method. The problems in the prior art are solved.)

1. The utility model provides a compound rete mesa protection architecture, includes the semiconductor device mesa, is equipped with the slot on the semiconductor device mesa, its characterized in that: the trench is characterized in that a sipos layer I (1), a phosphorus-doped silicon dioxide layer (2), a chlorine-doped silicon dioxide layer (3) and a sipos layer II (4) are sequentially arranged outside the trench, and a PN junction is arranged below the trench.

2. The composite film layer mesa protective structure of claim 1, wherein: and a glass layer (5) is arranged outside the sipos layer II (4).

3. The composite film layer mesa protective structure of claim 1, wherein: the thickness of the film layer of the sipos layer I (1) is

4. The composite film layer mesa protective structure of claim 1, wherein: the thickness of the film layer of the phosphorus-doped silicon dioxide layer (2) is

5. The composite film layer mesa protective structure of claim 1, wherein: the thickness of the film layer of the chlorine-doped silicon dioxide layer (3) is

6. The composite film layer mesa protective structure of claim 1, wherein: the thickness of the film layer of the sipos layer II (4) is

7. A process for producing a composite film layer for use in the composite film layer mesa protective structure of any one of claims 1 to 6, comprising: the process comprises the following steps:

step one, depositing a sipos layer I (1) at the temperature T of 680 ℃ and the deposition pressure TTL of 300mtorr, SiH₄Flow rate: 500 × 47% ═ 235cc/min, N₂O flow rate: 300 × 17 ═ 51cc/min, deposition time t ═ 20 min;

step two, depositing a phosphorus-doped silicon dioxide layer (2), wherein the temperature T is 680 ℃, the deposition pressure TTL is 230mtorr,SiH₄flow rate: 200 × 45 ═ 90cc/min, O₂Flow rate: 200 × 28% -56 cc/min, pH₃Flow rate: 100 x 10% ═ 10cc/min, deposition time t ═ 6 min;

depositing a chlorine-doped silicon dioxide layer (3) at the temperature T of 680 ℃ and the deposition pressure TTL of 300mtorr, SiH₄Flow rate: 500 × 38% ═ 190cc/min, N₂O flow rate: 300 × 25% ═ 75cc/min, HCL flow: 30cc/min, and the deposition time t is 8 min;

step four, depositing the sipos layer II (4) at the temperature T of 680 ℃ and the deposition pressure TTL of 300mtorr, SiH₄Flow rate: 500 × 47% ═ 235cc/min, N₂O flow rate: 300 × 17 ═ 51cc/min, deposition time t ═ 40 min.

Technical Field

The invention discloses a composite film layer table-board protection structure and a film layer production process thereof, and belongs to the technical field of semiconductor devices.

Background

As shown in FIG. 1, the prior art sipos film is a special passivation film which is commonly used to control the charge through the oxygen ratio, thereby realizing high voltage resistance and high temperature characteristics,the conventional Sipos film is based on Si, and has the disadvantage of large leakage current_XO_YThe resulting film is considered to be a semi-insulating film (generally, about 45% of O: Si), and thus the leakage current is large. Therefore, how to effectively reduce the leakage current is a technical problem which needs to be solved at present.

Disclosure of Invention

Aiming at the defects of the prior art, the invention aims to provide a composite film layer table-board protection structure and a film layer production process thereof, and solves the problems in the prior art.

The invention relates to a composite film layer table top protection structure, which comprises a semiconductor device table top, wherein a groove is arranged on the semiconductor device table top, and the composite film layer table top protection structure is characterized in that: the silicon-doped silicon dioxide trench structure is characterized in that a sipos layer I, a phosphorus-doped silicon dioxide layer, a chlorine-doped silicon dioxide layer and a sipos layer II are sequentially arranged outside the trench, and a PN junction is arranged below the trench.

Further, a glass layer is arranged outside the sipos layer II.

Further, the thickness of the film layer I of the sipos layer is

Further, the thickness of the phosphorus-doped silicon dioxide layer film is

Further, the layer thickness of the chlorine-doped silicon dioxide layer is

Further, the thickness of the film layer II of the sipos layer is

The production process of the composite film layer comprises the following steps:

step one, depositing a sipos layer I, wherein the temperature T is 680 ℃, the deposition pressure TTL is 300mtorr, and SiH₄Flow rate: 500 x 47% ═ 235cc/min，N₂O flow rate: 300 × 17 ═ 51cc/min, deposition time t ═ 20 min;

step two, depositing a phosphorus-doped silicon dioxide layer, wherein the temperature T is 680 ℃, the deposition pressure TTL is 230mtorr, and SiH₄Flow rate: 200 × 45 ═ 90cc/min, O₂Flow rate: 200 × 28% -56 cc/min, pH₃Flow rate: 100 x 10% ═ 10cc/min, deposition time t ═ 6 min;

depositing a chlorine-doped silicon dioxide layer at the temperature T of 680 ℃ and the deposition pressure TTL of 300mtorr and SiH₄Flow rate: 500 × 38% ═ 190cc/min, N₂O flow rate: 300 × 25% ═ 75cc/min, HCL flow: 30cc/min, and the deposition time t is 8 min;

step four, depositing the sipos layer II at the temperature T of 680 ℃ and the deposition pressure TTL of 300mtorr and SiH₄Flow rate: 500 × 47% ═ 235cc/min, N₂O flow rate: 300 × 17 ═ 51cc/min, deposition time t ═ 40 min.

Compared with the prior art, the invention has the following beneficial effects:

the composite film layer table-board protection structure and the film layer production process thereof can realize the protection of the silicon controlled rectifier PN junction. Meanwhile, the sipos layer is made into a sandwich biscuit type, and a phosphorus-doped silicon dioxide layer with strong impurity absorbing capacity and chlorine-doped silicon dioxide with impurity fixing capacity are deposited in the middle, so that the phosphorus-doped silicon dioxide layer and the chlorine-doped silicon dioxide near the working point play a role in effectively reducing leakage current, the characteristics of high voltage resistance and high temperature are ensured, and the problem of leakage current is also considered. The leakage current using this method can be reduced to within half of that of the conventional method. The problems in the prior art are solved.

Drawings

FIG. 1 is a prior art block diagram;

FIG. 2 is a block diagram of an embodiment of the present invention;

FIG. 3 is a diagram of a composite film layer in an embodiment of the invention;

in the figure: 1. a sipos layer I; 2. a phosphorus-doped silicon dioxide layer; 3. a chlorine-doped silicon dioxide layer; 4. sipos layer II; 5. and (4) a glass layer.

Detailed Description

The invention is further illustrated by the following figures and examples: