阅读说明：本技术 半导体装置 (Semiconductor device with a plurality of semiconductor chips ) 是由 铃木优 菊地祥子 稻叶芽里 村上润 重冈隆 稻垣洋 奥畠隆嗣 于 2019-02-14 设计创作，主要内容包括：实施方式提供一种较好运行的半导体装置。实施方式的半导体装置具备：半导体衬底；多个第1焊垫电极,设置于半导体衬底；多条第1配线,与多个第1焊垫电极分别电气连接；第1电极,与多条第1配线共通连接；第2焊垫电极,设置于半导体衬底；及第1电阻部与第1保护元件,串联连接于第1电极与第2焊垫电极之间。(Embodiments provide a semiconductor device that operates well. The semiconductor device of the embodiment includes: a semiconductor substrate; a plurality of No. 1 pad electrodes disposed on the semiconductor substrate; a plurality of No. 1 wirings electrically connected to the plurality of No. 1 pad electrodes, respectively; a 1 st electrode commonly connected to the 1 st wirings; a 2 nd pad electrode disposed on the semiconductor substrate; and a 1 st resistor and a 1 st protection element connected in series between the 1 st electrode and the 2 nd pad electrode.)

1. A semiconductor device includes:

a semiconductor substrate;

a plurality of No. 1 pad electrodes disposed on the semiconductor substrate;

a plurality of 1 st wirings electrically connected to the plurality of 1 st pad electrodes, respectively;

a 1 st electrode commonly connected to the 1 st wirings;

a 2 nd pad electrode disposed on the semiconductor substrate; and

and a 1 st resistor and a 1 st protection element connected in series between the 1 st electrode and the 2 nd pad electrode.

2. The semiconductor device according to claim 1, comprising:

a plurality of 2 nd wirings electrically connected to the plurality of 1 st pad electrodes, respectively;

a 2 nd electrode commonly connected to the plurality of 2 nd wirings;

a 3 rd pad electrode disposed on the semiconductor substrate; and

and a 2 nd resistance part and a 2 nd protection element connected in series between the 2 nd electrode and the 3 rd pad electrode.

3. The semiconductor device according to claim 2, wherein

At least one of the impedance of each of the 1 st wirings and the impedance of each of the 2 nd wirings is substantially uniform.

4. The semiconductor device according to claim 2, which

Has one or more wiring layers, and

the one or more wiring layers include at least one of a wiring member and a contact member that function as at least one of the 1 st pad electrodes, the 1 st wires, the 1 st electrodes, the 2 nd wires, the 2 nd electrodes, the 2 nd pad electrodes, the 3 rd pad electrodes, the 1 st resistance portions, the 2 nd resistance portions, the 1 st protective elements, and the 2 nd protective elements.

5. The semiconductor device according to claim 2, which

Has a semiconductor substrate having an operating region, and

the 1 st protective element has a part of an operating region of the semiconductor substrate, a 1 st insulating film provided on a part of the operating region, and a 1 st lower electrode provided on the 1 st insulating film,

the 2 nd protective element includes a part of an operating region of the semiconductor substrate, a 2 nd insulating film provided in the part of the operating region, and a 2 nd lower electrode provided in the 2 nd insulating film.

6. The semiconductor device according to claim 2, wherein

The 1 st pad electrodes, the 2 nd pad electrodes and the 3 rd pad electrodes are arranged along the 1 st direction

At least one of the 1 st wirings includes: a plurality of 1 st extension portions extending along the 1 st direction; and a plurality of 2 nd extending portions extending along a 2 nd direction intersecting the 1 st direction and located within a plane of the semiconductor substrate;

at least one of the plurality of 2 nd wirings has: a plurality of No. 3 extending portions extending along the No. 1 direction; and a plurality of 4 th extending portions extending along a 2 nd direction intersecting the 1 st direction and located within a plane of the semiconductor substrate.

7. The semiconductor device according to claim 2, wherein

The 1 st resistance part includes:

a 1 st portion connected to the 1 st electrode;

a 2 nd part connected to the 1 st part; and

a 3 rd portion connected to the 2 nd portion; and is

The wiring width of the 2 nd portion is smaller than the wiring widths of the 1 st portion and the 3 rd portion,

the 2 nd resistance part has:

a 4 th part connected to the 2 nd electrode;

a 5 th part connected to the 4 th part; and

a 6 th part connected to the 5 th part; and is

The wiring width of the 5 th portion is smaller than the wiring widths of the 4 th portion and the 6 th portion.

8. The semiconductor device according to claim 2, wherein

The 1 st and 2 nd wirings include: an interlayer wiring section extending in a thickness direction of the semiconductor substrate; and an intralayer wiring section extending in a direction horizontal to the surface of the semiconductor substrate.

9. The semiconductor device according to claim 2, which

A plurality of 1 st variable resistance elements respectively connected to the 1 st pad electrodes and the 1 st wires, and

the 1 st variable resistance element has:

a 1 st terminal;

a 1 st wiring member connected to the 1 st terminal;

a plurality of 1 st transistors connected to the 1 st wiring member; and

a 2 nd terminal commonly connected to the 1 st transistors;

the semiconductor device further includes a plurality of 2 nd variable resistance elements connected to the plurality of 1 st pad electrodes and the plurality of 2 nd wires, respectively, and

the 2 nd variable resistance element has:

a 3 rd terminal;

a 2 nd wiring member connected to the 3 rd terminal;

a plurality of 2 nd transistors connected to the 2 nd wiring member; and

and a 3 rd terminal commonly connected to the plurality of 2 nd transistors.

10. The semiconductor device according to claim 2, comprising:

a mounting substrate provided with a plurality of electrode terminals and laminated with a plurality of the semiconductor substrates; and

and a bonding wire connecting the plurality of electrode terminals to the 1 st pad electrode, the 2 nd pad electrode, and the 3 rd pad electrode of at least one of the plurality of semiconductor substrates.

Technical Field

The present embodiment relates to a semiconductor device.

Background

A semiconductor device which operates at high speed is expected.

Disclosure of Invention

Drawings

Fig. 1 is a schematic block diagram of a semiconductor device according to embodiment 1.

Fig. 2 is a schematic side view of the semiconductor device.

Fig. 3 is a schematic plan view of the semiconductor device.

Fig. 4 is a circuit diagram of the protection circuit of embodiment 1.

Fig. 5 is a circuit diagram of a protection circuit of a comparative example.

Fig. 6 is a waveform diagram showing signals of the protection circuit.

Fig. 7 is a waveform diagram showing signals of the protection circuit.

Fig. 8 is a waveform diagram showing signals of the protection circuit.

Fig. 9 is a schematic cross-sectional view of a semiconductor device according to configuration example 1.

Fig. 10 is a schematic plan view of the semiconductor device.

Fig. 11 is a schematic cross-sectional view of a semiconductor device of configuration example 2.

Fig. 12 is a schematic plan view of the semiconductor device.

Fig. 13 is a schematic cross-sectional view of a semiconductor device according to configuration example 3.

Fig. 14 is a schematic plan view of the semiconductor device.

Fig. 15 is a schematic cross-sectional view of a semiconductor device of configuration example 4.

Fig. 16 is a schematic plan view of the semiconductor device.

Fig. 17 is a schematic cross-sectional view of a semiconductor device according to configuration example 5.

Fig. 18 is a schematic plan view of the semiconductor device.

Fig. 19 is a schematic cross-sectional view of a semiconductor device according to configuration example 6.

Fig. 20 is a schematic plan view of the semiconductor device.

Fig. 21 is a schematic plan view of the semiconductor device according to configuration example 7.

Fig. 22 is a schematic plan view of a semiconductor device according to embodiment 8.

Fig. 23 is a schematic plan view of the semiconductor device according to embodiment 2.

Fig. 24 is a schematic diagram showing the structure of the variable resistive element VR.

Embodiments provide a semiconductor device that operates well.